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Searched refs:DstSize (Results 1 – 25 of 32) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64GenRegisterBankInfo.def246 AArch64GenRegisterBankInfo::getFPExtMapping(unsigned DstSize,
262 assert((DstSize == 32 || DstSize == 64) && "Unexpected half extension");
263 if (DstSize == 32)
269 assert(DstSize == 64 && "Unexpected float extension");
272 assert((SrcSize == 64 || DstSize == 128) && "Unexpected vector extension");
/llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerCombiner.cpp71 unsigned DstSize = DstTy.getSizeInBits(); in matchExtractVecEltPairwiseAdd() local
72 if (DstSize != 16 && DstSize != 32 && DstSize != 64) in matchExtractVecEltPairwiseAdd()
H A DAArch64InstructionSelector.cpp1008 switch (DstSize) { in selectFPConvOpc()
2697 I.getOperand(3).setImm((DstSize - LSB) % DstSize); in select()
2700 if (DstSize < 64) { in select()
3161 if (DstSize == 0) { in select()
3166 if (DstSize != 64 && DstSize > 32) { in select()
3173 if (DstSize > 32) { in select()
3274 if (DstSize == 64) { in select()
5248 if (DstSize != 32 && DstSize != 64) in selectUSMovFromExtend()
5391 if (DstSize == 64) { in emitConstantVector()
5420 if (DstSize < 32) in tryOptConstantBuildVec()
[all …]
H A DAArch64PreLegalizerCombiner.cpp42 const unsigned DstSize = MRI.getType(DstReg).getSizeInBits(); in matchFConstantToConstant() local
43 if (DstSize != 32 && DstSize != 64) in matchFConstantToConstant()
H A DAArch64RegisterBankInfo.h97 getFPExtMapping(unsigned DstSize, unsigned SrcSize);
H A DAArch64RegisterBankInfo.cpp185 #define CHECK_VALUEMAP_FPEXT(DstSize, SrcSize) \ in AArch64RegisterBankInfo() argument
187 unsigned PartialMapDstIdx = PMI_FPR##DstSize - PMI_Min; \ in AArch64RegisterBankInfo()
191 const ValueMapping *Map = getFPExtMapping(DstSize, SrcSize); \ in AArch64RegisterBankInfo()
195 Map[0].NumBreakDowns == 1 && "FPR" #DstSize \ in AArch64RegisterBankInfo()
H A DAArch64LegalizerInfo.cpp424 unsigned DstSize = Query.Types[0].getSizeInBits(); in AArch64LegalizerInfo() local
426 if (DstSize == 128 && !Query.Types[0].isVector()) in AArch64LegalizerInfo()
431 if (DstSize < 8 || DstSize > 128 || !isPowerOf2_32(DstSize)) in AArch64LegalizerInfo()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBankInfo.cpp2585 unsigned DstSize = DstTy.getSizeInBits(); in applyMappingImpl() local
2587 const bool UseSel64 = DstSize > 32 && in applyMappingImpl()
2599 if (DstSize > 32) { in applyMappingImpl()
2602 } else if (DstSize < 32) { in applyMappingImpl()
3878 OpdsMapping[0] = AMDGPU::getValueMapping(BankID, DstSize); in getInstrMapping()
3888 OpdsMapping[0] = AMDGPU::getValueMapping(BankID, DstSize); in getInstrMapping()
3897 unsigned DstSize = DstTy.getSizeInBits(); in getInstrMapping() local
3917 OpdsMapping[0] = AMDGPU::getValueMapping(Bank, DstSize); in getInstrMapping()
3959 unsigned DstSize = getSizeInBits(Dst, MRI, *TRI); in getInstrMapping() local
3961 OpdsMapping[0] = AMDGPU::getValueMapping(Bank, DstSize); in getInstrMapping()
[all …]
H A DAMDGPUInstructionSelector.cpp487 unsigned DstSize = DstTy.getSizeInBits(); in selectG_EXTRACT() local
491 if (Offset % 32 != 0 || DstSize > 128) in selectG_EXTRACT()
496 if (DstSize == 16) in selectG_EXTRACT()
497 DstSize = 32; in selectG_EXTRACT()
537 const unsigned DstSize = DstTy.getSizeInBits(); in selectG_MERGE_VALUES() local
575 const unsigned DstSize = DstTy.getSizeInBits(); in selectG_UNMERGE_VALUES() local
1941 unsigned DstSize = DstTy.getSizeInBits(); in selectG_TRUNC() local
2017 int SubRegIdx = sizeToSubRegIndex(DstSize); in selectG_TRUNC()
2073 const unsigned DstSize = DstTy.getSizeInBits(); in selectG_SZA_EXT() local
2082 if (DstSize <= 32) in selectG_SZA_EXT()
[all …]
H A DSIRegisterInfo.cpp2840 unsigned DstSize = getRegSizeInBits(*DstRC); in shouldCoalesce() local
2847 if (SrcSize <= 32 || DstSize <= 32) in shouldCoalesce()
2850 return NewSize <= DstSize || NewSize <= SrcSize; in shouldCoalesce()
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DInlineAsmLowering.cpp248 unsigned DstSize = TRI->getRegSizeInBits(Dst, *MRI); in buildAnyextOrCopy() local
250 if (DstSize < SrcSize) { in buildAnyextOrCopy()
256 if (DstSize > SrcSize) { in buildAnyextOrCopy()
262 Src = MIRBuilder.buildAnyExt(LLT::scalar(DstSize), Src).getReg(0); in buildAnyextOrCopy()
H A DLegalizerHelper.cpp1508 const int DstSize = DstTy.getSizeInBits(); in widenScalarMergeValues() local
1511 const int NumMerge = (DstSize + WideSize - 1) / WideSize; in widenScalarMergeValues()
1517 if (WideSize >= DstSize) { in widenScalarMergeValues()
1538 if (WideSize > DstSize) in widenScalarMergeValues()
1657 unsigned DstSize = DstTy.getSizeInBits(); in widenScalarUnmergeValues() local
6542 const unsigned DstSize = DstTy.getSizeInBits(); in lowerUnmergeValues() local
6543 unsigned Offset = DstSize; in lowerUnmergeValues()
6544 for (unsigned I = 1; I != NumDst; ++I, Offset += DstSize) { in lowerUnmergeValues()
6741 unsigned DstSize = DstTy.getSizeInBits(); in lowerExtract() local
6744 (Offset + DstSize <= SrcTy.getSizeInBits())) { in lowerExtract()
[all …]
H A DCallLowering.cpp509 const unsigned DstSize = DstTy.getSizeInBits(); in buildCopyToRegs() local
518 CoveringSize = alignTo(SrcSize, DstSize); in buildCopyToRegs()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DMachineVerifier.cpp1228 unsigned DstSize = DstElTy.getSizeInBits(); in verifyPreISelGenericInstruction() local
1232 if (DstSize <= SrcSize) in verifyPreISelGenericInstruction()
1237 if (DstSize >= SrcSize) in verifyPreISelGenericInstruction()
1377 if (SrcSize == DstSize) in verifyPreISelGenericInstruction()
1380 if (DstSize + OffsetOp.getImm() > SrcSize) in verifyPreISelGenericInstruction()
1400 if (DstSize <= SrcSize) in verifyPreISelGenericInstruction()
1403 if (SrcSize + OffsetOp.getImm() > DstSize) in verifyPreISelGenericInstruction()
1804 unsigned DstSize = 0; in visitMachineInstrBefore() local
1819 DstSize = TRI->getRegSizeInBits(*DstRC); in visitMachineInstrBefore()
1822 if (DstSize == 0) in visitMachineInstrBefore()
[all …]
/llvm-project-15.0.7/bolt/include/bolt/Passes/
H A DTailDuplication.h112 uint64_t DstSize, uint64_t Count) const;
/llvm-project-15.0.7/llvm/include/llvm/Analysis/
H A DTargetTransformInfoImpl.h526 unsigned DstSize = Dst->getScalarSizeInBits(); in getCastInstrCost() local
527 if (DL.isLegalInteger(DstSize) && in getCastInstrCost()
528 DstSize >= DL.getPointerTypeSizeInBits(Src)) in getCastInstrCost()
540 TypeSize DstSize = DL.getTypeSizeInBits(Dst); in getCastInstrCost() local
541 if (!DstSize.isScalable() && DL.isLegalInteger(DstSize.getFixedSize())) in getCastInstrCost()
/llvm-project-15.0.7/llvm/lib/Linker/
H A DLinkModules.cpp195 uint64_t DstSize = DstDL.getTypeAllocSize(DstGV->getValueType()); in computeResultingSelectionKind() local
203 From = SrcSize > DstSize ? LinkFrom::Src : LinkFrom::Dst; in computeResultingSelectionKind()
205 if (SrcSize != DstSize) in computeResultingSelectionKind()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizationArtifactCombiner.h262 const unsigned DstSize = DstTy.getSizeInBits(); in tryCombineTrunc() local
267 if (DstSize < MergeSrcSize) { in tryCombineTrunc()
278 } else if (DstSize == MergeSrcSize) { in tryCombineTrunc()
285 } else if (DstSize % MergeSrcSize == 0) { in tryCombineTrunc()
296 const unsigned NumSrcs = DstSize / MergeSrcSize; in tryCombineTrunc()
/llvm-project-15.0.7/clang/lib/CodeGen/
H A DCGCall.cpp1172 if (FirstEltSize < DstSize && in EnterStructPointerForCoercedAccess()
1219 uint64_t DstSize = DL.getTypeSizeInBits(DestIntTy); in CoerceIntOrPtrToIntOrPtr() local
1221 if (SrcSize > DstSize) { in CoerceIntOrPtrToIntOrPtr()
1275 if (!SrcSize.isScalable() && !DstSize.isScalable() && in CreateCoercedLoad()
1276 SrcSize.getFixedSize() >= DstSize.getFixedSize()) { in CreateCoercedLoad()
1392 SrcSize.getFixedSize() <= DstSize.getFixedSize()) { in CreateCoercedStore()
1410 llvm::ConstantInt::get(CGF.IntPtrTy, DstSize.getFixedSize())); in CreateCoercedStore()
2978 if (SrcSize <= DstSize) { in EmitFunctionProlog()
2993 if (SrcSize > DstSize) { in EmitFunctionProlog()
2994 Builder.CreateMemCpy(Ptr, AddrToStoreInto, DstSize); in EmitFunctionProlog()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp896 unsigned DstSize = IsGather4 ? 4 : std::max(countPopulation(DMask), 1u); in convertMIMGInst() local
900 DstSize = (DstSize + 1) / 2; in convertMIMGInst()
904 DstSize += 1; in convertMIMGInst()
906 if (DstSize == Info->VDataDwords && AddrSize == Info->VAddrDwords) in convertMIMGInst()
910 AMDGPU::getMIMGOpcode(Info->BaseOpcode, Info->MIMGEncoding, DstSize, AddrSize); in convertMIMGInst()
916 if (DstSize != Info->VDataDwords) { in convertMIMGInst()
/llvm-project-15.0.7/bolt/lib/Passes/
H A DTailDuplication.cpp384 uint64_t DstAddr, uint64_t DstSize, in cacheScore() argument
393 JumpDistance = (DstAddr + DstSize) - (SrcAddr); in cacheScore()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstructionSelector.cpp237 const unsigned DstSize = RBI.getSizeInBits(DstReg, MRI, TRI); in selectCopy() local
247 if (DstSize > SrcSize && SrcRegBank.getID() == X86::GPRRegBankID && in selectCopy()
273 assert((DstSize == SrcSize || in selectCopy()
277 DstSize <= RBI.getSizeInBits(SrcReg, MRI, TRI))) && in selectCopy()
284 DstRegBank.getID() == X86::GPRRegBankID && SrcSize > DstSize && in selectCopy()
/llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/
H A DInstCombineCasts.cpp1299 unsigned DstSize = CI.getType()->getScalarSizeInBits(); in visitZExt() local
1304 if (SrcSize < DstSize) { in visitZExt()
1311 if (SrcSize == DstSize) { in visitZExt()
1316 if (SrcSize > DstSize) { in visitZExt()
1318 APInt AndValue(APInt::getLowBitsSet(DstSize, MidSize)); in visitZExt()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DBasicTTIImpl.h944 TypeSize DstSize = DstLT.second.getSizeInBits();
960 SrcSize == DstSize)
1016 if (SrcLT.first == DstLT.first && SrcSize == DstSize) {
/llvm-project-15.0.7/llvm/lib/IR/
H A DInstructions.cpp3098 unsigned DstSize = DstTy->getScalarSizeInBits(); in isEliminableCastPair() local
3101 if (SrcSize < DstSize) in isEliminableCastPair()
3103 if (SrcSize > DstSize) in isEliminableCastPair()
3116 unsigned DstSize = DstTy->getScalarSizeInBits(); in isEliminableCastPair() local
3117 if (SrcSize <= PtrSize && SrcSize == DstSize) in isEliminableCastPair()

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