| /llvm-project-15.0.7/llvm/lib/Target/BPF/ |
| H A D | BPFMISimplifyPatchable.cpp | 117 MachineInstr *DefInst = MO.getParent(); in checkADDrr() local 118 unsigned Opcode = DefInst->getOpcode(); in checkADDrr() 132 const MachineOperand &ImmOp = DefInst->getOperand(2); in checkADDrr() 142 const MachineOperand &Opnd = DefInst->getOperand(0); in checkADDrr() 147 BuildMI(*DefInst->getParent(), *DefInst, DefInst->getDebugLoc(), TII->get(COREOp)) in checkADDrr() 148 .add(DefInst->getOperand(0)).addImm(Opcode).add(*BaseOp) in checkADDrr() 150 DefInst->eraseFromParent(); in checkADDrr() 287 MachineInstr *DefInst = MRI->getUniqueVRegDef(SrcReg); in removeLD() local 288 if (!DefInst) in removeLD() 291 if (DefInst->getOpcode() != BPF::LD_imm64) in removeLD() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUMemoryUtils.cpp | 142 Instruction *DefInst = Def->getMemoryInst(); in isReallyAClobber() local 144 if (isa<FenceInst>(DefInst)) in isReallyAClobber() 147 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(DefInst)) { in isReallyAClobber() 164 if (checkNoAlias(dyn_cast<AtomicCmpXchgInst>(DefInst)) || in isReallyAClobber() 165 checkNoAlias(dyn_cast<AtomicRMWInst>(DefInst))) in isReallyAClobber()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Scalar/ |
| H A D | EarlyCSE.cpp | 553 Instruction *DefInst = nullptr; member 561 : DefInst(Inst), Generation(Generation), MatchingId(MatchingId), in LoadValue() 1120 if (InVal.DefInst == nullptr) in getMatchingValue() 1135 Instruction *Matching = MemInstMatching ? MemInst.get() : InVal.DefInst; in getMatchingValue() 1136 Instruction *Other = MemInstMatching ? InVal.DefInst : MemInst.get(); in getMatchingValue() 1143 if (MemInst.isStore() && InVal.DefInst != Result) in getMatchingValue() 1152 if (!isNonTargetIntrinsicMatch(cast<IntrinsicInst>(InVal.DefInst), in getMatchingValue() 1158 !isSameMemGeneration(InVal.Generation, CurrentGeneration, InVal.DefInst, in getMatchingValue() 1440 << " to: " << *InVal.DefInst << '\n'); in processNode() 1521 if (InVal.DefInst && in processNode() [all …]
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| H A D | DeadStoreElimination.cpp | 1031 bool isCompleteOverwrite(const MemoryLocation &DefLoc, Instruction *DefInst, in isCompleteOverwrite() 1045 return isOverwrite(UseInst, DefInst, *CC, DefLoc, InstWriteOffset, in isCompleteOverwrite() 1904 Instruction *DefInst = Def->getMemoryInst(); in eliminateRedundantStoresOfExistingValues() local 1905 auto MaybeDefLoc = getLocForWrite(DefInst); in eliminateRedundantStoresOfExistingValues() 1906 if (!MaybeDefLoc || !isRemovable(DefInst)) in eliminateRedundantStoresOfExistingValues() 1922 if (DefInst->isIdenticalTo(UpperInst)) in eliminateRedundantStoresOfExistingValues() 1925 if (auto *SI = dyn_cast<StoreInst>(DefInst)) { in eliminateRedundantStoresOfExistingValues() 1930 auto OR = isOverwrite(UpperInst, DefInst, UpperLoc, *MaybeDefLoc, in eliminateRedundantStoresOfExistingValues() 1940 if (!IsRedundantStore() || isReadClobber(*MaybeDefLoc, DefInst)) in eliminateRedundantStoresOfExistingValues() 1942 LLVM_DEBUG(dbgs() << "DSE: Remove No-Op Store:\n DEAD: " << *DefInst in eliminateRedundantStoresOfExistingValues() [all …]
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| H A D | NewGVN.cpp | 3960 auto *DefInst = dyn_cast_or_null<Instruction>(Def); in eliminateInstructions() local 3961 if (DefInst && AllTempInstructions.count(DefInst)) { in eliminateInstructions() 3962 auto *PN = cast<PHINode>(DefInst); in eliminateInstructions()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCPreEmitPeephole.cpp | 256 MachineBasicBlock::iterator DefInst; in addLinkerOpt() member 318 MachineBasicBlock::iterator BBI = Pair->DefInst; in addLinkerOpt() 341 Pair->DefInst->addOperand(ImplDef); in addLinkerOpt() 349 Pair->DefInst->addOperand(*MF, PCRelLabel); in addLinkerOpt()
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| H A D | PPCBranchCoalescing.cpp | 467 MachineInstr *DefInst = MRI->getVRegDef(Use.getReg()); in canMoveToEnd() local 468 if (DefInst->isPHI() && DefInst->getParent() == MI.getParent()) { in canMoveToEnd()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCopyToCombine.cpp | 406 MachineInstr *DefInst = LastDef[Reg]; in findPotentialNewifiableTFRs() local 407 if (!DefInst) in findPotentialNewifiableTFRs() 409 if (!isCombinableInstType(*DefInst, TII, ShouldCombineAggressively)) in findPotentialNewifiableTFRs() 414 MachineBasicBlock::iterator It(DefInst); in findPotentialNewifiableTFRs() 425 PotentiallyNewifiableTFR.insert(DefInst); in findPotentialNewifiableTFRs()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | RegAllocFast.cpp | 363 for (const MachineInstr &DefInst : MRI->def_instructions(VirtReg)) { in mayLiveOut() local 364 if (DefInst.getParent() != MBB) { in mayLiveOut() 368 if (!SelfLoopDef || dominates(*MBB, DefInst.getIterator(), SelfLoopDef)) in mayLiveOut() 369 SelfLoopDef = &DefInst; in mayLiveOut() 411 for (const MachineInstr &DefInst : MRI->def_instructions(VirtReg)) { in mayLiveIn() local 412 if (DefInst.getParent() != MBB || ++C >= Limit) { in mayLiveIn()
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | MemorySSA.cpp | 301 Instruction *DefInst = MD->getMemoryInst(); in instructionClobbersQuery() local 302 assert(DefInst && "Defining instruction not actually an instruction"); in instructionClobbersQuery() 305 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(DefInst)) { in instructionClobbersQuery() 331 ModRefInfo I = AA.getModRefInfo(DefInst, CB); in instructionClobbersQuery() 336 if (auto *DefLoad = dyn_cast<LoadInst>(DefInst)) in instructionClobbersQuery() 341 ModRefInfo I = AA.getModRefInfo(DefInst, UseLoc); in instructionClobbersQuery()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIPeepholeSDWA.cpp | 504 const MachineInstr *DefInst = Def.getParent(); in foldToImm() local 505 if (!TII->isFoldableCopy(*DefInst)) in foldToImm() 508 const MachineOperand &Copied = DefInst->getOperand(1); in foldToImm()
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| H A D | SIInstrInfo.cpp | 8025 auto *DefInst = MRI.getVRegDef(RSR.Reg); in getVRegSubRegDef() local 8026 while (auto *MI = DefInst) { in getVRegSubRegDef() 8027 DefInst = nullptr; in getVRegSubRegDef() 8036 DefInst = MRI.getVRegDef(RSR.Reg); in getVRegSubRegDef() 8044 DefInst = MRI.getVRegDef(RSR.Reg); in getVRegSubRegDef() 8047 if (!DefInst) in getVRegSubRegDef()
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| /llvm-project-15.0.7/polly/lib/Transform/ |
| H A D | DeLICM.cpp | 676 auto *DefInst = DefMA->getAccessInstruction(); in tryMapValue() local 719 LI->getLoopFor(DefInst->getParent())); in tryMapValue()
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