Lines Matching refs:DefInst
117 MachineInstr *DefInst = MO.getParent(); in checkADDrr() local
118 unsigned Opcode = DefInst->getOpcode(); in checkADDrr()
132 const MachineOperand &ImmOp = DefInst->getOperand(2); in checkADDrr()
142 const MachineOperand &Opnd = DefInst->getOperand(0); in checkADDrr()
147 BuildMI(*DefInst->getParent(), *DefInst, DefInst->getDebugLoc(), TII->get(COREOp)) in checkADDrr()
148 .add(DefInst->getOperand(0)).addImm(Opcode).add(*BaseOp) in checkADDrr()
150 DefInst->eraseFromParent(); in checkADDrr()
287 MachineInstr *DefInst = MRI->getUniqueVRegDef(SrcReg); in removeLD() local
288 if (!DefInst) in removeLD()
291 if (DefInst->getOpcode() != BPF::LD_imm64) in removeLD()
294 const MachineOperand &MO = DefInst->getOperand(1); in removeLD()