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Searched refs:Decoder (Results 1 – 25 of 36) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/XCore/Disassembler/
H A DXCoreDisassembler.cpp327 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in Decode2RInstruction()
328 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); in Decode2RInstruction()
341 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); in Decode2RImmInstruction()
353 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in DecodeR2RInstruction()
354 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder); in DecodeR2RInstruction()
366 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in Decode2RSrcDstInstruction()
367 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder); in Decode2RSrcDstInstruction()
394 DecodeBitpOperand(Inst, Op2, Address, Decoder); in DecodeRUSBitpInstruction()
408 DecodeBitpOperand(Inst, Op2, Address, Decoder); in DecodeRUSSrcDstBitpInstruction()
558 DecodeBitpOperand(Inst, Op3, Address, Decoder); in Decode2RUSBitpInstruction()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp759 if (!Decoder->tryAddingSymbolicOperand( in DecodePCRelLabel19()
1036 DecodeFPR8RegisterClass(Inst, Rt, Addr, Decoder); in DecodeUnsignedLdStInstruction()
1226 DecodeFPR8RegisterClass(Inst, Rt, Addr, Decoder); in DecodeSignedLdStInstruction()
1476 Decoder); in DecodeAuthLoadInstruction()
1483 DecodeGPR64RegisterClass(Inst, Rt, Addr, Decoder); in DecodeAuthLoadInstruction()
1485 DecodeSImm<10>(Inst, offset, Addr, Decoder); in DecodeAuthLoadInstruction()
1630 DecodeFPR128RegisterClass(Inst, Rd, Addr, Decoder); in DecodeModImmTiedInstruction()
1631 DecodeFPR128RegisterClass(Inst, Rd, Addr, Decoder); in DecodeModImmTiedInstruction()
1650 DecodeGPR64RegisterClass(Inst, Rd, Addr, Decoder); in DecodeAdrInstruction()
1797 DecodeZPRRegisterClass(Inst, Zdn, Addr, Decoder); in DecodeSVELogicalImmInstruction()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp1464 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMem()
1484 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMemEVA()
1505 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeLoadByte15()
1727 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMemMMSPImm5Lsl2()
1742 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMemMMGPImm7Lsl2()
1782 Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); in DecodeMemMMImm9()
1887 Reg = getReg(Decoder, Mips::COP2RegClassID, Reg); in DecodeFMem2()
1903 Reg = getReg(Decoder, Mips::COP3RegClassID, Reg); in DecodeFMem3()
1920 Reg = getReg(Decoder, Mips::COP2RegClassID, Reg); in DecodeFMemCop2R6()
1937 Reg = getReg(Decoder, Mips::COP2RegClassID, Reg); in DecodeFMemCop2MMR6()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp2904 true, 4, Inst, Decoder)) in DecodeT2BInstruction()
2928 true, 4, Inst, Decoder)) in DecodeBranchImmInstruction()
3962 true, 2, Inst, Decoder)) in DecodeThumbBROperand()
6300 Decoder)) in DecodeBFLabelOperand()
6312 Decoder)) in DecodeBFAfterTargetOperand()
6343 Inst, Imm, Address, Decoder))) in DecodeLOLoop()
6356 Inst, Imm, Address, Decoder))) in DecodeLOLoop()
6718 if (!Check(S, RnDecoder(Inst, Rn, Address, Decoder))) in DecodeMVE_MEM_pre()
6732 return DecodeMVE_MEM_pre(Inst, Val, Address, Decoder, in DecodeMVE_MEM_1_pre()
6742 return DecodeMVE_MEM_pre(Inst, Val, Address, Decoder, in DecodeMVE_MEM_2_pre()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonDepDecoders.inc19 signedDecoder<6>(MI, tmp, Decoder);
24 signedDecoder<12>(MI, tmp, Decoder);
29 signedDecoder<13>(MI, tmp, Decoder);
34 signedDecoder<14>(MI, tmp, Decoder);
39 signedDecoder<3>(MI, tmp, Decoder);
44 signedDecoder<4>(MI, tmp, Decoder);
49 signedDecoder<5>(MI, tmp, Decoder);
54 signedDecoder<6>(MI, tmp, Decoder);
59 signedDecoder<7>(MI, tmp, Decoder);
64 signedDecoder<9>(MI, tmp, Decoder);
[all …]
/llvm-project-15.0.7/llvm/lib/Target/RISCV/Disassembler/
H A DRISCVDisassembler.cpp65 Decoder->getSubtargetInfo().getFeatureBits(); in DecodeGPRRegisterClass()
194 static_cast<const RISCVDisassembler *>(Decoder); in DecodeVRM2RegisterClass()
214 static_cast<const RISCVDisassembler *>(Decoder); in DecodeVRM4RegisterClass()
234 static_cast<const RISCVDisassembler *>(Decoder); in DecodeVRM8RegisterClass()
272 DecodeGPRRegisterClass(Inst, 2, Address, Decoder); in addImplySP()
285 addImplySP(Inst, Address, Decoder); in decodeUImmOperand()
304 addImplySP(Inst, Address, Decoder); in decodeSImmOperand()
388 DecodeGPRRegisterClass(Inst, 0, Address, Decoder); in decodeRVCInstrRdSImm()
400 DecodeGPRRegisterClass(Inst, 0, Address, Decoder); in decodeRVCInstrRdRs1UImm()
415 DecodeGPRRegisterClass(Inst, Rd, Address, Decoder); in decodeRVCInstrRdRs2()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp386 status = DecodeRD(MI, rd, Address, Decoder); in DecodeMem()
409 status = DecodeRD(MI, rd, Address, Decoder); in DecodeMem()
418 return DecodeMem(Inst, insn, Address, Decoder, true, in DecodeLoadInt()
425 return DecodeMem(Inst, insn, Address, Decoder, true, in DecodeLoadIntPair()
431 return DecodeMem(Inst, insn, Address, Decoder, true, in DecodeLoadFP()
437 return DecodeMem(Inst, insn, Address, Decoder, true, in DecodeLoadDFP()
443 return DecodeMem(Inst, insn, Address, Decoder, true, in DecodeLoadQFP()
449 return DecodeMem(Inst, insn, Address, Decoder, true, in DecodeLoadCP()
456 return DecodeMem(Inst, insn, Address, Decoder, true, in DecodeLoadCPPair()
463 return DecodeMem(Inst, insn, Address, Decoder, false, in DecodeStoreInt()
[all …]
/llvm-project-15.0.7/llvm/tools/llvm-readobj/
H A DARMWinEHPrinter.cpp118 const Decoder::RingEntry Decoder::Ring[] = {
149 const Decoder::RingEntry Decoder::Ring64[] = {
150 { 0xe0, 0x00, 1, &Decoder::opcode_alloc_s },
154 { 0xf8, 0xc0, 2, &Decoder::opcode_alloc_m },
164 { 0xff, 0xe0, 4, &Decoder::opcode_alloc_l },
165 { 0xff, 0xe1, 1, &Decoder::opcode_setfp },
166 { 0xff, 0xe2, 2, &Decoder::opcode_addfp },
167 { 0xff, 0xe3, 1, &Decoder::opcode_nop },
168 { 0xff, 0xe4, 1, &Decoder::opcode_end },
169 { 0xff, 0xe5, 1, &Decoder::opcode_end_c },
[all …]
H A DARMWinEHPrinter.h22 class Decoder {
33 bool (Decoder::*Routine)(const uint8_t *, unsigned &, unsigned, bool); member
180 Decoder(ScopedPrinter &SW, bool isAArch64) : SW(SW), in Decoder() function
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/Disassembler/
H A DSystemZDisassembler.cpp76 const MCDisassembler *Decoder) { in tryAddingSymbolicOperand() argument
117 const MCDisassembler *Decoder) { in DecodeADDR64BitRegisterClass() argument
265 Inst, Decoder)) in decodePCDBLOperand()
274 return decodePCDBLOperand<12>(Inst, Imm, Address, true, Decoder); in decodePC12DBLBranchOperand()
280 return decodePCDBLOperand<16>(Inst, Imm, Address, true, Decoder); in decodePC16DBLBranchOperand()
419 const MCDisassembler *Decoder) { in decodeBDXAddr64Disp12Operand() argument
425 const MCDisassembler *Decoder) { in decodeBDXAddr64Disp20Operand() argument
431 const MCDisassembler *Decoder) { in decodeBDLAddr64Disp12Len4Operand() argument
437 const MCDisassembler *Decoder) { in decodeBDLAddr64Disp12Len8Operand() argument
443 const MCDisassembler *Decoder) { in decodeBDRAddr64Disp12Operand() argument
[all …]
/llvm-project-15.0.7/llvm/lib/Target/VE/Disassembler/
H A DVEDisassembler.cpp378 status = DecodeSX(MI, sx, Address, Decoder); in DecodeMem()
388 status = DecodeSX(MI, sx, Address, Decoder); in DecodeMem()
402 status = DecodeSX(MI, sx, Address, Decoder); in DecodeMemAS()
407 status = DecodeAS(MI, insn, Address, Decoder); in DecodeMemAS()
412 status = DecodeSX(MI, sx, Address, Decoder); in DecodeMemAS()
475 status = DecodeSX(MI, sx, Address, Decoder); in DecodeCAS()
480 status = DecodeAS(MI, insn, Address, Decoder); in DecodeCAS()
486 status = DecodeSX(MI, sy, Address, Decoder); in DecodeCAS()
497 status = DecodeSX(MI, sx, Address, Decoder); in DecodeCAS()
619 return DecodeAS(MI, insn, Address, Decoder); in DecodeBranchCondition()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AVR/Disassembler/
H A DAVRDisassembler.cpp103 const MCDisassembler *Decoder);
139 if (DecodeGPR8RegisterClass(Inst, reg, Address, Decoder) == in decodeFIOARr()
151 if (DecodeGPR8RegisterClass(Inst, reg, Address, Decoder) == in decodeFIORdA()
179 if (DecodeGPR8RegisterClass(Inst, d, Address, Decoder) == in decodeFRd()
198 if (DecodeGPR8RegisterClass(Inst, d, Address, Decoder) == in decodeFFMULRdRr()
201 if (DecodeGPR8RegisterClass(Inst, r, Address, Decoder) == in decodeFFMULRdRr()
212 if (DecodeGPR8RegisterClass(Inst, r, Address, Decoder) == in decodeFMOVWRdRr()
215 if (DecodeGPR8RegisterClass(Inst, d, Address, Decoder) == in decodeFMOVWRdRr()
227 if (DecodeGPR8RegisterClass(Inst, d, Address, Decoder) == in decodeFWRdK()
230 if (DecodeGPR8RegisterClass(Inst, d, Address, Decoder) == in decodeFWRdK()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/M68k/Disassembler/
H A DM68kDisassembler.cpp51 const void *Decoder) { in DecodeDR32RegisterClass() argument
52 return DecodeRegisterClass(Inst, RegNo, Address, Decoder); in DecodeDR32RegisterClass()
57 const void *Decoder) { in DecodeDR16RegisterClass() argument
58 return DecodeRegisterClass(Inst, RegNo, Address, Decoder); in DecodeDR16RegisterClass()
63 const void *Decoder) { in DecodeDR8RegisterClass() argument
64 return DecodeRegisterClass(Inst, RegNo, Address, Decoder); in DecodeDR8RegisterClass()
69 const void *Decoder) { in DecodeAR32RegisterClass() argument
75 const void *Decoder) { in DecodeAR16RegisterClass() argument
81 const void *Decoder) { in DecodeXR32RegisterClass() argument
82 return DecodeRegisterClass(Inst, RegNo, Address, Decoder); in DecodeXR32RegisterClass()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/Disassembler/
H A DPPCDisassembler.cpp153 const MCDisassembler *Decoder) { in DecodeGPRC_NOR0RegisterClass() argument
171 const MCDisassembler *Decoder) { in DecodeG8RC_NOX0RegisterClass() argument
202 const MCDisassembler *Decoder) { in decodeUImmOperand() argument
211 const MCDisassembler *Decoder) { in decodeSImmOperand() argument
219 const MCDisassembler *Decoder) { in decodeImmZeroOperand() argument
237 const MCDisassembler *Decoder) { in decodeMemRIOperands() argument
337 return decodeImmZeroOperand(Inst, Base, Address, Decoder); in decodeMemRI34PCRelOperands()
357 const MCDisassembler *Decoder) { in decodeSPE8Operands() argument
373 const MCDisassembler *Decoder) { in decodeSPE4Operands() argument
389 const MCDisassembler *Decoder) { in decodeSPE2Operands() argument
[all …]
/llvm-project-15.0.7/llvm/lib/Target/ARC/Disassembler/
H A DARCDisassembler.cpp88 const MCDisassembler *Decoder = nullptr);
93 const MCDisassembler *Decoder = nullptr);
151 return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder); in DecodeGBR32ShortRegister()
183 return (nullptr != Decoder && Decoder->tryAddingSymbolicOperand( in DecodeSymbolicOperand()
239 DecodeGPR32RegisterClass(Inst, SrcC, Address, Decoder); in DecodeStLImmInstruction()
257 DecodeGPR32RegisterClass(Inst, DstA, Address, Decoder); in DecodeLdLImmInstruction()
270 DecodeGPR32RegisterClass(Inst, DstA, Address, Decoder); in DecodeLdRLImmInstruction()
272 DecodeGPR32RegisterClass(Inst, SrcB, Address, Decoder); in DecodeLdRLImmInstruction()
313 DecodeGPR32RegisterClass(Inst, DstB, Address, Decoder); in DecodeCCRU6Instruction()
326 DecodeGPR32RegisterClass(Inst, DstB, Address, Decoder); in DecodeSOPwithRU6()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Lanai/Disassembler/
H A DLanaiDisassembler.cpp48 const MCDisassembler *Decoder);
52 const MCDisassembler *Decoder);
56 const MCDisassembler *Decoder);
60 const MCDisassembler *Decoder);
63 const MCDisassembler *Decoder);
71 const MCDisassembler *Decoder);
202 const MCDisassembler *Decoder) { in decodeSplsValue() argument
216 const MCDisassembler *Decoder) { in tryAddingSymbolicOperand() argument
222 const MCDisassembler *Decoder) { in decodeBranch() argument
224 Decoder)) in decodeBranch()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp82 return *static_cast<HexagonDisassembler const *>(Decoder); in disassembler()
86 const MCDisassembler *Decoder) { in signedDecoder() argument
87 HexagonDisassembler const &Disassembler = disassembler(Decoder); in signedDecoder()
103 const MCDisassembler *Decoder);
106 const MCDisassembler *Decoder);
112 const MCDisassembler *Decoder);
146 const MCDisassembler *Decoder);
697 const MCDisassembler *Decoder) { in DecodeCtrRegs64RegisterClass() argument
757 signedDecoder<32>(MI, tmp, Decoder); in s32_0ImmDecoder()
836 const MCDisassembler *Decoder) { in DecodeSysRegs64RegisterClass() argument
[all …]
/llvm-project-15.0.7/llvm/lib/Target/CSKY/Disassembler/
H A DCSKYDisassembler.cpp216 Decoder->getSubtargetInfo().getFeatureBits(); in DecodeGPRPairRegisterClass()
229 const MCDisassembler *Decoder) { in decodeUImmOperand() argument
238 const MCDisassembler *Decoder) { in decodeOImmOperand() argument
245 const MCDisassembler *Decoder) { in decodeLRW16Imm8() argument
278 const MCDisassembler *Decoder) { in DecodeRegSeqOperand() argument
284 if (DecodeGPRRegisterClass(Inst, Ry, Address, Decoder) == in DecodeRegSeqOperand()
301 if (DecodesFPR32RegisterClass(Inst, Ry, Address, Decoder) == in DecodeRegSeqOperandF1()
318 if (DecodesFPR64RegisterClass(Inst, Ry, Address, Decoder) == in DecodeRegSeqOperandD1()
335 if (DecodeFPR32RegisterClass(Inst, Ry, Address, Decoder) == in DecodeRegSeqOperandF2()
352 if (DecodeFPR64RegisterClass(Inst, Ry, Address, Decoder) == in DecodeRegSeqOperandD2()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/LoongArch/Disassembler/
H A DLoongArchDisassembler.cpp60 const MCDisassembler *Decoder) { in DecodeGPRRegisterClass() argument
69 const MCDisassembler *Decoder) { in DecodeFPR32RegisterClass() argument
78 const MCDisassembler *Decoder) { in DecodeFPR64RegisterClass() argument
87 const MCDisassembler *Decoder) { in DecodeCFRRegisterClass() argument
96 const MCDisassembler *Decoder) { in DecodeFCSRRegisterClass() argument
106 const MCDisassembler *Decoder) { in decodeUImmOperand() argument
115 const MCDisassembler *Decoder) { in decodeSImmOperand() argument
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp80 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeSoppBrTarget()
94 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeSMEMOffset()
106 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeBoolReg()
159 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in DECODE_OPERAND_REG()
166 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeOperand_VSrcV216()
173 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeOperand_VSrcV232()
180 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeOperand_VS_16()
187 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeOperand_VS_32()
194 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeOperand_AReg_64()
277 const MCDisassembler *Decoder) { in decodeOperand_VS_16_Deferred() argument
[all …]
/llvm-project-15.0.7/llvm/lib/DebugInfo/GSYM/
H A DObjectFileTransformer.cpp51 DataExtractor Decoder(BuildIDData, Obj.makeTriple().isLittleEndian(), 8); in getUUID() local
53 const uint32_t NameSize = Decoder.getU32(&Offset); in getUUID()
54 const uint32_t PayloadSize = Decoder.getU32(&Offset); in getUUID()
55 const uint32_t PayloadType = Decoder.getU32(&Offset); in getUUID()
56 StringRef Name(Decoder.getFixedLengthString(&Offset, NameSize)); in getUUID()
59 StringRef UUIDBytes(Decoder.getBytes(&Offset, PayloadSize)); in getUUID()
/llvm-project-15.0.7/llvm/lib/Target/MSP430/Disassembler/
H A DMSP430Disassembler.cpp75 const MCDisassembler *Decoder) { in DecodeGR8RegisterClass() argument
93 const MCDisassembler *Decoder) { in DecodeGR16RegisterClass() argument
103 const MCDisassembler *Decoder);
107 const MCDisassembler *Decoder);
112 const MCDisassembler *Decoder) { in DecodeCGImm() argument
130 const MCDisassembler *Decoder) { in DecodeMemOperand() argument
134 if (DecodeGR16RegisterClass(MI, Reg, Address, Decoder) != in DecodeMemOperand()
/llvm-project-15.0.7/llvm/utils/TableGen/
H A DDecoderEmitter.cpp67 std::string Decoder; member
1021 OS << Decoder; in emitDecoderFunction()
1147 const std::string &Decoder = OpInfo.Decoder; in emitBinaryParser() local
1171 if (Decoder != "") { in emitBinaryParser()
1211 SmallString<256> Decoder; in getDecoderIndex() local
1214 raw_svector_ostream S(Decoder); in getDecoderIndex()
1828 std::string Decoder; in findOperandDecoderMethod() local
1835 if (!Decoder.empty()) in findOperandDecoderMethod()
1836 return Decoder; in findOperandDecoderMethod()
1849 return Decoder; in findOperandDecoderMethod()
[all …]
/llvm-project-15.0.7/llvm/test/TableGen/
H A DVarLenDecoder.td62 // CHECK-NEXT: if (DecodeRegClassRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) …
64 // CHECK-NEXT: if (DecodeRegClassRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) …
70 // CHECK-NEXT: if (DecodeRegClassRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) …
72 // CHECK-NEXT: if (DecodeRegClassRegisterClass(MI, tmp, Address, Decoder) == MCDisassembler::Fail) …
H A Dtrydecode-emission2.td43 // CHECK: if (DecodeInstB(MI, insn, Address, Decoder) == MCDisassembler::Fail) { DecodeComplete = f…
44 // CHECK: if (DecodeInstA(MI, insn, Address, Decoder) == MCDisassembler::Fail) { DecodeComplete = f…

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