|
Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4 |
|
| #
52d509f3 |
| 22-May-2022 |
Min-Yih Hsu <[email protected]> |
[M68k][Disassembler] Cleanup unused variables. NFC
- Remove `MaxInstrWord` in M68kDisassembler.cpp.
- Remove `MCII` field in `M68kDisassembler` class.
NFC.
|
| #
df25f0d5 |
| 19-May-2022 |
Sheng <[email protected]> |
[M68k] Fix a bug in disassembler
Sorry for my reckless patch. In some cases `RoundUp` is less than
the bit width of APInt. We need to check this before we do zext.
|
| #
017c9827 |
| 19-May-2022 |
Sheng <[email protected]> |
[NFC][M68k] Replace `APInt::zextOrSelf` with `APInt::zext`
This is a follow up to D125558
|
| #
a5d618b3 |
| 19-May-2022 |
Sheng <[email protected]> |
[M68k][Disassembler] Fix decoding conflict
This diff fixes decoding conflict between these pair of instructions:
ADD(16|32)dd / ADD(16|32)dr
SUB(16|32)dd / SUB(16|32)dr
AND(16|32)dd / AND(16|32)dr
[M68k][Disassembler] Fix decoding conflict
This diff fixes decoding conflict between these pair of instructions:
ADD(16|32)dd / ADD(16|32)dr
SUB(16|32)dd / SUB(16|32)dr
AND(16|32)dd / AND(16|32)dr
OR(16|32)dd / OR(16|32)dr
Reviewed By: ricky26
Differential Revision: https://reviews.llvm.org/D125861
show more ...
|
| #
cf0b6df6 |
| 15-May-2022 |
Sheng <[email protected]> |
[M68k][Disassembler] Adopt the new variable length decoder
This is an example usage of D120958.
After these patches are landed, we can strip off the codebeads officially.
Reviewed By: myhsu
Diffe
[M68k][Disassembler] Adopt the new variable length decoder
This is an example usage of D120958.
After these patches are landed, we can strip off the codebeads officially.
Reviewed By: myhsu
Differential Revision: https://reviews.llvm.org/D120960
show more ...
|
|
Revision tags: llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2 |
|
| #
6bf22ae4 |
| 04-Jan-2022 |
Jim Lin <[email protected]> |
[M68k][NFC] Fix file header
Let all file header have the same style. NFC.
|
|
Revision tags: llvmorg-13.0.1-rc1 |
|
| #
89b57061 |
| 08-Oct-2021 |
Reid Kleckner <[email protected]> |
Move TargetRegistry.(h|cpp) from Support to MC
This moves the registry higher in the LLVM library dependency stack.
Every client of the target registry needs to link against MC anyway to
actually us
Move TargetRegistry.(h|cpp) from Support to MC
This moves the registry higher in the LLVM library dependency stack.
Every client of the target registry needs to link against MC anyway to
actually use the target, so we might as well move this out of Support.
This allows us to ensure that Support doesn't have includes from MC/*.
Differential Revision: https://reviews.llvm.org/D111454
show more ...
|
| #
e1e3b6ee |
| 29-Sep-2021 |
Ricky Taylor <[email protected]> |
[M68k] Avoid UB in disassembler
When reading 32 bits a 32-bit shift would be executed.
This is undefined behaviour, but in this case we can just replace the
entire scratch value to avoid it.
Diffe
[M68k] Avoid UB in disassembler
When reading 32 bits a 32-bit shift would be executed.
This is undefined behaviour, but in this case we can just replace the
entire scratch value to avoid it.
Differential Revision: https://reviews.llvm.org/D110769
show more ...
|
|
Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1 |
|
| #
6f4ed8c0 |
| 22-Apr-2021 |
Min-Yih Hsu <[email protected]> |
[M68k][Disassembler][NFC] Decorate dump methods with LLVM_DUMP_METHOD
And guard them with proper macro conditions. NFC.
|
|
Revision tags: llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4 |
|
| #
22211857 |
| 11-Mar-2021 |
Ricky Taylor <[email protected]> |
[M68k] Implement Disassembler
This is an implementation of a disassembler for M68k.
Differential Revision: https://reviews.llvm.org/D98540
|