Searched refs:AndRHS (Results 1 – 11 of 11) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Transforms/Scalar/ |
| H A D | GuardWidening.cpp | 586 Value *AndLHS, *AndRHS; in parseRangeChecks() local 587 if (match(CheckCond, m_And(m_Value(AndLHS), m_Value(AndRHS)))) in parseRangeChecks() 589 parseRangeChecks(AndRHS, Checks); in parseRangeChecks()
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| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSimplifyDemanded.cpp | 316 ConstantInt *AndRHS, *XorRHS; in SimplifyDemandedUseBits() local 319 match(LHSInst->getOperand(1), m_ConstantInt(AndRHS)) && in SimplifyDemandedUseBits() 323 Constant *AndC = ConstantInt::get(VTy, NewMask & AndRHS->getValue()); in SimplifyDemandedUseBits()
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| H A D | InstCombineSelect.cpp | 141 const APInt *AndRHS; in foldSelectICmpAnd() local 142 if (!match(V, m_And(m_Value(), m_Power2(AndRHS)))) in foldSelectICmpAnd() 145 AndMask = *AndRHS; in foldSelectICmpAnd()
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | BranchProbabilityInfo.cpp | 999 if (ConstantInt *AndRHS = GetConstantInt(LHS->getOperand(1))) in calcZeroHeuristics() local 1000 if (AndRHS->getValue().isPowerOf2()) in calcZeroHeuristics()
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| /llvm-project-15.0.7/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.cpp | 3447 SDValue AndRHS = LHS->getOperand(1); in tryBFE() local 3451 std::swap(AndLHS, AndRHS); in tryBFE() 3454 ConstantSDNode *MaskCnst = dyn_cast<ConstantSDNode>(AndRHS); in tryBFE()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 2288 const Value *AndRHS = AI->getOperand(1); in emitCompareAndBranch() local 2292 std::swap(AndLHS, AndRHS); in emitCompareAndBranch() 2294 if (const auto *C = dyn_cast<ConstantInt>(AndRHS)) in emitCompareAndBranch()
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1471 } else if (auto *AndRHS = dyn_cast<ConstantSDNode>(Op1)) { in LowerAndToBTST() local 1472 uint64_t AndRHSVal = AndRHS->getZExtValue(); in LowerAndToBTST()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 4754 if (auto *AndRHS = dyn_cast<ConstantSDNode>(N0.getOperand(1))) { in SimplifySetCC() local 4759 unsigned ShCt = AndRHS->getAPIntValue().logBase2(); in SimplifySetCC() 4760 if (AndRHS->getAPIntValue().isPowerOf2() && in SimplifySetCC() 4766 } else if (Cond == ISD::SETEQ && C1 == AndRHS->getAPIntValue()) { in SimplifySetCC() 4786 if (auto *AndRHS = dyn_cast<ConstantSDNode>(N0.getOperand(1))) { in SimplifySetCC() local 4787 const APInt &AndRHSC = AndRHS->getAPIntValue(); in SimplifySetCC()
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| H A D | SelectionDAG.cpp | 9143 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) { in getNode() 9147 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1) in getNode()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 4660 Register AndRHS = MI.getOperand(2).getReg(); in matchNarrowBinopFeedingAnd() local 4691 auto Cst = getIConstantVRegValWithLookThrough(AndRHS, MRI); in matchNarrowBinopFeedingAnd()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 24031 ConstantSDNode *AndRHS = cast<ConstantSDNode>(Op1); in LowerAndToBT() local 24032 uint64_t AndRHSVal = AndRHS->getZExtValue(); in LowerAndToBT()
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