| /linux-6.15/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_nbio.h | 63 u32 (*get_pcie_data_offset)(struct amdgpu_device *adev);
67 u32 (*get_rev_id)(struct amdgpu_device *adev);
69 u32 (*get_memsize)(struct amdgpu_device *adev);
76 void (*gc_doorbell_init)(struct amdgpu_device *adev);
81 void (*ih_doorbell_range)(struct amdgpu_device *adev,
91 void (*ih_control)(struct amdgpu_device *adev);
92 void (*init_registers)(struct amdgpu_device *adev);
94 void (*enable_aspm)(struct amdgpu_device *adev,
96 void (*program_aspm)(struct amdgpu_device *adev);
100 u32 (*get_rom_offset)(struct amdgpu_device *adev);
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| H A D | amdgpu_amdkfd.h | 49 struct amdgpu_device;
65 struct amdgpu_device *adev;
159 void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev,
165 void amdgpu_amdkfd_unlock_kfd(struct amdgpu_device *adev);
166 int amdgpu_amdkfd_submit_ib(struct amdgpu_device *adev,
175 int amdgpu_amdkfd_pre_reset(struct amdgpu_device *adev,
178 int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev);
180 void amdgpu_amdkfd_gpu_reset(struct amdgpu_device *adev);
253 struct amdgpu_device **dmabuf_adev,
344 bool amdgpu_amdkfd_is_fed(struct amdgpu_device *adev);
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| H A D | amdgpu_atombios.h | 133 amdgpu_atombios_lookup_gpio(struct amdgpu_device *adev,
138 void amdgpu_atombios_i2c_init(struct amdgpu_device *adev);
145 int amdgpu_atombios_get_clock_info(struct amdgpu_device *adev);
147 int amdgpu_atombios_get_gfx_info(struct amdgpu_device *adev);
149 int amdgpu_atombios_get_vram_width(struct amdgpu_device *adev);
171 amdgpu_atombios_is_voltage_gpio(struct amdgpu_device *adev,
188 int amdgpu_atombios_get_svi2_info(struct amdgpu_device *adev,
209 int amdgpu_atombios_get_data_table(struct amdgpu_device *adev,
216 void amdgpu_atombios_fini(struct amdgpu_device *adev);
217 int amdgpu_atombios_init(struct amdgpu_device *adev);
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| H A D | amdgpu_virt.h | 89 int (*req_init_data)(struct amdgpu_device *adev);
90 int (*reset_gpu)(struct amdgpu_device *adev);
91 void (*ready_to_reset)(struct amdgpu_device *adev);
92 int (*wait_reset)(struct amdgpu_device *adev);
95 void (*ras_poison_handler)(struct amdgpu_device *adev,
97 bool (*rcvd_ras_intr)(struct amdgpu_device *adev);
98 int (*req_ras_err_count)(struct amdgpu_device *adev);
383 int amdgpu_virt_reset_gpu(struct amdgpu_device *adev);
394 void amdgpu_virt_init(struct amdgpu_device *adev);
405 void amdgpu_sriov_wreg(struct amdgpu_device *adev,
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| H A D | amdgpu_ras.h | 518 struct amdgpu_device *adev;
615 typedef int (*ras_ih_cb)(struct amdgpu_device *adev,
641 struct amdgpu_device *adev;
719 int (*ras_error_inject)(struct amdgpu_device *adev,
747 void amdgpu_ras_resume(struct amdgpu_device *adev);
748 void amdgpu_ras_suspend(struct amdgpu_device *adev);
831 int amdgpu_ras_init(struct amdgpu_device *adev);
832 int amdgpu_ras_late_init(struct amdgpu_device *adev);
833 int amdgpu_ras_fini(struct amdgpu_device *adev);
834 int amdgpu_ras_pre_fini(struct amdgpu_device *adev);
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| H A D | amdgpu_amdkfd_gfx_v9.h | 35 int kgd_gfx_v9_hiq_mqd_load(struct amdgpu_device *adev, void *mqd,
38 int kgd_gfx_v9_hqd_dump(struct amdgpu_device *adev,
41 bool kgd_gfx_v9_hqd_is_occupied(struct amdgpu_device *adev,
44 int kgd_gfx_v9_hqd_destroy(struct amdgpu_device *adev, void *mqd,
48 int kgd_gfx_v9_wave_control_execute(struct amdgpu_device *adev,
55 void kgd_gfx_v9_get_cu_occupancy(struct amdgpu_device *adev,
63 uint64_t kgd_gfx_v9_get_queue_mask(struct amdgpu_device *adev,
66 void kgd_gfx_v9_set_wave_launch_stall(struct amdgpu_device *adev,
97 void kgd_gfx_v9_get_iq_wait_times(struct amdgpu_device *adev,
106 uint64_t kgd_gfx_v9_hqd_get_pq_addr(struct amdgpu_device *adev,
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| H A D | amdgpu_xgmi.h | 42 struct amdgpu_device *hi_req_gpu;
107 int amdgpu_xgmi_add_device(struct amdgpu_device *adev);
108 int amdgpu_xgmi_remove_device(struct amdgpu_device *adev);
110 int amdgpu_xgmi_get_hops_count(struct amdgpu_device *adev, struct amdgpu_device *peer_adev);
111 int amdgpu_xgmi_get_bandwidth(struct amdgpu_device *adev, struct amdgpu_device *peer_adev,
115 struct amdgpu_device *peer_adev);
118 bool amdgpu_xgmi_same_hive(struct amdgpu_device *adev,
119 struct amdgpu_device *bo_adev);
120 int amdgpu_xgmi_ras_sw_init(struct amdgpu_device *adev);
121 int amdgpu_xgmi_reset_on_init(struct amdgpu_device *adev);
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| H A D | amdgpu_gmc.h | 151 void (*set_prt)(struct amdgpu_device *adev, bool enable);
158 void (*get_vm_pte)(struct amdgpu_device *adev,
162 void (*override_vm_pte_flags)(struct amdgpu_device *dev,
171 struct amdgpu_device *adev);
175 bool (*need_reset_on_init)(struct amdgpu_device *adev);
393 int amdgpu_gmc_pdb0_alloc(struct amdgpu_device *adev);
416 int amdgpu_gmc_ras_sw_init(struct amdgpu_device *adev);
418 void amdgpu_gmc_ras_fini(struct amdgpu_device *adev);
439 void amdgpu_gmc_init_pdb0(struct amdgpu_device *adev);
443 int amdgpu_gmc_sysfs_init(struct amdgpu_device *adev);
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| H A D | amdgpu.h | 125 struct amdgpu_device *adev;
321 struct amdgpu_device;
397 struct amdgpu_device *adev;
414 bool amdgpu_get_bios(struct amdgpu_device *adev);
415 bool amdgpu_read_bios(struct amdgpu_device *adev);
479 struct amdgpu_device *adev;
606 int (*reset)(struct amdgpu_device *adev);
609 u32 (*get_xclk)(struct amdgpu_device *adev);
861 struct amdgpu_device { struct
1474 struct amdgpu_device *peer_adev);
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| H A D | amdgpu_gfx.h | 276 int (*rlc_gc_fed_irq)(struct amdgpu_device *adev,
305 void (*init_spm_golden)(struct amdgpu_device *adev);
307 int (*get_gfx_shadow_info)(struct amdgpu_device *adev,
310 (*query_partition_mode)(struct amdgpu_device *adev);
314 int (*get_xccs_per_xcp)(struct amdgpu_device *adev);
357 struct amdgpu_device *adev;
529 int amdgpu_gfx_kiq_init(struct amdgpu_device *adev,
532 int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
561 void amdgpu_gfx_ras_fini(struct amdgpu_device *adev);
573 int amdgpu_gfx_get_num_kcq(struct amdgpu_device *adev);
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| H A D | amdgpu_atomfirmware.h | 30 bool amdgpu_atomfirmware_gpu_virtualization_supported(struct amdgpu_device *adev);
31 void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev);
32 int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev);
33 int amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,
35 int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev);
36 int amdgpu_atomfirmware_get_gfx_info(struct amdgpu_device *adev);
37 bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev);
38 bool amdgpu_atomfirmware_sram_ecc_supported(struct amdgpu_device *adev);
40 bool amdgpu_atomfirmware_mem_training_supported(struct amdgpu_device *adev);
42 int amdgpu_atomfirmware_get_fw_reserved_fb_size(struct amdgpu_device *adev);
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| H A D | amdgpu_umc.h | 86 void (*err_cnt_init)(struct amdgpu_device *adev);
92 bool (*check_ecc_err_status)(struct amdgpu_device *adev,
94 int (*update_ecc_status)(struct amdgpu_device *adev,
96 int (*convert_ras_err_addr)(struct amdgpu_device *adev,
106 void (*init_registers)(struct amdgpu_device *adev);
135 int amdgpu_umc_ras_sw_init(struct amdgpu_device *adev);
137 int amdgpu_umc_poison_handler(struct amdgpu_device *adev,
157 int amdgpu_umc_loop_channels(struct amdgpu_device *adev,
162 int amdgpu_umc_logs_ecc_err(struct amdgpu_device *adev,
167 int amdgpu_umc_pages_in_a_row(struct amdgpu_device *adev,
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| H A D | amdgpu_df.h | 34 void (*sw_init)(struct amdgpu_device *adev);
35 void (*sw_fini)(struct amdgpu_device *adev);
36 void (*hw_init)(struct amdgpu_device *adev);
37 void (*enable_broadcast_mode)(struct amdgpu_device *adev,
39 u32 (*get_fb_channel_number)(struct amdgpu_device *adev);
40 u32 (*get_hbm_channel_number)(struct amdgpu_device *adev);
43 void (*get_clockgating_state)(struct amdgpu_device *adev,
45 void (*enable_ecc_force_par_wr_rmw)(struct amdgpu_device *adev,
47 int (*pmc_start)(struct amdgpu_device *adev, uint64_t config,
49 int (*pmc_stop)(struct amdgpu_device *adev, uint64_t config,
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| H A D | amdgpu_irq.h | 39 struct amdgpu_device;
76 int (*process)(struct amdgpu_device *adev,
123 void amdgpu_irq_disable_all(struct amdgpu_device *adev);
125 int amdgpu_irq_init(struct amdgpu_device *adev);
126 void amdgpu_irq_fini_sw(struct amdgpu_device *adev);
127 void amdgpu_irq_fini_hw(struct amdgpu_device *adev);
128 int amdgpu_irq_add_id(struct amdgpu_device *adev,
131 void amdgpu_irq_dispatch(struct amdgpu_device *adev,
133 void amdgpu_irq_delegate(struct amdgpu_device *adev,
146 int amdgpu_irq_add_domain(struct amdgpu_device *adev);
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| H A D | amdgpu_gfxhub.h | 27 u64 (*get_fb_location)(struct amdgpu_device *adev);
28 u64 (*get_mc_fb_offset)(struct amdgpu_device *adev);
29 void (*setup_vm_pt_regs)(struct amdgpu_device *adev, uint32_t vmid,
31 int (*gart_enable)(struct amdgpu_device *adev);
33 void (*gart_disable)(struct amdgpu_device *adev);
35 void (*init)(struct amdgpu_device *adev);
36 int (*get_xgmi_info)(struct amdgpu_device *adev);
37 void (*utcl2_harvest)(struct amdgpu_device *adev);
38 void (*mode2_save_regs)(struct amdgpu_device *adev);
39 void (*mode2_restore_regs)(struct amdgpu_device *adev);
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| H A D | amdgpu_mes.h | 66 struct amdgpu_device *adev;
404 int amdgpu_mes_init(struct amdgpu_device *adev);
405 void amdgpu_mes_fini(struct amdgpu_device *adev);
416 int amdgpu_mes_suspend(struct amdgpu_device *adev);
417 int amdgpu_mes_resume(struct amdgpu_device *adev);
427 int amdgpu_mes_map_legacy_queue(struct amdgpu_device *adev,
429 int amdgpu_mes_unmap_legacy_queue(struct amdgpu_device *adev,
439 int amdgpu_mes_wreg(struct amdgpu_device *adev,
458 void amdgpu_mes_remove_ring(struct amdgpu_device *adev,
467 int amdgpu_mes_ctx_map_meta_data(struct amdgpu_device *adev,
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| H A D | amdgpu_mca.h | 131 int (*mca_set_debug_mode)(struct amdgpu_device *adev, bool enable);
140 void amdgpu_mca_query_correctable_error_count(struct amdgpu_device *adev,
144 void amdgpu_mca_query_uncorrectable_error_count(struct amdgpu_device *adev,
148 void amdgpu_mca_reset_error_count(struct amdgpu_device *adev,
151 void amdgpu_mca_query_ras_error_count(struct amdgpu_device *adev,
154 int amdgpu_mca_mp0_ras_sw_init(struct amdgpu_device *adev);
155 int amdgpu_mca_mp1_ras_sw_init(struct amdgpu_device *adev);
156 int amdgpu_mca_mpio_ras_sw_init(struct amdgpu_device *adev);
159 int amdgpu_mca_init(struct amdgpu_device *adev);
160 void amdgpu_mca_fini(struct amdgpu_device *adev);
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| H A D | amdgpu_gart.h | 32 struct amdgpu_device;
54 int amdgpu_gart_table_ram_alloc(struct amdgpu_device *adev);
55 void amdgpu_gart_table_ram_free(struct amdgpu_device *adev);
56 int amdgpu_gart_table_vram_alloc(struct amdgpu_device *adev);
57 void amdgpu_gart_table_vram_free(struct amdgpu_device *adev);
58 int amdgpu_gart_init(struct amdgpu_device *adev);
59 void amdgpu_gart_dummy_page_fini(struct amdgpu_device *adev);
60 void amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
62 void amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
65 void amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
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| H A D | amdgpu_mmhub.h | 52 u64 (*get_fb_location)(struct amdgpu_device *adev);
53 u64 (*get_mc_fb_offset)(struct amdgpu_device *adev);
54 void (*init)(struct amdgpu_device *adev);
55 int (*gart_enable)(struct amdgpu_device *adev);
56 void (*set_fault_enable_default)(struct amdgpu_device *adev,
58 void (*gart_disable)(struct amdgpu_device *adev);
59 int (*set_clockgating)(struct amdgpu_device *adev,
61 void (*get_clockgating)(struct amdgpu_device *adev, u64 *flags);
62 void (*setup_vm_pt_regs)(struct amdgpu_device *adev, uint32_t vmid,
64 void (*update_power_gating)(struct amdgpu_device *adev,
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| H A D | mxgpu_nv.c | 36 static void xgpu_nv_mailbox_send_ack(struct amdgpu_device *adev) in xgpu_nv_mailbox_send_ack()
61 static int xgpu_nv_mailbox_rcv_msg(struct amdgpu_device *adev, in xgpu_nv_mailbox_rcv_msg()
78 static uint8_t xgpu_nv_peek_ack(struct amdgpu_device *adev) in xgpu_nv_peek_ack()
83 static int xgpu_nv_poll_ack(struct amdgpu_device *adev) in xgpu_nv_poll_ack()
233 static int xgpu_nv_request_reset(struct amdgpu_device *adev) in xgpu_nv_request_reset()
273 static int xgpu_nv_mailbox_ack_irq(struct amdgpu_device *adev, in xgpu_nv_mailbox_ack_irq()
303 static int xgpu_nv_wait_reset(struct amdgpu_device *adev) in xgpu_nv_wait_reset()
322 struct amdgpu_device *adev = container_of(virt, struct amdgpu_device, virt); in xgpu_nv_mailbox_flr_work()
408 int xgpu_nv_mailbox_add_irq_id(struct amdgpu_device *adev) in xgpu_nv_mailbox_add_irq_id()
425 int xgpu_nv_mailbox_get_irq(struct amdgpu_device *adev) in xgpu_nv_mailbox_get_irq()
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| H A D | amdgpu_amdkfd_gfx_v10.h | 23 uint32_t kgd_gfx_v10_enable_debug_trap(struct amdgpu_device *adev,
26 uint32_t kgd_gfx_v10_disable_debug_trap(struct amdgpu_device *adev,
29 int kgd_gfx_v10_validate_trap_override_request(struct amdgpu_device *adev,
32 uint32_t kgd_gfx_v10_set_wave_launch_trap_override(struct amdgpu_device *adev,
39 uint32_t kgd_gfx_v10_set_wave_launch_mode(struct amdgpu_device *adev,
42 uint32_t kgd_gfx_v10_set_address_watch(struct amdgpu_device *adev,
49 uint32_t kgd_gfx_v10_clear_address_watch(struct amdgpu_device *adev,
51 void kgd_gfx_v10_get_iq_wait_times(struct amdgpu_device *adev,
60 uint64_t kgd_gfx_v10_hqd_get_pq_addr(struct amdgpu_device *adev,
64 uint64_t kgd_gfx_v10_hqd_reset(struct amdgpu_device *adev,
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| H A D | mxgpu_ai.c | 37 static void xgpu_ai_mailbox_send_ack(struct amdgpu_device *adev) in xgpu_ai_mailbox_send_ack()
63 static int xgpu_ai_mailbox_rcv_msg(struct amdgpu_device *adev, in xgpu_ai_mailbox_rcv_msg()
78 static uint8_t xgpu_ai_peek_ack(struct amdgpu_device *adev) { in xgpu_ai_peek_ack()
82 static int xgpu_ai_poll_ack(struct amdgpu_device *adev) in xgpu_ai_poll_ack()
195 static int xgpu_ai_request_reset(struct amdgpu_device *adev) in xgpu_ai_request_reset()
230 static int xgpu_ai_mailbox_ack_irq(struct amdgpu_device *adev, in xgpu_ai_mailbox_ack_irq()
257 static int xgpu_ai_wait_reset(struct amdgpu_device *adev) in xgpu_ai_wait_reset()
276 struct amdgpu_device *adev = container_of(virt, struct amdgpu_device, virt); in xgpu_ai_mailbox_flr_work()
359 int xgpu_ai_mailbox_add_irq_id(struct amdgpu_device *adev) in xgpu_ai_mailbox_add_irq_id()
376 int xgpu_ai_mailbox_get_irq(struct amdgpu_device *adev) in xgpu_ai_mailbox_get_irq()
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| /linux-6.15/drivers/gpu/drm/amd/pm/inc/ |
| H A D | amdgpu_dpm.h | 305 struct amdgpu_device *adev;
416 int amdgpu_dpm_baco_reset(struct amdgpu_device *adev);
418 int amdgpu_dpm_mode2_reset(struct amdgpu_device *adev);
424 int amdgpu_dpm_mode1_reset(struct amdgpu_device *adev);
426 int amdgpu_dpm_set_mp1_state(struct amdgpu_device *adev,
433 int amdgpu_dpm_baco_exit(struct amdgpu_device *adev);
435 int amdgpu_dpm_baco_enter(struct amdgpu_device *adev);
479 int amdgpu_dpm_get_ecc_info(struct amdgpu_device *adev,
516 int amdgpu_dpm_get_sclk_od(struct amdgpu_device *adev);
518 int amdgpu_dpm_get_mclk_od(struct amdgpu_device *adev);
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| /linux-6.15/drivers/gpu/drm/amd/include/ |
| H A D | kgd_kfd_interface.h | 38 struct amdgpu_device;
245 int (*hqd_dump)(struct amdgpu_device *adev,
249 int (*hqd_sdma_dump)(struct amdgpu_device *adev,
253 bool (*hqd_is_occupied)(struct amdgpu_device *adev,
257 int (*hqd_destroy)(struct amdgpu_device *adev, void *mqd,
267 int (*wave_control_execute)(struct amdgpu_device *adev,
285 uint32_t (*enable_debug_trap)(struct amdgpu_device *adev,
313 void (*get_iq_wait_times)(struct amdgpu_device *adev,
322 void (*get_cu_occupancy)(struct amdgpu_device *adev,
328 uint64_t (*hqd_get_pq_addr)(struct amdgpu_device *adev,
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| /linux-6.15/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_irq.h | 42 int amdgpu_dm_irq_init(struct amdgpu_device *adev);
50 void amdgpu_dm_irq_fini(struct amdgpu_device *adev);
66 void *amdgpu_dm_irq_register_interrupt(struct amdgpu_device *adev,
79 void amdgpu_dm_irq_unregister_interrupt(struct amdgpu_device *adev,
83 void amdgpu_dm_set_irq_funcs(struct amdgpu_device *adev);
85 void amdgpu_dm_outbox_init(struct amdgpu_device *adev);
86 void amdgpu_dm_hpd_init(struct amdgpu_device *adev);
87 void amdgpu_dm_hpd_fini(struct amdgpu_device *adev);
93 void amdgpu_dm_irq_suspend(struct amdgpu_device *adev);
100 void amdgpu_dm_irq_resume_early(struct amdgpu_device *adev);
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