125 	struct amdgpu_device		*adev;
321 struct amdgpu_device;
366 void amdgpu_device_ip_get_clockgating_state(struct amdgpu_device *adev,
368 int amdgpu_device_ip_wait_for_idle(struct amdgpu_device *adev,
370 bool amdgpu_device_ip_is_valid(struct amdgpu_device *adev,
397 	struct amdgpu_device *adev;
400 int amdgpu_device_ip_block_version_cmp(struct amdgpu_device *adev,
405 amdgpu_device_ip_get_ip_block(struct amdgpu_device *adev,
408 int amdgpu_device_ip_block_add(struct amdgpu_device *adev,
414 bool amdgpu_get_bios(struct amdgpu_device *adev);
415 bool amdgpu_read_bios(struct amdgpu_device *adev);
416 bool amdgpu_soc15_read_bios_from_rom(struct amdgpu_device *adev,
418 void amdgpu_bios_release(struct amdgpu_device *adev);
479 	struct amdgpu_device		*adev;
524 int amdgpu_device_wb_get(struct amdgpu_device *adev, u32 *wb);
525 void amdgpu_device_wb_free(struct amdgpu_device *adev, u32 wb);
530 int amdgpu_benchmark(struct amdgpu_device *adev, int test_number);
600 	bool (*read_disabled_bios)(struct amdgpu_device *adev);
601 	bool (*read_bios_from_rom)(struct amdgpu_device *adev,
603 	int (*read_register)(struct amdgpu_device *adev, u32 se_num,
605 	void (*set_vga_state)(struct amdgpu_device *adev, bool state);
606 	int (*reset)(struct amdgpu_device *adev);
607 	enum amd_reset_method (*reset_method)(struct amdgpu_device *adev);
609 	u32 (*get_xclk)(struct amdgpu_device *adev);
611 	int (*set_uvd_clocks)(struct amdgpu_device *adev, u32 vclk, u32 dclk);
612 	int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32 ecclk);
614 	int (*get_pcie_lanes)(struct amdgpu_device *adev);
615 	void (*set_pcie_lanes)(struct amdgpu_device *adev, int lanes);
617 	u32 (*get_config_memsize)(struct amdgpu_device *adev);
619 	void (*flush_hdp)(struct amdgpu_device *adev, struct amdgpu_ring *ring);
621 	void (*invalidate_hdp)(struct amdgpu_device *adev,
624 	bool (*need_full_reset)(struct amdgpu_device *adev);
626 	void (*init_doorbell_index)(struct amdgpu_device *adev);
628 	void (*get_pcie_usage)(struct amdgpu_device *adev, uint64_t *count0,
631 	bool (*need_reset_on_init)(struct amdgpu_device *adev);
633 	uint64_t (*get_pcie_replay_count)(struct amdgpu_device *adev);
635 	int (*supports_baco)(struct amdgpu_device *adev);
637 	void (*pre_asic_init)(struct amdgpu_device *adev);
639 	int (*update_umd_stable_pstate)(struct amdgpu_device *adev, bool enter);
641 	int (*query_video_codecs)(struct amdgpu_device *adev, bool encode,
646 	ssize_t (*get_reg_state)(struct amdgpu_device *adev,
674 struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev);
680 typedef uint32_t (*amdgpu_rreg_t)(struct amdgpu_device*, uint32_t);
681 typedef void (*amdgpu_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t);
683 typedef uint32_t (*amdgpu_rreg_ext_t)(struct amdgpu_device*, uint64_t);
684 typedef void (*amdgpu_wreg_ext_t)(struct amdgpu_device*, uint64_t, uint32_t);
686 typedef uint64_t (*amdgpu_rreg64_t)(struct amdgpu_device*, uint32_t);
687 typedef void (*amdgpu_wreg64_t)(struct amdgpu_device*, uint32_t, uint64_t);
689 typedef uint64_t (*amdgpu_rreg64_ext_t)(struct amdgpu_device*, uint64_t);
690 typedef void (*amdgpu_wreg64_ext_t)(struct amdgpu_device*, uint64_t, uint64_t);
692 typedef uint32_t (*amdgpu_block_rreg_t)(struct amdgpu_device*, uint32_t, uint32_t);
693 typedef void (*amdgpu_block_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t, uint32_t);
757 	int8_t (*logical_to_dev_inst)(struct amdgpu_device *adev,
760 	uint32_t (*logical_to_dev_mask)(struct amdgpu_device *adev,
828 	int (*init_mqd)(struct amdgpu_device *adev, void *mqd,
861 struct amdgpu_device {  struct
1215 static inline uint32_t amdgpu_ip_version(const struct amdgpu_device *adev,  in amdgpu_ip_version()  argument
1224 static inline uint32_t amdgpu_ip_version_full(const struct amdgpu_device *adev,  in amdgpu_ip_version_full()
1231 static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)  in drm_to_adev()
1233 	return container_of(ddev, struct amdgpu_device, ddev);  in drm_to_adev()
1236 static inline struct drm_device *adev_to_drm(struct amdgpu_device *adev)  in adev_to_drm()
1241 static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_device *bdev)  in amdgpu_ttm_adev()
1243 	return container_of(bdev, struct amdgpu_device, mman.bdev);  in amdgpu_ttm_adev()
1246 int amdgpu_device_init(struct amdgpu_device *adev,
1248 void amdgpu_device_fini_hw(struct amdgpu_device *adev);
1249 void amdgpu_device_fini_sw(struct amdgpu_device *adev);
1251 int amdgpu_gpu_wait_for_idle(struct amdgpu_device *adev);
1253 void amdgpu_device_mm_access(struct amdgpu_device *adev, loff_t pos,
1255 size_t amdgpu_device_aper_access(struct amdgpu_device *adev, loff_t pos,
1258 void amdgpu_device_vram_access(struct amdgpu_device *adev, loff_t pos,
1260 uint32_t amdgpu_device_wait_on_rreg(struct amdgpu_device *adev,
1263 uint32_t amdgpu_device_rreg(struct amdgpu_device *adev,
1265 u32 amdgpu_device_indirect_rreg_ext(struct amdgpu_device *adev,
1267 uint32_t amdgpu_device_xcc_rreg(struct amdgpu_device *adev,
1270 void amdgpu_device_wreg(struct amdgpu_device *adev,
1273 void amdgpu_device_indirect_wreg_ext(struct amdgpu_device *adev,
1275 void amdgpu_device_xcc_wreg(struct amdgpu_device *adev,
1279 void amdgpu_mm_wreg_mmio_rlc(struct amdgpu_device *adev,
1281 void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, uint8_t value);
1282 uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset);
1284 u32 amdgpu_device_indirect_rreg(struct amdgpu_device *adev,
1286 u64 amdgpu_device_indirect_rreg64(struct amdgpu_device *adev,
1288 u64 amdgpu_device_indirect_rreg64_ext(struct amdgpu_device *adev,
1290 void amdgpu_device_indirect_wreg(struct amdgpu_device *adev,
1292 void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
1294 void amdgpu_device_indirect_wreg64_ext(struct amdgpu_device *adev,
1296 u32 amdgpu_device_get_rev_id(struct amdgpu_device *adev);
1298 bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
1300 void amdgpu_device_set_sriov_virtual_display(struct amdgpu_device *adev);
1302 int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev,
1310 int emu_soc_asic_init(struct amdgpu_device *adev);
1448 bool amdgpu_device_has_job_running(struct amdgpu_device *adev);
1449 bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev);
1450 int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
1453 void amdgpu_device_pci_config_reset(struct amdgpu_device *adev);
1454 int amdgpu_device_pci_reset(struct amdgpu_device *adev);
1455 bool amdgpu_device_need_post(struct amdgpu_device *adev);
1456 bool amdgpu_device_seamless_boot_supported(struct amdgpu_device *adev);
1457 bool amdgpu_device_should_use_aspm(struct amdgpu_device *adev);
1459 void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes,
1461 int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev);
1462 void amdgpu_device_program_register_sequence(struct amdgpu_device *adev,
1466 int amdgpu_device_mode1_reset(struct amdgpu_device *adev);
1472 void amdgpu_device_detect_runtime_pm_mode(struct amdgpu_device *adev);
1473 bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev,
1474 				      struct amdgpu_device *peer_adev);
1478 void amdgpu_device_flush_hdp(struct amdgpu_device *adev,
1480 void amdgpu_device_invalidate_hdp(struct amdgpu_device *adev,
1483 void amdgpu_device_halt(struct amdgpu_device *adev);
1484 u32 amdgpu_device_pcie_port_rreg(struct amdgpu_device *adev,
1486 void amdgpu_device_pcie_port_wreg(struct amdgpu_device *adev,
1488 struct dma_fence *amdgpu_device_get_gang(struct amdgpu_device *adev);
1489 struct dma_fence *amdgpu_device_switch_gang(struct amdgpu_device *adev,
1491 struct dma_fence *amdgpu_device_enforce_isolation(struct amdgpu_device *adev,
1494 bool amdgpu_device_has_display_hardware(struct amdgpu_device *adev);
1519 int amdgpu_driver_load_kms(struct amdgpu_device *adev, unsigned long flags);
1526 int amdgpu_device_ip_suspend(struct amdgpu_device *adev);
1570 int amdgpu_acpi_init(struct amdgpu_device *adev);
1571 void amdgpu_acpi_fini(struct amdgpu_device *adev);
1572 bool amdgpu_acpi_is_pcie_performance_request_supported(struct amdgpu_device *adev);
1574 int amdgpu_acpi_pcie_performance_request(struct amdgpu_device *adev,
1576 int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev,
1579 int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);
1580 int amdgpu_acpi_get_tmr_info(struct amdgpu_device *adev, u64 *tmr_offset,
1582 int amdgpu_acpi_get_mem_info(struct amdgpu_device *adev, int xcc_id,
1586 bool amdgpu_acpi_should_gpu_reset(struct amdgpu_device *adev);
1590 static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }  in amdgpu_acpi_init()
1591 static inline int amdgpu_acpi_get_tmr_info(struct amdgpu_device *adev,  in amdgpu_acpi_get_tmr_info()
1596 static inline int amdgpu_acpi_get_mem_info(struct amdgpu_device *adev,  in amdgpu_acpi_get_mem_info()
1602 static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }  in amdgpu_acpi_fini()
1603 static inline bool amdgpu_acpi_should_gpu_reset(struct amdgpu_device *adev) { return false; }  in amdgpu_acpi_should_gpu_reset()
1607 static inline int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev,  in amdgpu_acpi_power_shift_control()
1615 bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);
1616 bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
1618 static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { return false; }  in amdgpu_acpi_is_s0ix_active()
1619 static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { return false; }  in amdgpu_acpi_is_s3_active()
1622 void amdgpu_register_gpu_instance(struct amdgpu_device *adev);
1623 void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev);
1634 bool amdgpu_device_skip_hw_access(struct amdgpu_device *adev);
1636 int amdgpu_device_set_cg_state(struct amdgpu_device *adev,
1638 int amdgpu_device_set_pg_state(struct amdgpu_device *adev,
1641 static inline bool amdgpu_device_has_timeouts_enabled(struct amdgpu_device *adev)  in amdgpu_device_has_timeouts_enabled()
1652 static inline bool amdgpu_is_tmz(struct amdgpu_device *adev)  in amdgpu_is_tmz()
1657 int amdgpu_in_reset(struct amdgpu_device *adev);
1663 void amdgpu_set_init_level(struct amdgpu_device *adev,