Searched refs:AMDGPU_MAX_RINGS (Results 1 – 11 of 11) sorted by relevance
600 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_hw_fini()630 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_isr_toggle()647 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_sw_fini()686 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_hw_init()900 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_debugfs_fence_info_show()
441 unsigned seqno[AMDGPU_MAX_RINGS];452 struct drm_gpu_scheduler *vm_pte_scheds[AMDGPU_MAX_RINGS];
1678 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_debugfs_test_ib_show()1694 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_debugfs_test_ib_show()1919 if (val >= AMDGPU_MAX_RINGS) in amdgpu_debugfs_ib_preempt()2076 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_debugfs_init()
2899 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_init_schedulers()4256 adev->fence_context = dma_fence_context_alloc(AMDGPU_MAX_RINGS); in amdgpu_device_init()5384 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_has_job_running()5523 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_pre_asic_reset()6057 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_gpu_recover()6134 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_gpu_recover()6602 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_pci_error_detected()6736 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_pci_resume()
40 #define AMDGPU_MAX_RINGS 149 macro
238 if (adev->num_rings >= AMDGPU_MAX_RINGS) in amdgpu_ring_init()
2802 dma_fence_context_alloc(AMDGPU_MAX_RINGS); in amdgpu_vm_manager_init()2803 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) in amdgpu_vm_manager_init()
146 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in aqua_vanjaram_xcp_sched_list_update()
994 struct amdgpu_ring *rings[AMDGPU_MAX_RINGS];
2720 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_pmops_runtime_suspend()
568 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_dpm_compute_clocks()