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Searched refs:PPC (Results 1 – 25 of 140) sorted by relevance

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/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCPredicates.cpp19 PPC::Predicate PPC::InvertPredicate(PPC::Predicate Opcode) { in InvertPredicate()
21 case PPC::PRED_EQ: return PPC::PRED_NE; in InvertPredicate()
22 case PPC::PRED_NE: return PPC::PRED_EQ; in InvertPredicate()
23 case PPC::PRED_LT: return PPC::PRED_GE; in InvertPredicate()
24 case PPC::PRED_GE: return PPC::PRED_LT; in InvertPredicate()
25 case PPC::PRED_GT: return PPC::PRED_LE; in InvertPredicate()
26 case PPC::PRED_LE: return PPC::PRED_GT; in InvertPredicate()
27 case PPC::PRED_NU: return PPC::PRED_UN; in InvertPredicate()
28 case PPC::PRED_UN: return PPC::PRED_NU; in InvertPredicate()
53 PPC::Predicate PPC::getSwappedPredicate(PPC::Predicate Opcode) { in getSwappedPredicate()
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H A DPPCMCTargetDesc.h151 PPC_REGS_LO_HI(PPC::F, PPC::VF); \
155 PPC::CR0LT, PPC::CR0GT, PPC::CR0EQ, PPC::CR0UN, \
156 PPC::CR1LT, PPC::CR1GT, PPC::CR1EQ, PPC::CR1UN, \
157 PPC::CR2LT, PPC::CR2GT, PPC::CR2EQ, PPC::CR2UN, \
158 PPC::CR3LT, PPC::CR3GT, PPC::CR3EQ, PPC::CR3UN, \
159 PPC::CR4LT, PPC::CR4GT, PPC::CR4EQ, PPC::CR4UN, \
160 PPC::CR5LT, PPC::CR5GT, PPC::CR5EQ, PPC::CR5UN, \
161 PPC::CR6LT, PPC::CR6GT, PPC::CR6EQ, PPC::CR6UN, \
162 PPC::CR7LT, PPC::CR7GT, PPC::CR7EQ, PPC::CR7UN}; \
164 PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, \
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H A DPPCAsmBackend.cpp36 case PPC::fixup_ppc_nofixup: in adjustFixupValue()
38 case PPC::fixup_ppc_brcond14: in adjustFixupValue()
41 case PPC::fixup_ppc_br24: in adjustFixupValue()
42 case PPC::fixup_ppc_br24abs: in adjustFixupValue()
44 case PPC::fixup_ppc_half16: in adjustFixupValue()
46 case PPC::fixup_ppc_half16ds: in adjustFixupValue()
58 case PPC::fixup_ppc_half16: in getFixupKindNumBytes()
59 case PPC::fixup_ppc_half16ds: in getFixupKindNumBytes()
64 case PPC::fixup_ppc_br24: in getFixupKindNumBytes()
65 case PPC::fixup_ppc_br24abs: in getFixupKindNumBytes()
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H A DPPCMCCodeEmitter.cpp52 (MCFixupKind)PPC::fixup_ppc_br24)); in getDirectBrEncoding()
77 (MCFixupKind)PPC::fixup_ppc_br24abs)); in getAbsDirectBrEncoding()
102 (MCFixupKind)PPC::fixup_ppc_half16)); in getImm16Encoding()
120 (MCFixupKind)PPC::fixup_ppc_half16)); in getMemRIEncoding()
221 return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2); in getTLSRegEncoding()
241 assert((MI.getOpcode() == PPC::MTOCRF || MI.getOpcode() == PPC::MTOCRF8 || in get_crbitm_encoding()
242 MI.getOpcode() == PPC::MFOCRF || MI.getOpcode() == PPC::MFOCRF8) && in get_crbitm_encoding()
243 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)); in get_crbitm_encoding()
268 assert((MI.getOpcode() != PPC::MTOCRF && MI.getOpcode() != PPC::MTOCRF8 && in getMachineOpValue()
269 MI.getOpcode() != PPC::MFOCRF && MI.getOpcode() != PPC::MFOCRF8) || in getMachineOpValue()
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/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp2398 {PPC::STW, PPC::STD, PPC::STFD, PPC::STFS, PPC::SPILL_CR, in getStoreOpcodesForSpillArray()
2399 PPC::SPILL_CRBIT, PPC::STVX, PPC::STXVD2X, PPC::STXSDX, PPC::STXSSPX, in getStoreOpcodesForSpillArray()
2400 PPC::SPILL_VRSAVE, PPC::QVSTFDX, PPC::QVSTFSXs, PPC::QVSTFDXb, in getStoreOpcodesForSpillArray()
2403 {PPC::STW, PPC::STD, PPC::STFD, PPC::STFS, PPC::SPILL_CR, in getStoreOpcodesForSpillArray()
2404 PPC::SPILL_CRBIT, PPC::STVX, PPC::STXV, PPC::DFSTOREf64, PPC::DFSTOREf32, in getStoreOpcodesForSpillArray()
2414 {PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR, in getLoadOpcodesForSpillArray()
2415 PPC::RESTORE_CRBIT, PPC::LVX, PPC::LXVD2X, PPC::LXSDX, PPC::LXSSPX, in getLoadOpcodesForSpillArray()
2416 PPC::RESTORE_VRSAVE, PPC::QVLFDX, PPC::QVLFSXs, PPC::QVLFDXb, in getLoadOpcodesForSpillArray()
2419 {PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR, in getLoadOpcodesForSpillArray()
2420 PPC::RESTORE_CRBIT, PPC::LVX, PPC::LXV, PPC::DFLOADf64, PPC::DFLOADf32, in getLoadOpcodesForSpillArray()
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H A DPPCRegisterInfo.cpp79 ImmToIdxMap[PPC::LD] = PPC::LDX; ImmToIdxMap[PPC::STD] = PPC::STDX; in PPCRegisterInfo()
80 ImmToIdxMap[PPC::LBZ] = PPC::LBZX; ImmToIdxMap[PPC::STB] = PPC::STBX; in PPCRegisterInfo()
81 ImmToIdxMap[PPC::LHZ] = PPC::LHZX; ImmToIdxMap[PPC::LHA] = PPC::LHAX; in PPCRegisterInfo()
82 ImmToIdxMap[PPC::LWZ] = PPC::LWZX; ImmToIdxMap[PPC::LWA] = PPC::LWAX; in PPCRegisterInfo()
83 ImmToIdxMap[PPC::LFS] = PPC::LFSX; ImmToIdxMap[PPC::LFD] = PPC::LFDX; in PPCRegisterInfo()
84 ImmToIdxMap[PPC::STH] = PPC::STHX; ImmToIdxMap[PPC::STW] = PPC::STWX; in PPCRegisterInfo()
85 ImmToIdxMap[PPC::STFS] = PPC::STFSX; ImmToIdxMap[PPC::STFD] = PPC::STFDX; in PPCRegisterInfo()
90 ImmToIdxMap[PPC::LHA8] = PPC::LHAX8; ImmToIdxMap[PPC::LBZ8] = PPC::LBZX8; in PPCRegisterInfo()
91 ImmToIdxMap[PPC::LHZ8] = PPC::LHZX8; ImmToIdxMap[PPC::LWZ8] = PPC::LWZX8; in PPCRegisterInfo()
92 ImmToIdxMap[PPC::STB8] = PPC::STBX8; ImmToIdxMap[PPC::STH8] = PPC::STHX8; in PPCRegisterInfo()
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H A DPPCFrameLowering.cpp45 PPC::V0 , PPC::V1 , PPC::V2 , PPC::V3 , PPC::V4 , PPC::V5 , PPC::V6 , PPC::V7 ,
46 PPC::V8 , PPC::V9 , PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15,
47 PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23,
48 PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31
545 unsigned FPReg = is31 ? PPC::R31 : PPC::R1; in replaceFPWithRealFP()
546 unsigned FP8Reg = is31 ? PPC::X31 : PPC::X1; in replaceFPWithRealFP()
769 unsigned SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitPrologue()
772 unsigned LRReg = isPPC64 ? PPC::LR8 : PPC::LR; in emitPrologue()
1201 if (Reg == PPC::LR || Reg == PPC::LR8 || Reg == PPC::RM) continue; in emitPrologue()
1278 unsigned SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitEpilogue()
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H A DPPCVSXSwapRemoval.cpp341 case PPC::LVX: in gatherVectorInstructions()
366 case PPC::STVX: in gatherVectorInstructions()
380 case PPC::COPY: in gatherVectorInstructions()
436 case PPC::LVSL: in gatherVectorInstructions()
437 case PPC::LVSR: in gatherVectorInstructions()
438 case PPC::LVXL: in gatherVectorInstructions()
492 case PPC::VRLB: in gatherVectorInstructions()
493 case PPC::VRLD: in gatherVectorInstructions()
494 case PPC::VRLH: in gatherVectorInstructions()
499 case PPC::VSL: in gatherVectorInstructions()
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H A DPPCMIPeephole.cpp145 Opcode == PPC::RLDCL || Opcode == PPC::RLDCLo) in getKnownLeadingZeroCount()
174 if (Opcode == PPC::LHZ || Opcode == PPC::LHZX || in getKnownLeadingZeroCount()
175 Opcode == PPC::LHZ8 || Opcode == PPC::LHZX8 || in getKnownLeadingZeroCount()
176 Opcode == PPC::LHZU || Opcode == PPC::LHZUX || in getKnownLeadingZeroCount()
177 Opcode == PPC::LHZU8 || Opcode == PPC::LHZUX8) in getKnownLeadingZeroCount()
180 if (Opcode == PPC::LBZ || Opcode == PPC::LBZX || in getKnownLeadingZeroCount()
183 Opcode == PPC::LBZU8 || Opcode == PPC::LBZUX8) in getKnownLeadingZeroCount()
805 if (opCode == PPC::CMPLD) return PPC::CMPD; in getSignedCmpOpCode()
806 if (opCode == PPC::CMPLW) return PPC::CMPW; in getSignedCmpOpCode()
807 if (opCode == PPC::CMPLDI) return PPC::CMPDI; in getSignedCmpOpCode()
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H A DPPCRegisterInfo.h28 if (SrcReg == PPC::CR0LT || SrcReg == PPC::CR0GT || in getCRFromCRBit()
29 SrcReg == PPC::CR0EQ || SrcReg == PPC::CR0UN) in getCRFromCRBit()
31 else if (SrcReg == PPC::CR1LT || SrcReg == PPC::CR1GT || in getCRFromCRBit()
32 SrcReg == PPC::CR1EQ || SrcReg == PPC::CR1UN) in getCRFromCRBit()
34 else if (SrcReg == PPC::CR2LT || SrcReg == PPC::CR2GT || in getCRFromCRBit()
35 SrcReg == PPC::CR2EQ || SrcReg == PPC::CR2UN) in getCRFromCRBit()
38 SrcReg == PPC::CR3EQ || SrcReg == PPC::CR3UN) in getCRFromCRBit()
41 SrcReg == PPC::CR4EQ || SrcReg == PPC::CR4UN) in getCRFromCRBit()
44 SrcReg == PPC::CR5EQ || SrcReg == PPC::CR5UN) in getCRFromCRBit()
47 SrcReg == PPC::CR6EQ || SrcReg == PPC::CR6UN) in getCRFromCRBit()
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H A DPPCFastISel.cpp493 Opc = Is32BitInt ? PPC::LBZ : PPC::LBZ8; in PPCEmitLoad()
581 case PPC::LFS: Opc = IsVSSRC ? PPC::LXSSPX : PPC::LFSX; break; in PPCEmitLoad()
582 case PPC::LFD: Opc = IsVSFRC ? PPC::LXSDX : PPC::LFDX; break; in PPCEmitLoad()
727 case PPC::STFS: Opc = IsVSSRC ? PPC::STXSSPX : PPC::STFSX; break; in PPCEmitStore()
728 case PPC::STFD: Opc = IsVSFRC ? PPC::STXSDX : PPC::STFDX; break; in PPCEmitStore()
1239 Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTSIZ : PPC::EFDCTSIZ; in SelectFPToI()
1241 Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTUIZ : PPC::EFDCTUIZ; in SelectFPToI()
1291 Opc = IsGPRC ? PPC::ADD4 : PPC::ADD8; in SelectBinaryIntOp()
1294 Opc = IsGPRC ? PPC::OR : PPC::OR8; in SelectBinaryIntOp()
1297 Opc = IsGPRC ? PPC::SUBF : PPC::SUBF8; in SelectBinaryIntOp()
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H A DPPCAsmPrinter.cpp260 Reg = PPC::VSX32 + (Reg - PPC::V0); in PrintAsmOperand()
262 Reg = PPC::VSX32 + (Reg - PPC::VF0); in PrintAsmOperand()
484 PPC::BL8_NOP_TLS : PPC::BL_TLS) in EmitTlsCall()
852 TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ); in EmitInstruction()
1043 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; in EmitInstruction()
1057 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; in EmitInstruction()
1068 case PPC::LD: in EmitInstruction()
1069 case PPC::STD: in EmitInstruction()
1071 case PPC::LWA: { in EmitInstruction()
1121 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); in EmitInstruction()
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H A DPPCISelDAGToDAG.cpp902 unsigned OpC = Hi ? PPC::LIS8 : PPC::LI8; in selectI64ImmDirect()
3899 return HasVSX ? PPC::XVCMPEQSP : PPC::VCMPEQFP; in getVCmpInst()
3906 return HasVSX ? PPC::XVCMPGTSP : PPC::VCMPGTFP; in getVCmpInst()
3913 return HasVSX ? PPC::XVCMPGESP : PPC::VCMPGEFP; in getVCmpInst()
6212 case PPC::SLW: NewOpcode = PPC::SLW8; break; in PeepholePPC64ZExt()
6213 case PPC::SRW: NewOpcode = PPC::SRW8; break; in PeepholePPC64ZExt()
6214 case PPC::LI: NewOpcode = PPC::LI8; break; in PeepholePPC64ZExt()
6215 case PPC::LIS: NewOpcode = PPC::LIS8; break; in PeepholePPC64ZExt()
6221 case PPC::OR: NewOpcode = PPC::OR8; break; in PeepholePPC64ZExt()
6223 case PPC::ORI: NewOpcode = PPC::ORI8; break; in PeepholePPC64ZExt()
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H A DPPCHazardRecognizers.cpp97 case PPC::Sched::IIC_IntDivW: in mustComeFirst()
98 case PPC::Sched::IIC_IntDivD: in mustComeFirst()
100 case PPC::Sched::IIC_LdStLDU: in mustComeFirst()
103 case PPC::Sched::IIC_LdStLHA: in mustComeFirst()
105 case PPC::Sched::IIC_LdStLWA: in mustComeFirst()
106 case PPC::Sched::IIC_LdStSTU: in mustComeFirst()
166 if (Directive == PPC::DIR_PWR6 || Directive == PPC::DIR_PWR7 || in PreEmitNoops()
167 Directive == PPC::DIR_PWR8 || Directive == PPC::DIR_PWR9) in PreEmitNoops()
227 if (Directive == PPC::DIR_PWR6 || Directive == PPC::DIR_PWR7 || in EmitNoop()
228 Directive == PPC::DIR_PWR8 || Directive == PPC::DIR_PWR9 || in EmitNoop()
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H A DPPCReduceCRLogicals.cpp166 : OrigBROpcode == PPC::BCLR ? PPC::BCLRn : PPC::BCLR; in splitMBB()
249 if (BROp == PPC::BC || BROp == PPC::BCLR) { in computeBranchTargetAndInversion()
285 } else if (BROp == PPC::BCn || BROp == PPC::BCLRn) { in computeBranchTargetAndInversion()
367 return Opc == PPC::CRAND || Opc == PPC::CRNAND || Opc == PPC::CROR || in isCRLogical()
368 Opc == PPC::CRXOR || Opc == PPC::CRNOR || Opc == PPC::CREQV || in isCRLogical()
369 Opc == PPC::CRANDC || Opc == PPC::CRORC || Opc == PPC::CRSET || in isCRLogical()
370 Opc == PPC::CRUNSET || Opc == PPC::CR6SET || Opc == PPC::CR6UNSET; in isCRLogical()
476 if (Opc == PPC::ISEL || Opc == PPC::ISEL8) in createCRLogicalOpInfo()
478 if (Opc == PPC::BC || Opc == PPC::BCn || Opc == PPC::BCLR || in createCRLogicalOpInfo()
525 if (CopySrc == PPC::CR0EQ || CopySrc == PPC::CR6EQ) in lookThroughCRCopy()
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H A DPPCTLSDynamicCall.cpp85 unsigned GPR3 = Is64Bit ? PPC::X3 : PPC::R3; in processBlock()
92 case PPC::ADDItlsgdLADDR: in processBlock()
93 Opc1 = PPC::ADDItlsgdL; in processBlock()
94 Opc2 = PPC::GETtlsADDR; in processBlock()
96 case PPC::ADDItlsldLADDR: in processBlock()
97 Opc1 = PPC::ADDItlsldL; in processBlock()
98 Opc2 = PPC::GETtlsldADDR; in processBlock()
100 case PPC::ADDItlsgdLADDR32: in processBlock()
101 Opc1 = PPC::ADDItlsgdL32; in processBlock()
102 Opc2 = PPC::GETtlsADDR32; in processBlock()
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H A DPPCBranchSelector.cpp105 !Fn.getRegInfo().use_empty(PPC::X2)) in runOnMachineFunction()
166 else if ((I->getOpcode() == PPC::BC || I->getOpcode() == PPC::BCn) && in runOnMachineFunction()
169 else if ((I->getOpcode() == PPC::BDNZ8 || I->getOpcode() == PPC::BDNZ || in runOnMachineFunction()
170 I->getOpcode() == PPC::BDZ8 || I->getOpcode() == PPC::BDZ) && in runOnMachineFunction()
209 if (I->getOpcode() == PPC::BCC) { in runOnMachineFunction()
214 PPC::Predicate Pred = (PPC::Predicate)I->getOperand(0).getImm(); in runOnMachineFunction()
218 BuildMI(MBB, I, dl, TII->get(PPC::BCC)) in runOnMachineFunction()
220 } else if (I->getOpcode() == PPC::BC) { in runOnMachineFunction()
223 } else if (I->getOpcode() == PPC::BCn) { in runOnMachineFunction()
226 } else if (I->getOpcode() == PPC::BDNZ) { in runOnMachineFunction()
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H A DPPCQPXLoadSplat.cpp95 case PPC::LFS: in runOnMachineFunction()
96 case PPC::LFD: in runOnMachineFunction()
97 case PPC::LFSU: in runOnMachineFunction()
98 case PPC::LFDU: in runOnMachineFunction()
99 case PPC::LFSUX: in runOnMachineFunction()
100 case PPC::LFDUX: in runOnMachineFunction()
101 case PPC::LFSX: in runOnMachineFunction()
102 case PPC::LFDX: in runOnMachineFunction()
103 case PPC::LFIWAX: in runOnMachineFunction()
104 case PPC::LFIWZX: in runOnMachineFunction()
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H A DPPCISelLowering.cpp3224 PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
3253 PPC::QF1, PPC::QF2, PPC::QF3, PPC::QF4, PPC::QF5, PPC::QF6, PPC::QF7,
3254 PPC::QF8, PPC::QF9, PPC::QF10, PPC::QF11, PPC::QF12, PPC::QF13};
3574 PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, in LowerFormalArguments_32SVR4()
3684 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, in LowerFormalArguments_64SVR4()
3685 PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13 in LowerFormalArguments_64SVR4()
4099 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, in LowerFormalArguments_Darwin()
4100 PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13 in LowerFormalArguments_Darwin()
4519 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, in needStackSlotPassParameters()
5621 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, in LowerCall_64SVR4()
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H A DPPCInstrInfo.h197 { PPC::OR, PPC::OR8, PPC::FMR, PPC::VOR, PPC::XXLOR, PPC::XXLORf, in isSameClassPhysRegCopy()
198 PPC::XSCPSGNDP, PPC::MCRF, PPC::QVFMR, PPC::QVFMRs, PPC::QVFMRb, in isSameClassPhysRegCopy()
199 PPC::CROR, PPC::EVOR, -1U }; in isSameClassPhysRegCopy()
388 return Reg >= PPC::VF0 && Reg <= PPC::VF31; in isVFRegister()
391 return Reg >= PPC::V0 && Reg <= PPC::V31; in isVRRegister()
434 Reg = PPC::VSX32 + (Reg - PPC::V0); in getRegNumForOperand()
436 Reg = PPC::VSX32 + (Reg - PPC::VF0); in getRegNumForOperand()
H A DPPCVSXCopy.cpp68 return IsRegInClass(Reg, &PPC::VSRCRegClass, MRI); in IsVSReg()
72 return IsRegInClass(Reg, &PPC::VRRCRegClass, MRI); in IsVRReg()
76 return IsRegInClass(Reg, &PPC::F8RCRegClass, MRI); in IsF8Reg()
80 return IsRegInClass(Reg, &PPC::VSFRCRegClass, MRI); in IsVSFReg()
84 return IsRegInClass(Reg, &PPC::VSSRCRegClass, MRI); in IsVSSReg()
104 const TargetRegisterClass *SrcRC = &PPC::VSLRCRegClass; in processBlock()
116 .addImm(PPC::sub_64); in processBlock()
125 const TargetRegisterClass *DstRC = &PPC::VSLRCRegClass; in processBlock()
139 SrcMO.setSubReg(PPC::sub_64); in processBlock()
H A DPPCEarlyReturn.cpp65 (I->getOpcode() != PPC::BLR && I->getOpcode() != PPC::BLR8) || in processBlock()
81 if (J->getOpcode() == PPC::B) { in processBlock()
93 } else if (J->getOpcode() == PPC::BCC) { in processBlock()
97 BuildMI(**PI, J, J->getDebugLoc(), TII->get(PPC::BCCLR)) in processBlock()
107 } else if (J->getOpcode() == PPC::BC || J->getOpcode() == PPC::BCn) { in processBlock()
113 TII->get(J->getOpcode() == PPC::BC ? PPC::BCLR : PPC::BCLRn)) in processBlock()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/InstPrinter/
H A DPPCInstPrinter.cpp94 if ((MI->getOpcode() == PPC::OR || MI->getOpcode() == PPC::OR8) && in printInst()
128 if (MI->getOpcode() == PPC::DCBT || MI->getOpcode() == PPC::DCBTST) { in printInst()
186 case PPC::PRED_LT: in printPredicateOperand()
191 case PPC::PRED_LE: in printPredicateOperand()
196 case PPC::PRED_EQ: in printPredicateOperand()
201 case PPC::PRED_GE: in printPredicateOperand()
206 case PPC::PRED_GT: in printPredicateOperand()
211 case PPC::PRED_NE: in printPredicateOperand()
216 case PPC::PRED_UN: in printPredicateOperand()
221 case PPC::PRED_NU: in printPredicateOperand()
[all …]
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp818 TmpInst.setOpcode(Opcode == PPC::EXTLWI? PPC::RLWINM : PPC::RLWINMo); in ProcessInstruction()
832 TmpInst.setOpcode(Opcode == PPC::EXTRWI? PPC::RLWINM : PPC::RLWINMo); in ProcessInstruction()
846 TmpInst.setOpcode(Opcode == PPC::INSLWI? PPC::RLWIMI : PPC::RLWIMIo); in ProcessInstruction()
861 TmpInst.setOpcode(Opcode == PPC::INSRWI? PPC::RLWIMI : PPC::RLWIMIo); in ProcessInstruction()
875 TmpInst.setOpcode(Opcode == PPC::ROTRWI? PPC::RLWINM : PPC::RLWINMo); in ProcessInstruction()
888 TmpInst.setOpcode(Opcode == PPC::SLWI? PPC::RLWINM : PPC::RLWINMo); in ProcessInstruction()
901 TmpInst.setOpcode(Opcode == PPC::SRWI? PPC::RLWINM : PPC::RLWINMo); in ProcessInstruction()
914 TmpInst.setOpcode(Opcode == PPC::CLRRWI? PPC::RLWINM : PPC::RLWINMo); in ProcessInstruction()
942 TmpInst.setOpcode(Opcode == PPC::EXTLDI? PPC::RLDICR : PPC::RLDICRo); in ProcessInstruction()
993 TmpInst.setOpcode(Opcode == PPC::SLDI? PPC::RLDICR : PPC::RLDICRo); in ProcessInstruction()
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/freebsd-12.1/contrib/llvm/tools/lld/ELF/Arch/
H A DPPC.cpp22 class PPC final : public TargetInfo { class
24 PPC();
31 PPC::PPC() { in PPC() function in PPC
37 RelExpr PPC::getRelExpr(RelType Type, const Symbol &S, in getRelExpr()
51 void PPC::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const { in relocateOne()
79 static PPC Target; in getPPCTargetInfo()

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