75   : PPCGenRegisterInfo(TM.isPPC64() ? PPC::LR8 : PPC::LR,  in PPCRegisterInfo()
79   ImmToIdxMap[PPC::LD]   = PPC::LDX;    ImmToIdxMap[PPC::STD]  = PPC::STDX;  in PPCRegisterInfo()
80   ImmToIdxMap[PPC::LBZ]  = PPC::LBZX;   ImmToIdxMap[PPC::STB]  = PPC::STBX;  in PPCRegisterInfo()
81   ImmToIdxMap[PPC::LHZ]  = PPC::LHZX;   ImmToIdxMap[PPC::LHA]  = PPC::LHAX;  in PPCRegisterInfo()
82   ImmToIdxMap[PPC::LWZ]  = PPC::LWZX;   ImmToIdxMap[PPC::LWA]  = PPC::LWAX;  in PPCRegisterInfo()
83   ImmToIdxMap[PPC::LFS]  = PPC::LFSX;   ImmToIdxMap[PPC::LFD]  = PPC::LFDX;  in PPCRegisterInfo()
84   ImmToIdxMap[PPC::STH]  = PPC::STHX;   ImmToIdxMap[PPC::STW]  = PPC::STWX;  in PPCRegisterInfo()
85   ImmToIdxMap[PPC::STFS] = PPC::STFSX;  ImmToIdxMap[PPC::STFD] = PPC::STFDX;  in PPCRegisterInfo()
86   ImmToIdxMap[PPC::ADDI] = PPC::ADD4;  in PPCRegisterInfo()
87   ImmToIdxMap[PPC::LWA_32] = PPC::LWAX_32;  in PPCRegisterInfo()
90   ImmToIdxMap[PPC::LHA8] = PPC::LHAX8; ImmToIdxMap[PPC::LBZ8] = PPC::LBZX8;  in PPCRegisterInfo()
91   ImmToIdxMap[PPC::LHZ8] = PPC::LHZX8; ImmToIdxMap[PPC::LWZ8] = PPC::LWZX8;  in PPCRegisterInfo()
92   ImmToIdxMap[PPC::STB8] = PPC::STBX8; ImmToIdxMap[PPC::STH8] = PPC::STHX8;  in PPCRegisterInfo()
93   ImmToIdxMap[PPC::STW8] = PPC::STWX8; ImmToIdxMap[PPC::STDU] = PPC::STDUX;  in PPCRegisterInfo()
94   ImmToIdxMap[PPC::ADDI8] = PPC::ADD8;  in PPCRegisterInfo()
97   ImmToIdxMap[PPC::DFLOADf32] = PPC::LXSSPX;  in PPCRegisterInfo()
98   ImmToIdxMap[PPC::DFLOADf64] = PPC::LXSDX;  in PPCRegisterInfo()
99   ImmToIdxMap[PPC::SPILLTOVSR_LD] = PPC::SPILLTOVSR_LDX;  in PPCRegisterInfo()
100   ImmToIdxMap[PPC::SPILLTOVSR_ST] = PPC::SPILLTOVSR_STX;  in PPCRegisterInfo()
101   ImmToIdxMap[PPC::DFSTOREf32] = PPC::STXSSPX;  in PPCRegisterInfo()
102   ImmToIdxMap[PPC::DFSTOREf64] = PPC::STXSDX;  in PPCRegisterInfo()
103   ImmToIdxMap[PPC::LXV] = PPC::LXVX;  in PPCRegisterInfo()
104   ImmToIdxMap[PPC::LXSD] = PPC::LXSDX;  in PPCRegisterInfo()
105   ImmToIdxMap[PPC::LXSSP] = PPC::LXSSPX;  in PPCRegisterInfo()
106   ImmToIdxMap[PPC::STXV] = PPC::STXVX;  in PPCRegisterInfo()
107   ImmToIdxMap[PPC::STXSD] = PPC::STXSDX;  in PPCRegisterInfo()
108   ImmToIdxMap[PPC::STXSSP] = PPC::STXSSPX;  in PPCRegisterInfo()
111   ImmToIdxMap[PPC::EVLDD] = PPC::EVLDDX;  in PPCRegisterInfo()
112   ImmToIdxMap[PPC::EVSTDD] = PPC::EVSTDDX;  in PPCRegisterInfo()
113   ImmToIdxMap[PPC::SPESTW] = PPC::SPESTWX;  in PPCRegisterInfo()
114   ImmToIdxMap[PPC::SPELWZ] = PPC::SPELWZX;  in PPCRegisterInfo()
126       return &PPC::G8RC_NOX0RegClass;  in getPointerRegClass()
127     return &PPC::GPRC_NOR0RegClass;  in getPointerRegClass()
131     return &PPC::G8RCRegClass;  in getPointerRegClass()
132   return &PPC::GPRCRegClass;  in getPointerRegClass()
160   bool SaveR2 = MF->getRegInfo().isAllocatable(PPC::X2);  in getCalleeSavedRegs()
196   bool SaveR2 = !getReservedRegs(*MF).test(PPC::X2);  in getCalleeSavedRegsViaCopy()
244   for (unsigned PseudoReg : {PPC::ZERO, PPC::ZERO8, PPC::RM})  in adjustStackMapLiveOutMask()
255   markSuperRegs(Reserved, PPC::ZERO);  in getReservedRegs()
259   markSuperRegs(Reserved, PPC::FP);  in getReservedRegs()
263   markSuperRegs(Reserved, PPC::BP);  in getReservedRegs()
267   markSuperRegs(Reserved, PPC::CTR);  in getReservedRegs()
268   markSuperRegs(Reserved, PPC::CTR8);  in getReservedRegs()
270   markSuperRegs(Reserved, PPC::R1);  in getReservedRegs()
271   markSuperRegs(Reserved, PPC::LR);  in getReservedRegs()
272   markSuperRegs(Reserved, PPC::LR8);  in getReservedRegs()
273   markSuperRegs(Reserved, PPC::RM);  in getReservedRegs()
276     markSuperRegs(Reserved, PPC::VRSAVE);  in getReservedRegs()
287       markSuperRegs(Reserved, PPC::R2);  // System-reserved register  in getReservedRegs()
288     markSuperRegs(Reserved, PPC::R13); // Small Data Area pointer register  in getReservedRegs()
293     markSuperRegs(Reserved, PPC::R13);  in getReservedRegs()
296     markSuperRegs(Reserved, PPC::R31);  in getReservedRegs()
301       markSuperRegs(Reserved, PPC::R29);  in getReservedRegs()
303       markSuperRegs(Reserved, PPC::R30);  in getReservedRegs()
307     markSuperRegs(Reserved, PPC::R30);  in getReservedRegs()
311     for (TargetRegisterClass::iterator I = PPC::VRRCRegClass.begin(),  in getReservedRegs()
312          IE = PPC::VRRCRegClass.end(); I != IE; ++I)  in getReservedRegs()
329   if (PhysReg == PPC::X2)  in isCallerPreservedPhysReg()
334     return (getReservedRegs(MF).test(PPC::X2));  in isCallerPreservedPhysReg()
335   if (StackPtrConst && (PhysReg == PPC::X1) && !MFI.hasVarSizedObjects()  in isCallerPreservedPhysReg()
352   case PPC::G8RC_NOX0RegClassID:  in getRegPressureLimit()
353   case PPC::GPRC_NOR0RegClassID:  in getRegPressureLimit()
354   case PPC::SPERCRegClassID:  in getRegPressureLimit()
355   case PPC::SPE4RCRegClassID:  in getRegPressureLimit()
356   case PPC::G8RCRegClassID:  in getRegPressureLimit()
357   case PPC::GPRCRegClassID: {  in getRegPressureLimit()
361   case PPC::F8RCRegClassID:  in getRegPressureLimit()
362   case PPC::F4RCRegClassID:  in getRegPressureLimit()
363   case PPC::QFRCRegClassID:  in getRegPressureLimit()
364   case PPC::QSRCRegClassID:  in getRegPressureLimit()
365   case PPC::QBRCRegClassID:  in getRegPressureLimit()
366   case PPC::VRRCRegClassID:  in getRegPressureLimit()
367   case PPC::VFRCRegClassID:  in getRegPressureLimit()
368   case PPC::VSLRCRegClassID:  in getRegPressureLimit()
370   case PPC::VSRCRegClassID:  in getRegPressureLimit()
371   case PPC::VSFRCRegClassID:  in getRegPressureLimit()
372   case PPC::VSSRCRegClassID:  in getRegPressureLimit()
374   case PPC::CRRCRegClassID:  in getRegPressureLimit()
392           RC == &PPC::G8RCRegClass) {  in getLargestLegalSuperClass()
394         return &PPC::SPILLTOVSRRCRegClass;  in getLargestLegalSuperClass()
396       if (RC == &PPC::GPRCRegClass && EnableGPRToVecSpills)  in getLargestLegalSuperClass()
399     if (RC == &PPC::F8RCRegClass)  in getLargestLegalSuperClass()
400       return &PPC::VSFRCRegClass;  in getLargestLegalSuperClass()
401     else if (RC == &PPC::VRRCRegClass)  in getLargestLegalSuperClass()
402       return &PPC::VSRCRegClass;  in getLargestLegalSuperClass()
403     else if (RC == &PPC::F4RCRegClass && Subtarget.hasP8Vector())  in getLargestLegalSuperClass()
404       return &PPC::VSSRCRegClass;  in getLargestLegalSuperClass()
455   const TargetRegisterClass *G8RC = &PPC::G8RCRegClass;  in lowerDynamicAlloc()
456   const TargetRegisterClass *GPRC = &PPC::GPRCRegClass;  in lowerDynamicAlloc()
461       BuildMI(MBB, II, dl, TII.get(PPC::ADDI8), Reg)  in lowerDynamicAlloc()
462         .addReg(PPC::X31)  in lowerDynamicAlloc()
465       BuildMI(MBB, II, dl, TII.get(PPC::ADDI), Reg)  in lowerDynamicAlloc()
466         .addReg(PPC::R31)  in lowerDynamicAlloc()
469     BuildMI(MBB, II, dl, TII.get(PPC::LD), Reg)  in lowerDynamicAlloc()
471       .addReg(PPC::X1);  in lowerDynamicAlloc()
473     BuildMI(MBB, II, dl, TII.get(PPC::LWZ), Reg)  in lowerDynamicAlloc()
475       .addReg(PPC::R1);  in lowerDynamicAlloc()
490       BuildMI(MBB, II, dl, TII.get(PPC::LI8), NegSizeReg)  in lowerDynamicAlloc()
495       BuildMI(MBB, II, dl, TII.get(PPC::AND8), NegSizeReg)  in lowerDynamicAlloc()
501     BuildMI(MBB, II, dl, TII.get(PPC::STDUX), PPC::X1)  in lowerDynamicAlloc()
503       .addReg(PPC::X1)  in lowerDynamicAlloc()
505     BuildMI(MBB, II, dl, TII.get(PPC::ADDI8), MI.getOperand(0).getReg())  in lowerDynamicAlloc()
506       .addReg(PPC::X1)  in lowerDynamicAlloc()
515       BuildMI(MBB, II, dl, TII.get(PPC::LI), NegSizeReg)  in lowerDynamicAlloc()
520       BuildMI(MBB, II, dl, TII.get(PPC::AND), NegSizeReg)  in lowerDynamicAlloc()
526     BuildMI(MBB, II, dl, TII.get(PPC::STWUX), PPC::R1)  in lowerDynamicAlloc()
528       .addReg(PPC::R1)  in lowerDynamicAlloc()
530     BuildMI(MBB, II, dl, TII.get(PPC::ADDI), MI.getOperand(0).getReg())  in lowerDynamicAlloc()
531       .addReg(PPC::R1)  in lowerDynamicAlloc()
556   BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::LI8 : PPC::LI),  in lowerDynamicAreaOffset()
582   const TargetRegisterClass *G8RC = &PPC::G8RCRegClass;  in lowerCRSpilling()
583   const TargetRegisterClass *GPRC = &PPC::GPRCRegClass;  in lowerCRSpilling()
590   BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), Reg)  in lowerCRSpilling()
595   if (SrcReg != PPC::CR0) {  in lowerCRSpilling()
600     BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::RLWINM8 : PPC::RLWINM), Reg)  in lowerCRSpilling()
607   addFrameReference(BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::STW8 : PPC::STW))  in lowerCRSpilling()
627   const TargetRegisterClass *G8RC = &PPC::G8RCRegClass;  in lowerCRRestore()
628   const TargetRegisterClass *GPRC = &PPC::GPRCRegClass;  in lowerCRRestore()
635   addFrameReference(BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::LWZ8 : PPC::LWZ),  in lowerCRRestore()
640   if (DestReg != PPC::CR0) {  in lowerCRRestore()
646     BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::RLWINM8 : PPC::RLWINM), Reg)  in lowerCRRestore()
651   BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MTOCRF8 : PPC::MTOCRF), DestReg)  in lowerCRRestore()
670   const TargetRegisterClass *G8RC = &PPC::G8RCRegClass;  in lowerCRBitSpilling()
671   const TargetRegisterClass *GPRC = &PPC::GPRCRegClass;  in lowerCRBitSpilling()
681   BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), Reg)  in lowerCRBitSpilling()
692   BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::RLWINM8 : PPC::RLWINM), Reg)  in lowerCRBitSpilling()
697   addFrameReference(BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::STW8 : PPC::STW))  in lowerCRBitSpilling()
717   const TargetRegisterClass *G8RC = &PPC::G8RCRegClass;  in lowerCRBitRestore()
718   const TargetRegisterClass *GPRC = &PPC::GPRCRegClass;  in lowerCRBitRestore()
725   addFrameReference(BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::LWZ8 : PPC::LWZ),  in lowerCRBitRestore()
731   BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MFOCRF8 : PPC::MFOCRF), RegO)  in lowerCRBitRestore()
736   BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::RLWIMI8 : PPC::RLWIMI), RegO)  in lowerCRBitRestore()
743   BuildMI(MBB, II, dl, TII.get(LP64 ? PPC::MTOCRF8 : PPC::MTOCRF),  in lowerCRBitRestore()
766   const TargetRegisterClass *GPRC = &PPC::GPRCRegClass;  in lowerVRSAVESpilling()
770   BuildMI(MBB, II, dl, TII.get(PPC::MFVRSAVEv), Reg)  in lowerVRSAVESpilling()
774       BuildMI(MBB, II, dl, TII.get(PPC::STW)).addReg(Reg, RegState::Kill),  in lowerVRSAVESpilling()
792   const TargetRegisterClass *GPRC = &PPC::GPRCRegClass;  in lowerVRSAVERestore()
798   addFrameReference(BuildMI(MBB, II, dl, TII.get(PPC::LWZ),  in lowerVRSAVERestore()
801   BuildMI(MBB, II, dl, TII.get(PPC::MTVRSAVEv), DestReg)  in lowerVRSAVERestore()
816   if (Subtarget.isSVR4ABI() && PPC::CR2 <= Reg && Reg <= PPC::CR4) {  in hasReservedSpillSlot()
835   case PPC::LWA:  in offsetMinAlign()
836   case PPC::LWA_32:  in offsetMinAlign()
837   case PPC::LD:  in offsetMinAlign()
838   case PPC::LDU:  in offsetMinAlign()
839   case PPC::STD:  in offsetMinAlign()
840   case PPC::STDU:  in offsetMinAlign()
841   case PPC::DFLOADf32:  in offsetMinAlign()
842   case PPC::DFLOADf64:  in offsetMinAlign()
843   case PPC::DFSTOREf32:  in offsetMinAlign()
844   case PPC::DFSTOREf64:  in offsetMinAlign()
845   case PPC::LXSD:  in offsetMinAlign()
846   case PPC::LXSSP:  in offsetMinAlign()
847   case PPC::STXSD:  in offsetMinAlign()
848   case PPC::STXSSP:  in offsetMinAlign()
850   case PPC::LXV:  in offsetMinAlign()
851   case PPC::STXV:  in offsetMinAlign()
901   if ((OpC == PPC::DYNAREAOFFSET || OpC == PPC::DYNAREAOFFSET8)) {  in eliminateFrameIndex()
908       (OpC == PPC::DYNALLOC || OpC == PPC::DYNALLOC8)) {  in eliminateFrameIndex()
914   if (OpC == PPC::SPILL_CR) {  in eliminateFrameIndex()
917   } else if (OpC == PPC::RESTORE_CR) {  in eliminateFrameIndex()
920   } else if (OpC == PPC::SPILL_CRBIT) {  in eliminateFrameIndex()
923   } else if (OpC == PPC::RESTORE_CRBIT) {  in eliminateFrameIndex()
926   } else if (OpC == PPC::SPILL_VRSAVE) {  in eliminateFrameIndex()
929   } else if (OpC == PPC::RESTORE_VRSAVE) {  in eliminateFrameIndex()
964   assert(OpC != PPC::DBG_VALUE &&  in eliminateFrameIndex()
978   const TargetRegisterClass *G8RC = &PPC::G8RCRegClass;  in eliminateFrameIndex()
979   const TargetRegisterClass *GPRC = &PPC::GPRCRegClass;  in eliminateFrameIndex()
986     BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::LI8 : PPC::LI), SReg)  in eliminateFrameIndex()
989     BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::LIS8 : PPC::LIS), SRegHi)  in eliminateFrameIndex()
991     BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::ORI8 : PPC::ORI), SReg)  in eliminateFrameIndex()
1023     return TFI->hasFP(MF) ? PPC::R31 : PPC::R1;  in getFrameRegister()
1025     return TFI->hasFP(MF) ? PPC::X31 : PPC::X1;  in getFrameRegister()
1034     return PPC::X30;  in getBaseRegister()
1037     return PPC::R29;  in getBaseRegister()
1039   return PPC::R30;  in getBaseRegister()
1076   if ((OpC == PPC::ADDI || OpC == PPC::ADDI8) &&  in needsFrameBaseReg()
1107   unsigned ADDriOpc = TM.isPPC64() ? PPC::ADDI8 : PPC::ADDI;  in materializeFrameBaseRegister()
1162   return MI->getOpcode() == PPC::DBG_VALUE || // DBG_VALUE is always Reg+Imm  in isFrameOffsetLegal()