Lines Matching refs:PPC
144 if (Opcode == PPC::RLDICL || Opcode == PPC::RLDICLo || in getKnownLeadingZeroCount()
145 Opcode == PPC::RLDCL || Opcode == PPC::RLDCLo) in getKnownLeadingZeroCount()
148 if ((Opcode == PPC::RLDIC || Opcode == PPC::RLDICo) && in getKnownLeadingZeroCount()
152 if ((Opcode == PPC::RLWINM || Opcode == PPC::RLWINMo || in getKnownLeadingZeroCount()
153 Opcode == PPC::RLWNM || Opcode == PPC::RLWNMo || in getKnownLeadingZeroCount()
154 Opcode == PPC::RLWINM8 || Opcode == PPC::RLWNM8) && in getKnownLeadingZeroCount()
158 if (Opcode == PPC::ANDIo) { in getKnownLeadingZeroCount()
163 if (Opcode == PPC::CNTLZW || Opcode == PPC::CNTLZWo || in getKnownLeadingZeroCount()
164 Opcode == PPC::CNTTZW || Opcode == PPC::CNTTZWo || in getKnownLeadingZeroCount()
165 Opcode == PPC::CNTLZW8 || Opcode == PPC::CNTTZW8) in getKnownLeadingZeroCount()
169 if (Opcode == PPC::CNTLZD || Opcode == PPC::CNTLZDo || in getKnownLeadingZeroCount()
170 Opcode == PPC::CNTTZD || Opcode == PPC::CNTTZDo) in getKnownLeadingZeroCount()
174 if (Opcode == PPC::LHZ || Opcode == PPC::LHZX || in getKnownLeadingZeroCount()
175 Opcode == PPC::LHZ8 || Opcode == PPC::LHZX8 || in getKnownLeadingZeroCount()
176 Opcode == PPC::LHZU || Opcode == PPC::LHZUX || in getKnownLeadingZeroCount()
177 Opcode == PPC::LHZU8 || Opcode == PPC::LHZUX8) in getKnownLeadingZeroCount()
180 if (Opcode == PPC::LBZ || Opcode == PPC::LBZX || in getKnownLeadingZeroCount()
181 Opcode == PPC::LBZ8 || Opcode == PPC::LBZX8 || in getKnownLeadingZeroCount()
182 Opcode == PPC::LBZU || Opcode == PPC::LBZUX || in getKnownLeadingZeroCount()
183 Opcode == PPC::LBZU8 || Opcode == PPC::LBZUX8) in getKnownLeadingZeroCount()
273 case PPC::STD: { in simplifyCode()
285 case PPC::XXPERMDI: { in simplifyCode()
314 if (DefOpc != PPC::XVCVDPSXDS && DefOpc != PPC::XVCVDPUXDS) in simplifyCode()
320 if (LoadMI && LoadMI->getOpcode() == PPC::LXVDSX) in simplifyCode()
326 if (DefOpc == PPC::LXVDSX || isConversionOfLoadAndSplat()) { in simplifyCode()
330 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
340 if (DefOpc == PPC::XXPERMDI) { in simplifyCode()
351 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
376 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
382 } else if ((Immed == 0 || Immed == 3) && DefOpc == PPC::XXPERMDIs && in simplifyCode()
397 case PPC::VSPLTB: in simplifyCode()
398 case PPC::VSPLTH: in simplifyCode()
399 case PPC::XXSPLTW: { in simplifyCode()
401 unsigned OpNo = MyOpcode == PPC::XXSPLTW ? 1 : 2; in simplifyCode()
411 if (DefOpcode != PPC::XVCVSPSXWS && DefOpcode != PPC::XVCVSPUXWS) in simplifyCode()
417 return Splt && (Splt->getOpcode() == PPC::LXVWSX || in simplifyCode()
418 Splt->getOpcode() == PPC::XXSPLTW); in simplifyCode()
421 (MyOpcode == PPC::VSPLTB && DefOpcode == PPC::VSPLTBs) || in simplifyCode()
422 (MyOpcode == PPC::VSPLTH && DefOpcode == PPC::VSPLTHs) || in simplifyCode()
423 (MyOpcode == PPC::XXSPLTW && DefOpcode == PPC::XXSPLTWs) || in simplifyCode()
424 (MyOpcode == PPC::XXSPLTW && DefOpcode == PPC::LXVWSX) || in simplifyCode()
425 (MyOpcode == PPC::XXSPLTW && DefOpcode == PPC::MTVSRWS)|| in simplifyCode()
426 (MyOpcode == PPC::XXSPLTW && isConvertOfSplat()); in simplifyCode()
432 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
440 if (DefOpcode == PPC::XXSLDWI) { in simplifyCode()
463 case PPC::XVCVDPSP: { in simplifyCode()
473 if (DefMI && DefMI->getOpcode() == PPC::XXPERMDI) { in simplifyCode()
490 if (RoundInstr->getOpcode() == PPC::FRSP && in simplifyCode()
522 case PPC::EXTSH: in simplifyCode()
523 case PPC::EXTSH8: in simplifyCode()
524 case PPC::EXTSH8_32_64: { in simplifyCode()
533 if (SrcMI->getOpcode() == PPC::LHZ || in simplifyCode()
534 SrcMI->getOpcode() == PPC::LHZX) { in simplifyCode()
538 return Opcode == PPC::EXTSH8; in simplifyCode()
541 return Opcode == PPC::LHZX; in simplifyCode()
545 if (isXForm) return PPC::LHAX8; in simplifyCode()
546 else return PPC::LHA8; in simplifyCode()
548 if (isXForm) return PPC::LHAX; in simplifyCode()
549 else return PPC::LHA; in simplifyCode()
566 case PPC::EXTSW: in simplifyCode()
567 case PPC::EXTSW_32: in simplifyCode()
568 case PPC::EXTSW_32_64: { in simplifyCode()
577 if (SrcMI->getOpcode() == PPC::LWZ || in simplifyCode()
578 SrcMI->getOpcode() == PPC::LWZX) { in simplifyCode()
582 return Opcode == PPC::EXTSW || Opcode == PPC::EXTSW_32_64; in simplifyCode()
585 return Opcode == PPC::LWZX; in simplifyCode()
589 if (isXForm) return PPC::LWAX; in simplifyCode()
590 else return PPC::LWA; in simplifyCode()
592 if (isXForm) return PPC::LWAX_32; in simplifyCode()
593 else return PPC::LWA_32; in simplifyCode()
607 } else if (MI.getOpcode() == PPC::EXTSW_32_64 && in simplifyCode()
613 MF->getRegInfo().createVirtualRegister(&PPC::G8RCRegClass); in simplifyCode()
614 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::IMPLICIT_DEF), in simplifyCode()
616 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::INSERT_SUBREG), in simplifyCode()
620 .addImm(PPC::sub_32); in simplifyCode()
627 case PPC::RLDICL: { in simplifyCode()
644 if (!(SrcMI && SrcMI->getOpcode() == PPC::INSERT_SUBREG && in simplifyCode()
651 if (ImpDefMI->getOpcode() != PPC::IMPLICIT_DEF) break; in simplifyCode()
654 if (SubRegMI->getOpcode() == PPC::COPY) { in simplifyCode()
663 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
677 case PPC::ADD4: in simplifyCode()
678 case PPC::ADD8: { in simplifyCode()
683 return DefPhiMI && (DefPhiMI->getOpcode() == PPC::PHI) && in simplifyCode()
700 (LiMI->getOpcode() != PPC::LI && LiMI->getOpcode() != PPC::LI8) in simplifyCode()
719 const TargetRegisterClass *TRC = MI.getOpcode() == PPC::ADD8 in simplifyCode()
720 ? &PPC::G8RC_and_G8RC_NOX0RegClass in simplifyCode()
721 : &PPC::GPRC_and_GPRC_NOR0RegClass; in simplifyCode()
734 if (LiMI->getOpcode() == PPC::ADDI || LiMI->getOpcode() == PPC::ADDI8) in simplifyCode()
737 assert((LiMI->getOpcode() == PPC::LI || in simplifyCode()
738 LiMI->getOpcode() == PPC::LI8) && in simplifyCode()
742 LiMI->setDesc(TII->get(LiMI->getOpcode() == PPC::LI ? PPC::ADDI in simplifyCode()
743 : PPC::ADDI8)); in simplifyCode()
753 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY), in simplifyCode()
782 PPC::Predicate Pred = (PPC::Predicate)BI->getOperand(0).getImm(); in isEqOrNe()
783 unsigned PredCond = PPC::getPredicateCondition(Pred); in isEqOrNe()
784 return (PredCond == PPC::PRED_EQ || PredCond == PPC::PRED_NE); in isEqOrNe()
788 return (opCode == PPC::CMPLD || opCode == PPC::CMPD || in isSupportedCmpOp()
789 opCode == PPC::CMPLW || opCode == PPC::CMPW || in isSupportedCmpOp()
790 opCode == PPC::CMPLDI || opCode == PPC::CMPDI || in isSupportedCmpOp()
791 opCode == PPC::CMPLWI || opCode == PPC::CMPWI); in isSupportedCmpOp()
795 return (opCode == PPC::CMPLD || opCode == PPC::CMPD || in is64bitCmpOp()
796 opCode == PPC::CMPLDI || opCode == PPC::CMPDI); in is64bitCmpOp()
800 return (opCode == PPC::CMPD || opCode == PPC::CMPW || in isSignedCmpOp()
801 opCode == PPC::CMPDI || opCode == PPC::CMPWI); in isSignedCmpOp()
805 if (opCode == PPC::CMPLD) return PPC::CMPD; in getSignedCmpOpCode()
806 if (opCode == PPC::CMPLW) return PPC::CMPW; in getSignedCmpOpCode()
807 if (opCode == PPC::CMPLDI) return PPC::CMPDI; in getSignedCmpOpCode()
808 if (opCode == PPC::CMPLWI) return PPC::CMPWI; in getSignedCmpOpCode()
820 PPC::Predicate Pred = (PPC::Predicate)BI->getOperand(0).getImm(); in getPredicateToDecImm()
821 unsigned PredCond = PPC::getPredicateCondition(Pred); in getPredicateToDecImm()
822 unsigned PredHint = PPC::getPredicateHint(Pred); in getPredicateToDecImm()
823 if (PredCond == PPC::PRED_GE) in getPredicateToDecImm()
824 return PPC::getPredicate(PPC::PRED_GT, PredHint); in getPredicateToDecImm()
825 if (PredCond == PPC::PRED_LT) in getPredicateToDecImm()
826 return PPC::getPredicate(PPC::PRED_LE, PredHint); in getPredicateToDecImm()
839 PPC::Predicate Pred = (PPC::Predicate)BI->getOperand(0).getImm(); in getPredicateToIncImm()
840 unsigned PredCond = PPC::getPredicateCondition(Pred); in getPredicateToIncImm()
841 unsigned PredHint = PPC::getPredicateHint(Pred); in getPredicateToIncImm()
842 if (PredCond == PPC::PRED_GT) in getPredicateToIncImm()
843 return PPC::getPredicate(PPC::PRED_GE, PredHint); in getPredicateToIncImm()
844 if (PredCond == PPC::PRED_LE) in getPredicateToIncImm()
845 return PPC::getPredicate(PPC::PRED_LT, PredHint); in getPredicateToIncImm()
871 if (BB1 && Inst->getOpcode() == PPC::PHI && Inst->getParent() == BB2) { in getSrcVReg()
897 (*BII).getOpcode() == PPC::BCC && in eligibleForCompareElimination()
967 if (Inst->getParent() == &MBB && Inst->getOpcode() != PPC::PHI) in eligibleForCompareElimination()
1123 PPC::Predicate Pred = (PPC::Predicate)BI2->getOperand(0).getImm(); in eliminateRedundantCompare()
1124 NewPredicate2 = (unsigned)PPC::getSwappedPredicate(Pred); in eliminateRedundantCompare()
1236 assert(Inst->getOpcode() == PPC::PHI && in eliminateRedundantCompare()
1246 unsigned NewVReg = MRI->createVirtualRegister(&PPC::CRRCRegClass); in eliminateRedundantCompare()
1248 TII->get(PPC::PHI), NewVReg) in eliminateRedundantCompare()