Lines Matching refs:PPC
150 return RC->getID() == PPC::VSFRCRegClassID; in isVSFRCRegClass()
153 return RC->getID() == PPC::VSSRCRegClassID; in isVSSRCRegClass()
157 const PPC::Predicate Pred);
160 unsigned FP64LoadOpc = PPC::LFD);
216 static Optional<PPC::Predicate> getComparePred(CmpInst::Predicate Pred) { in getComparePred()
244 return Optional<PPC::Predicate>(); in getComparePred()
248 return PPC::PRED_EQ; in getComparePred()
253 return PPC::PRED_GT; in getComparePred()
258 return PPC::PRED_GE; in getComparePred()
263 return PPC::PRED_LT; in getComparePred()
268 return PPC::PRED_LE; in getComparePred()
272 return PPC::PRED_NE; in getComparePred()
275 return PPC::PRED_NU; in getComparePred()
278 return PPC::PRED_UN; in getComparePred()
427 MRI.setRegClass(Addr.Base.Reg, &PPC::G8RC_and_G8RC_NOX0RegClass); in PPCComputeAddress()
446 unsigned ResultReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); in PPCSimplifyAddress()
447 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::ADDI8), in PPCSimplifyAddress()
482 (VT == MVT::f64 ? (HasSPE ? &PPC::SPERCRegClass : &PPC::F8RCRegClass) : in PPCEmitLoad()
483 (VT == MVT::f32 ? (HasSPE ? &PPC::SPE4RCRegClass : &PPC::F4RCRegClass) : in PPCEmitLoad()
484 (VT == MVT::i64 ? &PPC::G8RC_and_G8RC_NOX0RegClass : in PPCEmitLoad()
485 &PPC::GPRC_and_GPRC_NOR0RegClass))))); in PPCEmitLoad()
487 bool Is32BitInt = UseRC->hasSuperClassEq(&PPC::GPRCRegClass); in PPCEmitLoad()
493 Opc = Is32BitInt ? PPC::LBZ : PPC::LBZ8; in PPCEmitLoad()
496 Opc = (IsZExt ? (Is32BitInt ? PPC::LHZ : PPC::LHZ8) in PPCEmitLoad()
497 : (Is32BitInt ? PPC::LHA : PPC::LHA8)); in PPCEmitLoad()
500 Opc = (IsZExt ? (Is32BitInt ? PPC::LWZ : PPC::LWZ8) in PPCEmitLoad()
501 : (Is32BitInt ? PPC::LWA_32 : PPC::LWA)); in PPCEmitLoad()
502 if ((Opc == PPC::LWA || Opc == PPC::LWA_32) && ((Addr.Offset & 3) != 0)) in PPCEmitLoad()
506 Opc = PPC::LD; in PPCEmitLoad()
507 assert(UseRC->hasSuperClassEq(&PPC::G8RCRegClass) && in PPCEmitLoad()
512 Opc = PPCSubTarget->hasSPE() ? PPC::SPELWZ : PPC::LFS; in PPCEmitLoad()
528 bool Is32VSXLoad = IsVSSRC && Opc == PPC::LFS; in PPCEmitLoad()
529 bool Is64VSXLoad = IsVSFRC && Opc == PPC::LFD; in PPCEmitLoad()
570 case PPC::LBZ: Opc = PPC::LBZX; break; in PPCEmitLoad()
571 case PPC::LBZ8: Opc = PPC::LBZX8; break; in PPCEmitLoad()
572 case PPC::LHZ: Opc = PPC::LHZX; break; in PPCEmitLoad()
573 case PPC::LHZ8: Opc = PPC::LHZX8; break; in PPCEmitLoad()
574 case PPC::LHA: Opc = PPC::LHAX; break; in PPCEmitLoad()
575 case PPC::LHA8: Opc = PPC::LHAX8; break; in PPCEmitLoad()
576 case PPC::LWZ: Opc = PPC::LWZX; break; in PPCEmitLoad()
577 case PPC::LWZ8: Opc = PPC::LWZX8; break; in PPCEmitLoad()
578 case PPC::LWA: Opc = PPC::LWAX; break; in PPCEmitLoad()
579 case PPC::LWA_32: Opc = PPC::LWAX_32; break; in PPCEmitLoad()
580 case PPC::LD: Opc = PPC::LDX; break; in PPCEmitLoad()
581 case PPC::LFS: Opc = IsVSSRC ? PPC::LXSSPX : PPC::LFSX; break; in PPCEmitLoad()
582 case PPC::LFD: Opc = IsVSFRC ? PPC::LXSDX : PPC::LFDX; break; in PPCEmitLoad()
583 case PPC::EVLDD: Opc = PPC::EVLDDX; break; in PPCEmitLoad()
584 case PPC::SPELWZ: Opc = PPC::SPELWZX; break; in PPCEmitLoad()
597 MIB.addReg(PPC::ZERO8).addReg(Addr.Base.Reg); in PPCEmitLoad()
628 PPCSubTarget->hasSPE() ? PPC::EVLDD : PPC::LFD)) in SelectLoad()
641 bool Is32BitInt = RC->hasSuperClassEq(&PPC::GPRCRegClass); in PPCEmitStore()
647 Opc = Is32BitInt ? PPC::STB : PPC::STB8; in PPCEmitStore()
650 Opc = Is32BitInt ? PPC::STH : PPC::STH8; in PPCEmitStore()
654 Opc = PPC::STW; in PPCEmitStore()
657 Opc = PPC::STD; in PPCEmitStore()
661 Opc = PPCSubTarget->hasSPE() ? PPC::SPESTW : PPC::STFS; in PPCEmitStore()
664 Opc = PPCSubTarget->hasSPE() ? PPC::EVSTDD : PPC::STFD; in PPCEmitStore()
677 bool Is32VSXStore = IsVSSRC && Opc == PPC::STFS; in PPCEmitStore()
678 bool Is64VSXStore = IsVSFRC && Opc == PPC::STFD; in PPCEmitStore()
720 case PPC::STB: Opc = PPC::STBX; break; in PPCEmitStore()
721 case PPC::STH : Opc = PPC::STHX; break; in PPCEmitStore()
722 case PPC::STW : Opc = PPC::STWX; break; in PPCEmitStore()
723 case PPC::STB8: Opc = PPC::STBX8; break; in PPCEmitStore()
724 case PPC::STH8: Opc = PPC::STHX8; break; in PPCEmitStore()
725 case PPC::STW8: Opc = PPC::STWX8; break; in PPCEmitStore()
726 case PPC::STD: Opc = PPC::STDX; break; in PPCEmitStore()
727 case PPC::STFS: Opc = IsVSSRC ? PPC::STXSSPX : PPC::STFSX; break; in PPCEmitStore()
728 case PPC::STFD: Opc = IsVSFRC ? PPC::STXSDX : PPC::STFDX; break; in PPCEmitStore()
729 case PPC::EVSTDD: Opc = PPC::EVSTDDX; break; in PPCEmitStore()
730 case PPC::SPESTW: Opc = PPC::SPESTWX; break; in PPCEmitStore()
743 MIB.addReg(PPC::ZERO8).addReg(Addr.Base.Reg); in PPCEmitStore()
789 Optional<PPC::Predicate> OptPPCPred = getComparePred(CI->getPredicate()); in SelectBranch()
793 PPC::Predicate PPCPred = OptPPCPred.getValue(); in SelectBranch()
798 PPCPred = PPC::InvertPredicate(PPCPred); in SelectBranch()
801 unsigned CondReg = createResultReg(&PPC::CRRCRegClass); in SelectBranch()
807 BuildMI(*BrBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::BCC)) in SelectBranch()
808 .addImm(PPCSubTarget->hasSPE() ? PPC::PRED_SPE : PPCPred) in SelectBranch()
834 const PPC::Predicate Pred) { in PPCEmitCmp()
884 case PPC::PRED_EQ: in PPCEmitCmp()
885 CmpOpc = PPC::EFSCMPEQ; in PPCEmitCmp()
887 case PPC::PRED_LT: in PPCEmitCmp()
888 CmpOpc = PPC::EFSCMPLT; in PPCEmitCmp()
890 case PPC::PRED_GT: in PPCEmitCmp()
891 CmpOpc = PPC::EFSCMPGT; in PPCEmitCmp()
895 CmpOpc = PPC::FCMPUS; in PPCEmitCmp()
897 unsigned TmpReg = createResultReg(&PPC::F4RCRegClass); in PPCEmitCmp()
908 case PPC::PRED_EQ: in PPCEmitCmp()
909 CmpOpc = PPC::EFDCMPEQ; in PPCEmitCmp()
911 case PPC::PRED_LT: in PPCEmitCmp()
912 CmpOpc = PPC::EFDCMPLT; in PPCEmitCmp()
914 case PPC::PRED_GT: in PPCEmitCmp()
915 CmpOpc = PPC::EFDCMPGT; in PPCEmitCmp()
919 CmpOpc = PPC::XSCMPUDP; in PPCEmitCmp()
921 CmpOpc = PPC::FCMPUD; in PPCEmitCmp()
931 CmpOpc = IsZExt ? PPC::CMPLW : PPC::CMPW; in PPCEmitCmp()
933 CmpOpc = IsZExt ? PPC::CMPLWI : PPC::CMPWI; in PPCEmitCmp()
937 CmpOpc = IsZExt ? PPC::CMPLD : PPC::CMPD; in PPCEmitCmp()
939 CmpOpc = IsZExt ? PPC::CMPLDI : PPC::CMPDI; in PPCEmitCmp()
944 unsigned ExtReg = createResultReg(&PPC::GPRCRegClass); in PPCEmitCmp()
950 unsigned ExtReg = createResultReg(&PPC::GPRCRegClass); in PPCEmitCmp()
1002 DestReg = createResultReg(&PPC::SPE4RCRegClass); in SelectFPTrunc()
1004 TII.get(PPC::EFSCFD), DestReg) in SelectFPTrunc()
1007 DestReg = createResultReg(&PPC::F4RCRegClass); in SelectFPTrunc()
1009 TII.get(PPC::FRSP), DestReg) in SelectFPTrunc()
1029 unsigned TmpReg = createResultReg(&PPC::G8RCRegClass); in PPCMoveToFPReg()
1046 unsigned LoadOpc = PPC::LFD; in PPCMoveToFPReg()
1050 LoadOpc = PPC::LFIWZX; in PPCMoveToFPReg()
1053 LoadOpc = PPC::LFIWAX; in PPCMoveToFPReg()
1058 const TargetRegisterClass *RC = &PPC::F8RCRegClass; in PPCMoveToFPReg()
1097 Opc = IsSigned ? PPC::EFSCFSI : PPC::EFSCFUI; in SelectIToFP()
1099 Opc = IsSigned ? PPC::EFDCFSI : PPC::EFDCFUI; in SelectIToFP()
1101 unsigned DestReg = createResultReg(&PPC::SPERCRegClass); in SelectIToFP()
1124 unsigned TmpReg = createResultReg(&PPC::G8RCRegClass); in SelectIToFP()
1137 const TargetRegisterClass *RC = &PPC::F8RCRegClass; in SelectIToFP()
1142 Opc = IsSigned ? PPC::FCFIDS : PPC::FCFIDUS; in SelectIToFP()
1144 Opc = IsSigned ? PPC::FCFID : PPC::FCFIDU; in SelectIToFP()
1223 if (InRC == &PPC::F4RCRegClass) { in SelectFPToI()
1224 unsigned TmpReg = createResultReg(&PPC::F8RCRegClass); in SelectFPToI()
1237 DestReg = createResultReg(&PPC::GPRCRegClass); in SelectFPToI()
1239 Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTSIZ : PPC::EFDCTSIZ; in SelectFPToI()
1241 Opc = InRC == &PPC::SPE4RCRegClass ? PPC::EFSCTUIZ : PPC::EFDCTUIZ; in SelectFPToI()
1243 DestReg = createResultReg(&PPC::F8RCRegClass); in SelectFPToI()
1246 Opc = PPC::FCTIWZ; in SelectFPToI()
1248 Opc = PPCSubTarget->hasFPCVT() ? PPC::FCTIWUZ : PPC::FCTIDZ; in SelectFPToI()
1250 Opc = IsSigned ? PPC::FCTIDZ : PPC::FCTIDUZ; in SelectFPToI()
1284 &PPC::GPRC_and_GPRC_NOR0RegClass); in SelectBinaryIntOp()
1285 bool IsGPRC = RC->hasSuperClassEq(&PPC::GPRCRegClass); in SelectBinaryIntOp()
1291 Opc = IsGPRC ? PPC::ADD4 : PPC::ADD8; in SelectBinaryIntOp()
1294 Opc = IsGPRC ? PPC::OR : PPC::OR8; in SelectBinaryIntOp()
1297 Opc = IsGPRC ? PPC::SUBF : PPC::SUBF8; in SelectBinaryIntOp()
1301 unsigned ResultReg = createResultReg(RC ? RC : &PPC::G8RCRegClass); in SelectBinaryIntOp()
1314 case PPC::ADD4: in SelectBinaryIntOp()
1315 Opc = PPC::ADDI; in SelectBinaryIntOp()
1316 MRI.setRegClass(SrcReg1, &PPC::GPRC_and_GPRC_NOR0RegClass); in SelectBinaryIntOp()
1318 case PPC::ADD8: in SelectBinaryIntOp()
1319 Opc = PPC::ADDI8; in SelectBinaryIntOp()
1320 MRI.setRegClass(SrcReg1, &PPC::G8RC_and_G8RC_NOX0RegClass); in SelectBinaryIntOp()
1322 case PPC::OR: in SelectBinaryIntOp()
1323 Opc = PPC::ORI; in SelectBinaryIntOp()
1325 case PPC::OR8: in SelectBinaryIntOp()
1326 Opc = PPC::ORI8; in SelectBinaryIntOp()
1328 case PPC::SUBF: in SelectBinaryIntOp()
1332 Opc = PPC::ADDI; in SelectBinaryIntOp()
1333 MRI.setRegClass(SrcReg1, &PPC::GPRC_and_GPRC_NOR0RegClass); in SelectBinaryIntOp()
1337 case PPC::SUBF8: in SelectBinaryIntOp()
1341 Opc = PPC::ADDI8; in SelectBinaryIntOp()
1342 MRI.setRegClass(SrcReg1, &PPC::G8RC_and_G8RC_NOX0RegClass); in SelectBinaryIntOp()
1427 unsigned NextGPR = PPC::X3; in processCallArgs()
1428 unsigned NextFPR = PPC::F1; in processCallArgs()
1445 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in processCallArgs()
1457 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in processCallArgs()
1532 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::FRSP), in finishCall()
1540 ResultReg = createResultReg(&PPC::GPRCRegClass); in finishCall()
1542 SourcePhysReg -= PPC::X0 - PPC::R0; in finishCall()
1662 MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::NOP)); in fastLowerCall()
1669 TII.get(PPC::BL8_NOP)); in fastLowerCall()
1681 MIB.addReg(PPC::X2, RegState::Implicit); in fastLowerCall()
1774 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in SelectRet()
1783 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in SelectRet()
1801 TII.get(PPC::BLR8)); in SelectRet()
1823 Opc = (DestVT == MVT::i32) ? PPC::EXTSB : PPC::EXTSB8_32_64; in PPCEmitIntExt()
1825 Opc = (DestVT == MVT::i32) ? PPC::EXTSH : PPC::EXTSH8_32_64; in PPCEmitIntExt()
1828 Opc = PPC::EXTSW_32_64; in PPCEmitIntExt()
1842 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::RLWINM), in PPCEmitIntExt()
1856 TII.get(PPC::RLDICL_32_64), DestReg) in PPCEmitIntExt()
1869 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::MTCTR8)) in SelectIndirectBr()
1871 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::BCTR8)); in SelectIndirectBr()
1898 unsigned ResultReg = createResultReg(&PPC::GPRCRegClass); in SelectTrunc()
1901 ResultReg).addReg(SrcReg, 0, PPC::sub_32); in SelectTrunc()
1937 (DestVT == MVT::i64 ? &PPC::G8RC_and_G8RC_NOX0RegClass : in SelectIntExt()
1938 &PPC::GPRC_and_GPRC_NOR0RegClass)); in SelectIntExt()
2011 RC = ((VT == MVT::f32) ? &PPC::SPE4RCRegClass : &PPC::SPERCRegClass); in PPCMaterializeFP()
2013 RC = ((VT == MVT::f32) ? &PPC::F4RCRegClass : &PPC::F8RCRegClass); in PPCMaterializeFP()
2025 Opc = ((VT == MVT::f32) ? PPC::SPELWZ : PPC::EVLDD); in PPCMaterializeFP()
2027 Opc = ((VT == MVT::f32) ? PPC::LFS : PPC::LFD); in PPCMaterializeFP()
2029 unsigned TmpReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); in PPCMaterializeFP()
2034 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::LDtocCPT), in PPCMaterializeFP()
2036 .addConstantPoolIndex(Idx).addReg(PPC::X2); in PPCMaterializeFP()
2041 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::ADDIStocHA), in PPCMaterializeFP()
2042 TmpReg).addReg(PPC::X2).addConstantPoolIndex(Idx); in PPCMaterializeFP()
2046 unsigned TmpReg2 = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); in PPCMaterializeFP()
2047 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::LDtocL), in PPCMaterializeFP()
2066 const TargetRegisterClass *RC = &PPC::G8RC_and_G8RC_NOX0RegClass; in PPCMaterializeGV()
2085 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::LDtoc), in PPCMaterializeGV()
2088 .addReg(PPC::X2); in PPCMaterializeGV()
2099 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::ADDIStocHA), in PPCMaterializeGV()
2100 HighPartReg).addReg(PPC::X2).addGlobalAddress(GV); in PPCMaterializeGV()
2104 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::LDtocL), in PPCMaterializeGV()
2108 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::ADDItocL), in PPCMaterializeGV()
2124 bool IsGPRC = RC->hasSuperClassEq(&PPC::GPRCRegClass); in PPCMaterialize32BitInt()
2128 TII.get(IsGPRC ? PPC::LI : PPC::LI8), ResultReg) in PPCMaterialize32BitInt()
2134 TII.get(IsGPRC ? PPC::LIS : PPC::LIS8), TmpReg) in PPCMaterialize32BitInt()
2137 TII.get(IsGPRC ? PPC::ORI : PPC::ORI8), ResultReg) in PPCMaterialize32BitInt()
2142 TII.get(IsGPRC ? PPC::LIS : PPC::LIS8), ResultReg) in PPCMaterialize32BitInt()
2181 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::RLDICR), in PPCMaterialize64BitInt()
2189 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::ORIS8), in PPCMaterialize64BitInt()
2196 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::ORI8), in PPCMaterialize64BitInt()
2211 unsigned ImmReg = createResultReg(&PPC::CRBITRCRegClass); in PPCMaterializeInt()
2213 TII.get(CI->isZero() ? PPC::CRUNSET : PPC::CRSET), ImmReg); in PPCMaterializeInt()
2222 ((VT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass); in PPCMaterializeInt()
2230 unsigned Opc = (VT == MVT::i64) ? PPC::LI8 : PPC::LI; in PPCMaterializeInt()
2283 unsigned ResultReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); in fastMaterializeAlloca()
2284 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(PPC::ADDI8), in fastMaterializeAlloca()
2313 case PPC::RLDICL: in tryToFoldLoadIntoMI()
2314 case PPC::RLDICL_32_64: { in tryToFoldLoadIntoMI()
2324 case PPC::RLWINM: in tryToFoldLoadIntoMI()
2325 case PPC::RLWINM8: { in tryToFoldLoadIntoMI()
2334 case PPC::EXTSB: in tryToFoldLoadIntoMI()
2335 case PPC::EXTSB8: in tryToFoldLoadIntoMI()
2336 case PPC::EXTSB8_32_64: in tryToFoldLoadIntoMI()
2340 case PPC::EXTSH: in tryToFoldLoadIntoMI()
2341 case PPC::EXTSH8: in tryToFoldLoadIntoMI()
2342 case PPC::EXTSH8_32_64: { in tryToFoldLoadIntoMI()
2348 case PPC::EXTSW: in tryToFoldLoadIntoMI()
2349 case PPC::EXTSW_32: in tryToFoldLoadIntoMI()
2350 case PPC::EXTSW_32_64: { in tryToFoldLoadIntoMI()
2365 PPCSubTarget->hasSPE() ? PPC::EVLDD : PPC::LFD)) in tryToFoldLoadIntoMI()
2393 unsigned ImmReg = createResultReg(&PPC::CRBITRCRegClass); in fastEmit_i()
2395 TII.get(Imm == 0 ? PPC::CRUNSET : PPC::CRSET), ImmReg); in fastEmit_i()
2403 const TargetRegisterClass *RC = ((VT == MVT::i64) ? &PPC::G8RCRegClass : in fastEmit_i()
2404 &PPC::GPRCRegClass); in fastEmit_i()
2426 if (MachineInstOpcode == PPC::ADDI) in fastEmitInst_ri()
2427 MRI.setRegClass(Op0, &PPC::GPRC_and_GPRC_NOR0RegClass); in fastEmitInst_ri()
2428 else if (MachineInstOpcode == PPC::ADDI8) in fastEmitInst_ri()
2429 MRI.setRegClass(Op0, &PPC::G8RC_and_G8RC_NOX0RegClass); in fastEmitInst_ri()
2432 (RC == &PPC::GPRCRegClass ? &PPC::GPRC_and_GPRC_NOR0RegClass : in fastEmitInst_ri()
2433 (RC == &PPC::G8RCRegClass ? &PPC::G8RC_and_G8RC_NOX0RegClass : RC)); in fastEmitInst_ri()
2446 (RC == &PPC::GPRCRegClass ? &PPC::GPRC_and_GPRC_NOR0RegClass : in fastEmitInst_r()
2447 (RC == &PPC::G8RCRegClass ? &PPC::G8RC_and_G8RC_NOX0RegClass : RC)); in fastEmitInst_r()
2460 (RC == &PPC::GPRCRegClass ? &PPC::GPRC_and_GPRC_NOR0RegClass : in fastEmitInst_rr()
2461 (RC == &PPC::G8RCRegClass ? &PPC::G8RC_and_G8RC_NOX0RegClass : RC)); in fastEmitInst_rr()
2469 FastISel *PPC::createFastISel(FunctionLoweringInfo &FuncInfo, in createFastISel()