| /freebsd-12.1/contrib/llvm/include/llvm/CodeGen/ |
| H A D | RuntimeLibcalls.h | 38 Libcall getFPEXT(EVT OpVT, EVT RetVT); 42 Libcall getFPROUND(EVT OpVT, EVT RetVT); 46 Libcall getFPTOSINT(EVT OpVT, EVT RetVT); 50 Libcall getFPTOUINT(EVT OpVT, EVT RetVT); 54 Libcall getSINTTOFP(EVT OpVT, EVT RetVT); 58 Libcall getUINTTOFP(EVT OpVT, EVT RetVT);
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| H A D | SelectionDAG.h | 591 SDValue getBoolConstant(bool V, const SDLoc &DL, EVT VT, EVT OpVT); 795 SDValue getBoolExtOrTrunc(SDValue Op, const SDLoc &SL, EVT VT, EVT OpVT);
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 181 if (OpVT == MVT::f16) { in getFPEXT() 208 if (OpVT == MVT::f32) in getFPROUND() 210 if (OpVT == MVT::f64) in getFPROUND() 212 if (OpVT == MVT::f80) in getFPROUND() 219 if (OpVT == MVT::f64) in getFPROUND() 221 if (OpVT == MVT::f80) in getFPROUND() 228 if (OpVT == MVT::f80) in getFPROUND() 245 if (OpVT == MVT::f32) { in getFPTOSINT() 287 if (OpVT == MVT::f32) { in getFPTOUINT() 329 if (OpVT == MVT::i32) { in getSINTTOFP() [all …]
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| /freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 2057 EVT OpVT = N0.getValueType(); in simplifySetCCWithAnd() local 2074 SDValue Zero = DAG.getConstant(0, DL, OpVT); in simplifySetCCWithAnd() 2098 SDValue NotX = DAG.getNOT(SDLoc(X), X, OpVT); in simplifySetCCWithAnd() 2210 EVT OpVT = N0.getValueType(); in SimplifySetCC() local 3034 EVT OpVT = N0.getValueType(); in SimplifySetCC() local 3039 N0 = DAG.getNOT(dl, Temp, OpVT); in SimplifySetCC() 3044 N0 = DAG.getNode(ISD::XOR, dl, OpVT, N0, N1); in SimplifySetCC() 3048 Temp = DAG.getNOT(dl, N0, OpVT); in SimplifySetCC() 3055 Temp = DAG.getNOT(dl, N1, OpVT); in SimplifySetCC() 3062 Temp = DAG.getNOT(dl, N0, OpVT); in SimplifySetCC() [all …]
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| H A D | SelectionDAG.cpp | 1119 EVT OpVT) { in getBoolExtOrTrunc() argument 1153 EVT OpVT) { in getBoolConstant() argument 1157 switch (TLI->getBooleanContents(OpVT)) { in getBoolConstant() 1948 EVT OpVT = N1.getValueType(); in FoldSetCC() local 2001 OpVT); in FoldSetCC() 2007 OpVT); in FoldSetCC() 3235 EVT OpVT = Val.getValueType(); in isKnownToBeAPowerOfTwo() local 3236 unsigned BitWidth = OpVT.getScalarSizeInBits(); in isKnownToBeAPowerOfTwo() 4042 EVT OpVT = Op.getValueType(); in FoldCONCAT_VECTORS() local 4954 Ops.push_back(getUNDEF(OpVT)); in getNode() [all …]
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| H A D | LegalizeVectorTypes.cpp | 316 EVT OpVT = Op.getValueType(); in ScalarizeVecRes_UnaryOp() local 328 EVT VT = OpVT.getVectorElementType(); in ScalarizeVecRes_UnaryOp() 348 EVT OpVT = Op.getValueType(); in ScalarizeVecRes_VecInregOp() local 349 EVT OpEltVT = OpVT.getVectorElementType(); in ScalarizeVecRes_VecInregOp() 384 EVT OpVT = Cond.getValueType(); in ScalarizeVecRes_VSELECT() local 392 EVT VT = OpVT.getVectorElementType(); in ScalarizeVecRes_VSELECT() 412 EVT OpVT = Cond->getOperand(0).getValueType(); in ScalarizeVecRes_VSELECT() local 414 VecBool = TLI.getBooleanContents(OpVT); in ScalarizeVecRes_VSELECT() 485 EVT OpVT = LHS.getValueType(); in ScalarizeVecRes_SETCC() local 494 EVT VT = OpVT.getVectorElementType(); in ScalarizeVecRes_SETCC() [all …]
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| H A D | ScheduleDAGSDNodes.cpp | 461 EVT OpVT = N->getOperand(i).getValueType(); in AddSchedEdges() local 462 assert(OpVT != MVT::Glue && "Glued nodes should be in same sunit!"); in AddSchedEdges() 463 bool isChain = OpVT == MVT::Other; in AddSchedEdges()
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| H A D | InstrEmitter.cpp | 398 MVT OpVT = Op.getSimpleValueType(); in AddOperand() local 400 TLI->isTypeLegal(OpVT) ? TLI->getRegClassFor(OpVT) : nullptr; in AddOperand()
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| H A D | LegalizeDAG.cpp | 1019 Action = TLI.getCondCodeAction(CCCode, OpVT); in LegalizeOp() 1622 MVT OpVT = LHS.getSimpleValueType(); in LegalizeSetCCCondCode() local 1626 switch (TLI.getCondCodeAction(CCCode, OpVT)) { in LegalizeSetCCCondCode() 1633 if (TLI.isCondCodeLegalOrCustom(InvCC, OpVT)) { in LegalizeSetCCCondCode() 1640 if (!TLI.isCondCodeLegalOrCustom(InvCC, OpVT)) { in LegalizeSetCCCondCode() 1646 if (TLI.isCondCodeLegalOrCustom(InvCC, OpVT)) { in LegalizeSetCCCondCode() 1659 assert(TLI.isCondCodeLegal(ISD::SETOEQ, OpVT) in LegalizeSetCCCondCode() 1663 assert(TLI.isCondCodeLegal(ISD::SETUNE, OpVT) in LegalizeSetCCCondCode() 1679 if (!OpVT.isInteger()) { in LegalizeSetCCCondCode() 1883 EVT OpVT = Node->getOperand(0).getValueType(); in ExpandBUILD_VECTOR() local [all …]
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| H A D | LegalizeFloatTypes.cpp | 1740 static ISD::NodeType GetPromotionOpcode(EVT OpVT, EVT RetVT) { in GetPromotionOpcode() argument 1741 if (OpVT == MVT::f16) { in GetPromotionOpcode() 1784 EVT OpVT = Op->getValueType(0); in PromoteFloatOp_BITCAST() local 1790 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), OpVT.getSizeInBits()); in PromoteFloatOp_BITCAST() 1791 SDValue Convert = DAG.getNode(GetPromotionOpcode(PromotedVT, OpVT), SDLoc(N), in PromoteFloatOp_BITCAST() 2100 EVT OpVT = Op->getValueType(0); in PromoteFloatRes_FP_ROUND() local 2105 SDValue Round = DAG.getNode(GetPromotionOpcode(OpVT, VT), DL, IVT, Op); in PromoteFloatRes_FP_ROUND()
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| H A D | LegalizeTypes.cpp | 304 EVT OpVT = Op.getValueType(); in run() local 305 switch (getTypeAction(OpVT)) { in run()
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| H A D | DAGCombiner.cpp | 3999 EVT OpVT = LL.getValueType(); in foldLogicOfSetCCs() local 4001 if (VT != getSetCCResultType(OpVT)) in foldLogicOfSetCCs() 4003 if (OpVT != RL.getValueType()) in foldLogicOfSetCCs() 4008 bool IsInteger = OpVT.isInteger(); in foldLogicOfSetCCs() 11912 EVT OpVT = N0.getValueType(); in visitSINT_TO_FP() local 11924 hasOperation(ISD::UINT_TO_FP, OpVT)) { in visitSINT_TO_FP() 11969 EVT OpVT = N0.getValueType(); in visitUINT_TO_FP() local 15575 EVT OpVT = Ops[0].getValueType(); in visitINSERT_VECTOR_ELT() local 15576 Ops[Elt] = OpVT.isInteger() ? DAG.getAnyExtOrTrunc(InVal, DL, OpVT) : InVal; in visitINSERT_VECTOR_ELT() 16611 if (TLI.isTypeLegal(OpVT)) in combineConcatVectorOfScalars() [all …]
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| H A D | LegalizeIntegerTypes.cpp | 1283 EVT OpVT = N->getOpcode() == ISD::SELECT ? OpTy.getScalarType() : OpTy; in PromoteIntOp_SELECT() local 1284 Cond = PromoteTargetBoolean(Cond, OpVT); in PromoteIntOp_SELECT()
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| /freebsd-12.1/contrib/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 2363 EVT OpVT = Op.getOperand(0).getValueType(); in LowerSINT_TO_FP() local 2364 assert(OpVT == MVT::i32 || (OpVT == MVT::i64)); in LowerSINT_TO_FP() 2366 EVT floatVT = (OpVT == MVT::i32) ? MVT::f32 : MVT::f64; in LowerSINT_TO_FP() 2370 && (!hasHardQuad || !TLI.isTypeLegal(OpVT))) { in LowerSINT_TO_FP() 2371 const char *libName = TLI.getLibcallName(OpVT == MVT::i32 in LowerSINT_TO_FP() 2378 if (!TLI.isTypeLegal(OpVT)) in LowerSINT_TO_FP() 2383 unsigned opcode = (OpVT == MVT::i32)? SPISD::ITOF : SPISD::XTOF; in LowerSINT_TO_FP() 2412 EVT OpVT = Op.getOperand(0).getValueType(); in LowerUINT_TO_FP() local 2413 assert(OpVT == MVT::i32 || OpVT == MVT::i64); in LowerUINT_TO_FP() 2417 if (Op.getValueType() != MVT::f128 || (hasHardQuad && TLI.isTypeLegal(OpVT))) in LowerUINT_TO_FP() [all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/X86/ |
| H A D | X86InstrSSE.td | 2305 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2)))]>, 6261 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2)))]>, 6269 (OpVT (OpNode RC:$src1, (memop_frag addr:$src2))))]>, 6889 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2)))]>, 6897 (OpVT (OpNode RC:$src1, (memop_frag addr:$src2))))]>, 8079 ValueType OpVT, X86FoldableSchedWrite Sched, 8094 (OpVT (X86VPermv VR256:$src1, 8120 (OpVT (X86VPermi (mem_frag addr:$src1), 8433 multiclass GF2P8MULB_rm<string OpcodeStr, ValueType OpVT, 8446 [(set RC:$dst, (OpVT (X86GF2P8mulb RC:$src1, [all …]
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| H A D | X86ISelLowering.cpp | 5499 MVT WideOpVT = OpVT; in insert1BitVector() 16664 if (!OpVT.is128BitVector()) { in LowerSCALAR_TO_VECTOR() 16678 if (OpVT == MVT::v4i32) in LowerSCALAR_TO_VECTOR() 18725 assert((OpVT == MVT::f32 || OpVT == MVT::f64) && in LowerFGETSIGN() 23410 MVT OpVT = VT; in LowerCTLZ() local 23421 OpVT = MVT::i32; in LowerCTLZ() 39735 EVT OpVT = X.getValueType(); in combineVectorSizedSetCCEquality() local 39808 EVT OpVT = LHS.getValueType(); in combineSetCC() local 41326 Vec = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, OpVT, DAG.getUNDEF(OpVT), in combineInsertSubvector() 41392 OpVT, SDLoc(N), in combineExtractSubvector() [all …]
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| H A D | X86InstrFMA.td | 389 X86MemOperand x86memop, ValueType OpVT, SDNode OpNode, 397 (OpVT (OpNode RC:$src1, RC:$src2, RC:$src3)))]>, VEX_W, VEX_LIG,
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| H A D | X86ISelDAGToDAG.cpp | 492 EVT OpVT = N->getOperand(0).getValueType(); in isLegalMaskCompare() local 493 if (OpVT.is256BitVector() || OpVT.is128BitVector()) in isLegalMaskCompare()
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| /freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1928 EVT OpVT = Ops[0].getValueType(); in PerformDAGCombine() local 1929 if (InVal.getValueType() != OpVT) in PerformDAGCombine() 1930 InVal = OpVT.bitsGT(InVal.getValueType()) ? in PerformDAGCombine() 1931 DAG.getNode(ISD::ANY_EXTEND, DL, OpVT, InVal) : in PerformDAGCombine() 1932 DAG.getNode(ISD::TRUNCATE, DL, OpVT, InVal); in PerformDAGCombine()
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| /freebsd-12.1/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 1158 EVT OpVT = OpI1.getValueType(); in ppHoistZextI1() local 1159 if (!OpVT.isSimple() || OpVT.getSimpleVT() != MVT::i1) in ppHoistZextI1()
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| H A D | HexagonISelLowering.cpp | 873 EVT OpVT = Op1.getValueType(); in LowerVSELECT() local 876 if (OpVT == MVT::v2i16) { in LowerVSELECT()
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| /freebsd-12.1/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 4931 EVT OpVT = (VT == MVT::f32) ? MVT::v2i32 : MVT::v1i64; in LowerFCOPYSIGN() local 4933 Mask = DAG.getNode(ARMISD::VSHL, dl, OpVT, in LowerFCOPYSIGN() 4934 DAG.getNode(ISD::BITCAST, dl, OpVT, Mask), in LowerFCOPYSIGN() 4941 Tmp1 = DAG.getNode(ARMISD::VSHL, dl, OpVT, in LowerFCOPYSIGN() 4942 DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1), in LowerFCOPYSIGN() 4948 Tmp0 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp0); in LowerFCOPYSIGN() 4949 Tmp1 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1); in LowerFCOPYSIGN() 4954 SDValue MaskNot = DAG.getNode(ISD::XOR, dl, OpVT, Mask, in LowerFCOPYSIGN() 4957 SDValue Res = DAG.getNode(ISD::OR, dl, OpVT, in LowerFCOPYSIGN() 4958 DAG.getNode(ISD::AND, dl, OpVT, Tmp1, Mask), in LowerFCOPYSIGN() [all …]
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| /freebsd-12.1/contrib/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 5158 EVT OpVT = Op.getValueType(); in combineExtract() local 5159 unsigned OpBytesPerElement = OpVT.getVectorElementType().getStoreSize(); in combineExtract() 5188 EVT OpVT = Op.getOperand(0).getValueType(); in combineExtract() local 5190 unsigned OpBytesPerElement = OpVT.getVectorElementType().getStoreSize(); in combineExtract()
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| /freebsd-12.1/contrib/llvm/utils/TableGen/ |
| H A D | CodeGenDAGPatterns.cpp | 2339 MVT::SimpleValueType OpVT = Int->IS.ParamVTs[i]; in ApplyTypeConstraints() local 2341 MadeChange |= getChild(i+1)->UpdateNodeType(0, OpVT, TP); in ApplyTypeConstraints()
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| /freebsd-12.1/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 11949 EVT OpVT = LHS.getValueType(); in combineSetCC() local 11950 SDValue Add = DAG.getNode(ISD::ADD, DL, OpVT, LHS, RHS.getOperand(1)); in combineSetCC() 11951 return DAG.getSetCC(DL, VT, Add, DAG.getConstant(0, DL, OpVT), CC); in combineSetCC()
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