Searched refs:BitShift (Results 1 – 6 of 6) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Support/ |
| H A D | APInt.cpp | 1028 unsigned BitShift = ShiftAmt % APINT_BITS_PER_WORD; in ashrSlowCase() local
1037 if (BitShift == 0) { in ashrSlowCase()
1042 U.pVal[i] = (U.pVal[i + WordShift] >> BitShift) | in ashrSlowCase()
2668 unsigned BitShift = Count % APINT_BITS_PER_WORD; in tcShiftLeft() local
2671 if (BitShift == 0) { in tcShiftLeft()
2675 Dst[Words] = Dst[Words - WordShift] << BitShift; in tcShiftLeft()
2678 Dst[Words - WordShift - 1] >> (APINT_BITS_PER_WORD - BitShift); in tcShiftLeft()
2695 unsigned BitShift = Count % APINT_BITS_PER_WORD; in tcShiftRight() local
2699 if (BitShift == 0) { in tcShiftRight()
2703 Dst[i] = Dst[i + WordShift] >> BitShift; in tcShiftRight()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Utils/ |
| H A D | Local.cpp | 2977 const APInt &BitShift = *C; in collectBitParts() local
2980 if (BitShift.uge(BitWidth)) in collectBitParts()
2984 if (!MatchBitReversals && (BitShift.getZExtValue() % 8) != 0) in collectBitParts()
2996 P.erase(std::prev(P.end(), BitShift.getZExtValue()), P.end()); in collectBitParts()
2997 P.insert(P.begin(), BitShift.getZExtValue(), BitPart::Unset); in collectBitParts()
2999 P.erase(P.begin(), std::next(P.begin(), BitShift.getZExtValue())); in collectBitParts()
3000 P.insert(P.end(), BitShift.getZExtValue(), BitPart::Unset); in collectBitParts()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 4212 SDValue BitShift = DAG.getNode(ISD::SHL, DL, PtrVT, Addr, in lowerATOMIC_LOAD_OP() local
4214 BitShift = DAG.getNode(ISD::TRUNCATE, DL, WideVT, BitShift); in lowerATOMIC_LOAD_OP()
4236 SDValue Ops[] = { ChainIn, AlignedAddr, Src2, BitShift, NegBitShift, in lowerATOMIC_LOAD_OP()
4243 SDValue ResultShift = DAG.getNode(ISD::ADD, DL, WideVT, BitShift, in lowerATOMIC_LOAD_OP()
4328 SDValue BitShift = DAG.getNode(ISD::SHL, DL, PtrVT, Addr, in lowerATOMIC_CMP_SWAP() local
4330 BitShift = DAG.getNode(ISD::TRUNCATE, DL, WideVT, BitShift); in lowerATOMIC_CMP_SWAP()
4339 SDValue Ops[] = { ChainIn, AlignedAddr, CmpVal, SwapVal, BitShift, in lowerATOMIC_CMP_SWAP()
7844 .addReg(OldVal).addReg(BitShift).addImm(0); in emitAtomicLoadBinary()
7960 .addReg(OldVal).addReg(BitShift).addImm(0); in emitAtomicLoadMinMax()
8021 Register BitShift = MI.getOperand(5).getReg(); in emitAtomicCmpSwapW() local
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 1147 SDValue BitShift = DAG.getNode(ISD::SHL, DL, VT, ByteIndex, in LowerSTORE() local
1151 SDValue Mask = DAG.getNode(ISD::SHL, DL, VT, MaskConstant, BitShift); in LowerSTORE()
1155 SDValue ShiftedValue = DAG.getNode(ISD::SHL, DL, VT, TruncValue, BitShift); in LowerSTORE()
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | ConstantFolding.cpp | 77 unsigned BitShift = DL.getTypeSizeInBits(SrcEltTy); in foldConstVectorToAPInt() local
86 Result <<= BitShift; in foldConstVectorToAPInt()
94 Result <<= BitShift; in foldConstVectorToAPInt()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7815 uint64_t BitShift = ShiftOp->getZExtValue(); in calculateByteProvider() local
7816 if (BitShift % 8 != 0) in calculateByteProvider()
7818 uint64_t ByteShift = BitShift / 8; in calculateByteProvider()
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