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Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init |
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72a23cef |
| 01-Jul-2022 |
Xiang1 Zhang <[email protected]> |
[ISel] Match all bits when merge undefs for DAG combine
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D128570
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64f44a90 |
| 01-Jul-2022 |
Xiang1 Zhang <[email protected]> |
Revert "[ISel] Match all bits when merge undef(s) for DAG combine"
This reverts commit 5fe5aa284efed1ee1492e1f266351b35f0a8bb69.
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5fe5aa28 |
| 30-Jun-2022 |
Xiang1 Zhang <[email protected]> |
[ISel] Match all bits when merge undef(s) for DAG combine
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Revision tags: llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1 |
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1feed669 |
| 06-Oct-2021 |
Jay Foad <[email protected]> |
[APInt] Remove truncOrSelf, zextOrSelf and sextOrSelf
Differential Revision: https://reviews.llvm.org/D125559
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6bec3e93 |
| 06-Oct-2021 |
Jay Foad <[email protected]> |
[APInt] Remove all uses of zextOrSelf, sextOrSelf and truncOrSelf
Most clients only used these methods because they wanted to be able to extend or truncate to the same bit width (which is a no-op).
[APInt] Remove all uses of zextOrSelf, sextOrSelf and truncOrSelf
Most clients only used these methods because they wanted to be able to extend or truncate to the same bit width (which is a no-op). Now that the standard zext, sext and trunc allow this, there is no reason to use the OrSelf versions.
The OrSelf versions additionally have the strange behaviour of allowing extending to a *smaller* width, or truncating to a *larger* width, which are also treated as no-ops. A small amount of client code relied on this (ConstantRange::castOp and MicrosoftCXXNameMangler::mangleNumber) and needed rewriting.
Differential Revision: https://reviews.llvm.org/D125557
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169ae6db |
| 06-Oct-2021 |
Jay Foad <[email protected]> |
[APInt] Allow extending and truncating to the same width
Allow zext, sext, trunc, truncUSat and truncSSat to extend or truncate to the same bit width, which is a no-op.
Disallowing this forced clie
[APInt] Allow extending and truncating to the same width
Allow zext, sext, trunc, truncUSat and truncSSat to extend or truncate to the same bit width, which is a no-op.
Disallowing this forced clients to use workarounds like using zextOrTrunc (even though they never wanted truncation) or zextOrSelf (even though they did not want its strange behaviour of allowing a *smaller* bit width, which is also treated as a no-op).
Differential Revision: https://reviews.llvm.org/D125556
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8cba7217 |
| 14-Mar-2022 |
Aaron Ballman <[email protected]> |
Implement literal suffixes for _BitInt
WG14 adopted N2775 (http://www.open-std.org/jtc1/sc22/wg14/www/docs/n2775.pdf) at our Feb 2022 meeting. This paper adds a literal suffix for bit-precise types
Implement literal suffixes for _BitInt
WG14 adopted N2775 (http://www.open-std.org/jtc1/sc22/wg14/www/docs/n2775.pdf) at our Feb 2022 meeting. This paper adds a literal suffix for bit-precise types that automatically sizes the bit-precise type to be the smallest possible legal _BitInt type that can represent the literal value. The suffix chosen is wb (for a signed bit-precise type) which can be combined with the u suffix (for an unsigned bit-precise type).
The preprocessor continues to operate as-if all integer types were intmax_t/uintmax_t, including bit-precise integer types. It is a constraint violation if the bit-precise literal is too large to fit within that type in the context of the preprocessor (when still using a pp-number preprocessing token), but it is not a constraint violation in other circumstances. This allows you to make bit-precise integer literals that are wider than what the preprocessor currently supports in order to initialize variables, etc.
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75e164f6 |
| 20-Jan-2022 |
serge-sans-paille <[email protected]> |
[llvm] Cleanup header dependencies in ADT and Support
The cleanup was manual, but assisted by "include-what-you-use". It consists in
1. Removing unused forward declaration. No impact expected. 2. R
[llvm] Cleanup header dependencies in ADT and Support
The cleanup was manual, but assisted by "include-what-you-use". It consists in
1. Removing unused forward declaration. No impact expected. 2. Removing unused headers in .cpp files. No impact expected. 3. Removing unused headers in .h files. This removes implicit dependencies and is generally considered a good thing, but this may break downstream builds. I've updated llvm, clang, lld, lldb and mlir deps, and included a list of the modification in the second part of the commit. 4. Replacing header inclusion by forward declaration. This has the same impact as 3.
Notable changes:
- llvm/Support/TargetParser.h no longer includes llvm/Support/AArch64TargetParser.h nor llvm/Support/ARMTargetParser.h - llvm/Support/TypeSize.h no longer includes llvm/Support/WithColor.h - llvm/Support/YAMLTraits.h no longer includes llvm/Support/Regex.h - llvm/ADT/SmallVector.h no longer includes llvm/Support/MemAlloc.h nor llvm/Support/ErrorHandling.h
You may need to add some of these headers in your compilation units, if needs be.
As an hint to the impact of the cleanup, running
clang++ -E -Iinclude -I../llvm/include ../llvm/lib/Support/*.cpp -std=c++14 -fno-rtti -fno-exceptions | wc -l
before: 8000919 lines after: 7917500 lines
Reduced dependencies also helps incremental rebuilds and is more ccache friendly, something not shown by the above metric :-)
Discourse thread on the topic: https://llvm.discourse.group/t/include-what-you-use-include-cleanup/5831
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4c484f11 |
| 16-Nov-2021 |
River Riddle <[email protected]> |
[llvm] Add a SFINAE template parameter to DenseMapInfo
This allows for using SFINAE partial specialization for DenseMapInfo. In MLIR, this is particularly useful as it will allow for defining partia
[llvm] Add a SFINAE template parameter to DenseMapInfo
This allows for using SFINAE partial specialization for DenseMapInfo. In MLIR, this is particularly useful as it will allow for defining partial specializations that support all Attribute, Op, and Type classes without needing to specialize DenseMapInfo for each individual class.
Differential Revision: https://reviews.llvm.org/D113641
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492a4a42 |
| 16-Oct-2021 |
Nikita Popov <[email protected]> |
[APInt] Fix 1-bit edge case in smul_ov()
The sdiv used to check for overflow can itself overflow if the LHS is signed min and the RHS is -1. The code tried to account for this by also checking the c
[APInt] Fix 1-bit edge case in smul_ov()
The sdiv used to check for overflow can itself overflow if the LHS is signed min and the RHS is -1. The code tried to account for this by also checking the commuted version. However, for 1-bit values, signed min and -1 are the same value, so both divisions overflow. As such, the overflow for -1 * -1 was not detected (which results in -1 rather than 1 for 1-bit values). Fix this by explicitly checking for this case instead.
Noticed while adding exhaustive test coverage for smul_ov(), which is also part of this commit.
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ad37a45a |
| 06-Oct-2021 |
Chris Lattner <[email protected]> |
[APInt] Fix isAllOnes and extractBits for zero width values.
isAllOnes() should return true for zero bit values because there are no zeros in it.
Thanks to Jay Foad for pointing this out.
Differen
[APInt] Fix isAllOnes and extractBits for zero width values.
isAllOnes() should return true for zero bit values because there are no zeros in it.
Thanks to Jay Foad for pointing this out.
Differential Revision: https://reviews.llvm.org/D111241
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64eaffb6 |
| 05-Oct-2021 |
Nikita Popov <[email protected]> |
[APInt] Fix type limits warning (NFC)
Unsigned number is always >= 0.
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cc697fc2 |
| 05-Oct-2021 |
Chris Lattner <[email protected]> |
[APInt] Make insertBits and concat work with zero width APInts.
These should both clearly work with our current model for zero width integers, but don't until now!
Differential Revision: https://re
[APInt] Make insertBits and concat work with zero width APInts.
These should both clearly work with our current model for zero width integers, but don't until now!
Differential Revision: https://reviews.llvm.org/D111113
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a9bceb2b |
| 30-Sep-2021 |
Jay Foad <[email protected]> |
[APInt] Stop using soft-deprecated constructors and methods in llvm. NFC.
Stop using APInt constructors and methods that were soft-deprecated in D109483. This fixes all the uses I found in llvm, exc
[APInt] Stop using soft-deprecated constructors and methods in llvm. NFC.
Stop using APInt constructors and methods that were soft-deprecated in D109483. This fixes all the uses I found in llvm, except for the APInt unit tests which should still test the deprecated methods.
Differential Revision: https://reviews.llvm.org/D110807
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3 |
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8b4afc5a |
| 10-Sep-2021 |
Chris Lattner <[email protected]> |
[APInt] Add a concat method, use LLVM_UNLIKELY to help optimizer.
Three unrelated changes:
1) Add a concat method as a convenience to help write bitvector use cases in a nicer way. 2) Use LLVM_U
[APInt] Add a concat method, use LLVM_UNLIKELY to help optimizer.
Three unrelated changes:
1) Add a concat method as a convenience to help write bitvector use cases in a nicer way. 2) Use LLVM_UNLIKELY as suggested by @xbolva00 in a previous patch. 3) Fix casing of some "slow" methods to follow naming standards.
Differential Revision: https://reviews.llvm.org/D109620
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9db20822 |
| 13-Sep-2021 |
Simon Pilgrim <[email protected]> |
[APInt] Add APIntOps::ScaleBitMask helper
APInt is used to describe a bit mask in a variety of value tracking and demanded bits/elts functions.
When traversing through dst/src operands, we have a n
[APInt] Add APIntOps::ScaleBitMask helper
APInt is used to describe a bit mask in a variety of value tracking and demanded bits/elts functions.
When traversing through dst/src operands, we have a number of places where these masks need to widened/narrowed to translate through bitcasts, reductions etc. to a different type.
This patch add a APIntOps::ScaleBitMask common helper, adds unit test coverage, and updates a number of cases to use the the helper instead of their own implementation.
This came up on D109065 where we currently have to add yet another implementation of the same code.
Differential Revision: https://reviews.llvm.org/D109683
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704a3956 |
| 09-Sep-2021 |
Chris Lattner <[email protected]> |
[APInt] Enable APInt to support zero bit integers.
Motivation: APInt not supporting zero bit values leads to a lot of special cases in various bits of code, particularly when using APInt as a bit ve
[APInt] Enable APInt to support zero bit integers.
Motivation: APInt not supporting zero bit values leads to a lot of special cases in various bits of code, particularly when using APInt as a bit vector (where you want to start with zero bits and then concat on more. This is particularly challenging in the CIRCT project, where the absence of zero-bit ConstantOp forces duplication of ops and makes instcombine-like logic far more complicated.
Approach: zero bit integers are weird. There are two reasonable approaches: either make it illegal to do general arithmetic on them (e.g. sign extends), or treat them as as implicitly having a zero value. This patch takes the conservative approach, which enables their use in bitvector applications.
Differential Revision: https://reviews.llvm.org/D109555
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735f4671 |
| 09-Sep-2021 |
Chris Lattner <[email protected]> |
[APInt] Normalize naming on keep constructors / predicate methods.
This renames the primary methods for creating a zero value to `getZero` instead of `getNullValue` and renames predicates like `isAl
[APInt] Normalize naming on keep constructors / predicate methods.
This renames the primary methods for creating a zero value to `getZero` instead of `getNullValue` and renames predicates like `isAllOnesValue` to simply `isAllOnes`. This achieves two things:
1) This starts standardizing predicates across the LLVM codebase, following (in this case) ConstantInt. The word "Value" doesn't convey anything of merit, and is missing in some of the other things.
2) Calling an integer "null" doesn't make any sense. The original sin here is mine and I've regretted it for years. This moves us to calling it "zero" instead, which is correct!
APInt is widely used and I don't think anyone is keen to take massive source breakage on anything so core, at least not all in one go. As such, this doesn't actually delete any entrypoints, it "soft deprecates" them with a comment.
Included in this patch are changes to a bunch of the codebase, but there are more. We should normalize SelectionDAG and other APIs as well, which would make the API change more mechanical.
Differential Revision: https://reviews.llvm.org/D109483
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9e46dd96 |
| 09-Sep-2021 |
Chris Lattner <[email protected]> |
[APInt.h] Reduce the APInt header file interface a bit. NFC
This moves one mid-size function out of line, inlines the trivial tcAnd/tcOr/tcXor/tcComplement methods into their only caller, and moves
[APInt.h] Reduce the APInt header file interface a bit. NFC
This moves one mid-size function out of line, inlines the trivial tcAnd/tcOr/tcXor/tcComplement methods into their only caller, and moves the magic/umagic functions into SelectionDAG since they are implementation details of its algorithm. This also removes the unit tests for magic, but these are already tested in the divide lowering logic for various targets.
This also upgrades some C style comments to C++.
Differential Revision: https://reviews.llvm.org/D109476
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Revision tags: llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2 |
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61cdaf66 |
| 11-Jun-2021 |
Simon Pilgrim <[email protected]> |
[ADT] Remove APInt/APSInt toString() std::string variants
<string> is currently the highest impact header in a clang+llvm build:
https://commondatastorage.googleapis.com/chromium-browser-clang/llvm
[ADT] Remove APInt/APSInt toString() std::string variants
<string> is currently the highest impact header in a clang+llvm build:
https://commondatastorage.googleapis.com/chromium-browser-clang/llvm-include-analysis.html
One of the most common places this is being included is the APInt.h header, which needs it for an old toString() implementation that returns std::string - an inefficient method compared to the SmallString versions that it actually wraps.
This patch replaces these APInt/APSInt methods with a pair of llvm::toString() helpers inside StringExtras.h, adjusts users accordingly and removes the <string> from APInt.h - I was hoping that more of these users could be converted to use the SmallString methods, but it appears that most end up creating a std::string anyhow. I avoided trying to use the raw_ostream << operators as well as I didn't want to lose having the integer radix explicit in the code.
Differential Revision: https://reviews.llvm.org/D103888
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fd7e309e |
| 31-May-2021 |
Nikita Popov <[email protected]> |
[ADT] Move DenseMapInfo for APInt into APInt.h (PR50527)
As suggested in https://bugs.llvm.org/show_bug.cgi?id=50527, this moves the DenseMapInfo for APInt and APSInt into the respective headers, re
[ADT] Move DenseMapInfo for APInt into APInt.h (PR50527)
As suggested in https://bugs.llvm.org/show_bug.cgi?id=50527, this moves the DenseMapInfo for APInt and APSInt into the respective headers, removing the need to include APInt.h and APSInt.h from DenseMapInfo.h.
We could probably do the same from StringRef and ArrayRef as well.
Differential Revision: https://reviews.llvm.org/D103422
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Revision tags: llvmorg-12.0.1-rc1, llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1, llvmorg-11.0.1, llvmorg-11.0.1-rc2, llvmorg-11.0.1-rc1 |
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d3a0f9b9 |
| 23-Nov-2020 |
Kerry McLaughlin <[email protected]> |
[APInt] Add the truncOrSelf resizing operator to APInt
Truncates the APInt if the bit width is greater than the width specified, otherwise do nothing
Reviewed By: RKSimon
Differential Revision: ht
[APInt] Add the truncOrSelf resizing operator to APInt
Truncates the APInt if the bit width is greater than the width specified, otherwise do nothing
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D91445
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Revision tags: llvmorg-11.0.0, llvmorg-11.0.0-rc6, llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4, llvmorg-11.0.0-rc3 |
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099c089d |
| 02-Sep-2020 |
Jay Foad <[email protected]> |
[APInt] New member function setBitVal
Differential Revision: https://reviews.llvm.org/D87033
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Revision tags: llvmorg-11.0.0-rc2, llvmorg-11.0.0-rc1, llvmorg-12-init |
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a2552f76 |
| 13-Jul-2020 |
Pavel Labath <[email protected]> |
[ADT] Make Load(AP)IntFromMemory pointer argument const
The function does not modify this memory.
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Revision tags: llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2, llvmorg-10.0.1-rc1 |
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61ec4cdf |
| 14-Apr-2020 |
Benjamin Kramer <[email protected]> |
[ADT] Mix the bit width into APInt's hash_value
Otherwise all zero values from i1 to i64 collide.
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