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Searched refs:IntVT (Results 1 – 17 of 17) sorted by relevance

/freebsd-12.1/contrib/llvm/include/llvm/CodeGen/
H A DValueTypes.h331 for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE; in getHalfSizedIntegerVT() local
332 IntVT <= MVT::LAST_INTEGER_VALUETYPE; ++IntVT) { in getHalfSizedIntegerVT()
333 EVT HalfVT = EVT((MVT::SimpleValueType)IntVT); in getHalfSizedIntegerVT()
H A DTargetLowering.h1786 virtual bool shouldUseStrictFP_TO_INT(EVT FpVT, EVT IntVT, in shouldUseStrictFP_TO_INT() argument
/freebsd-12.1/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DFunctionLoweringInfo.cpp420 EVT IntVT = ValueVTs[0]; in ComputePHILiveOutRegInfo() local
422 if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1) in ComputePHILiveOutRegInfo()
424 IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT); in ComputePHILiveOutRegInfo()
425 unsigned BitWidth = IntVT.getSizeInBits(); in ComputePHILiveOutRegInfo()
H A DTargetLowering.cpp4325 EVT IntVT = SrcVT.changeTypeToInteger(); in expandFP_TO_SINT() local
4326 EVT IntShVT = getShiftAmountTy(IntVT, DAG.getDataLayout()); in expandFP_TO_SINT()
4328 SDValue ExponentMask = DAG.getConstant(0x7F800000, dl, IntVT); in expandFP_TO_SINT()
4329 SDValue ExponentLoBit = DAG.getConstant(23, dl, IntVT); in expandFP_TO_SINT()
4330 SDValue Bias = DAG.getConstant(127, dl, IntVT); in expandFP_TO_SINT()
4335 SDValue Bits = DAG.getNode(ISD::BITCAST, dl, IntVT, Src); in expandFP_TO_SINT()
4338 ISD::SRL, dl, IntVT, DAG.getNode(ISD::AND, dl, IntVT, Bits, ExponentMask), in expandFP_TO_SINT()
4342 SDValue Sign = DAG.getNode(ISD::SRA, dl, IntVT, in expandFP_TO_SINT()
4347 SDValue R = DAG.getNode(ISD::OR, dl, IntVT, in expandFP_TO_SINT()
4804 EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), NumBits); in scalarizeVectorStore() local
[all …]
H A DFastISel.cpp426 EVT IntVT = TLI.getPointerTy(DL); in materializeConstant() local
427 uint32_t IntBitWidth = IntVT.getSizeInBits(); in materializeConstant()
435 Reg = fastEmit_r(IntVT.getSimpleVT(), VT, ISD::SINT_TO_FP, IntegerReg, in materializeConstant()
1735 EVT IntVT = EVT::getIntegerVT(I->getContext(), VT.getSizeInBits()); in selectFNeg() local
1736 if (!TLI.isTypeLegal(IntVT)) in selectFNeg()
1739 unsigned IntReg = fastEmit_r(VT.getSimpleVT(), IntVT.getSimpleVT(), in selectFNeg()
1745 IntVT.getSimpleVT(), ISD::XOR, IntReg, /*IsKill=*/true, in selectFNeg()
1746 UINT64_C(1) << (VT.getSizeInBits() - 1), IntVT.getSimpleVT()); in selectFNeg()
1750 ResultReg = fastEmit_r(IntVT.getSimpleVT(), VT.getSimpleVT(), ISD::BITCAST, in selectFNeg()
H A DLegalizeDAG.cpp1497 EVT IntVT = SignAsInt.IntValue.getValueType(); in ExpandFCOPYSIGN() local
1498 SDValue SignMask = DAG.getConstant(SignAsInt.SignMask, DL, IntVT); in ExpandFCOPYSIGN()
1499 SDValue SignBit = DAG.getNode(ISD::AND, DL, IntVT, SignAsInt.IntValue, in ExpandFCOPYSIGN()
1508 SDValue Cond = DAG.getSetCC(DL, getSetCCResultType(IntVT), SignBit, in ExpandFCOPYSIGN()
1509 DAG.getConstant(0, DL, IntVT), ISD::SETNE); in ExpandFCOPYSIGN()
1523 EVT ShiftVT = IntVT; in ExpandFCOPYSIGN()
1558 EVT IntVT = ValueAsInt.IntValue.getValueType(); in ExpandFABS() local
1559 SDValue ClearSignMask = DAG.getConstant(~ValueAsInt.SignMask, DL, IntVT); in ExpandFABS()
1560 SDValue ClearedSign = DAG.getNode(ISD::AND, DL, IntVT, ValueAsInt.IntValue, in ExpandFABS()
H A DLegalizeFloatTypes.cpp941 for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE; in SoftenFloatOp_FP_TO_XINT() local
942 IntVT <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL; in SoftenFloatOp_FP_TO_XINT()
943 ++IntVT) { in SoftenFloatOp_FP_TO_XINT()
944 NVT = (MVT::SimpleValueType)IntVT; in SoftenFloatOp_FP_TO_XINT()
H A DDAGCombiner.cpp10361 SrcEltVT = IntVT; in ConstantFoldBITCASTofBUILD_VECTOR()
12262 EVT IntVT = Int.getValueType(); in visitFNEG() local
12263 if (IntVT.isInteger() && !IntVT.isVector()) { in visitFNEG()
12272 SignMask = APInt::getSignMask(IntVT.getSizeInBits()); in visitFNEG()
12275 Int = DAG.getNode(ISD::XOR, DL0, IntVT, Int, in visitFNEG()
12360 EVT IntVT = Int.getValueType(); in visitFABS() local
12361 if (IntVT.isInteger() && !IntVT.isVector()) { in visitFABS()
12373 Int = DAG.getNode(ISD::AND, DL, IntVT, Int, in visitFABS()
14058 if (!TLI.isOperationLegal(ISD::LOAD, IntVT) || in TransformFPLoadStorePair()
14059 !TLI.isOperationLegal(ISD::STORE, IntVT) || in TransformFPLoadStorePair()
[all …]
H A DSelectionDAG.cpp5433 EVT IntVT = VT.getScalarType(); in getMemsetValue() local
5434 if (!IntVT.isInteger()) in getMemsetValue()
5435 IntVT = EVT::getIntegerVT(*DAG.getContext(), IntVT.getSizeInBits()); in getMemsetValue()
5437 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, IntVT, Value); in getMemsetValue()
5442 Value = DAG.getNode(ISD::MUL, dl, IntVT, Value, in getMemsetValue()
5443 DAG.getConstant(Magic, dl, IntVT)); in getMemsetValue()
H A DSelectionDAGBuilder.cpp276 EVT IntVT = EVT::getIntegerVT(*DAG.getContext(), ValueVT.getSizeInBits()); in getCopyFromParts() local
277 Val = getCopyFromParts(DAG, DL, Parts, NumParts, PartVT, IntVT, V, CC); in getCopyFromParts()
/freebsd-12.1/contrib/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp1345 EVT IntVT = MemVT.changeTypeToInteger(); in lowerKernargMemParameter() local
4356 MVT IntVT = MVT::getIntegerVT(VecSize); in lowerINSERT_VECTOR_ELT() local
4372 SDValue BCVec = DAG.getNode(ISD::BITCAST, SL, IntVT, Vec); in lowerINSERT_VECTOR_ELT()
4373 SDValue BFM = DAG.getNode(ISD::SHL, SL, IntVT, in lowerINSERT_VECTOR_ELT()
4378 SDValue RHS = DAG.getNode(ISD::AND, SL, IntVT, in lowerINSERT_VECTOR_ELT()
4381 SDValue BFI = DAG.getNode(ISD::OR, SL, IntVT, LHS, RHS); in lowerINSERT_VECTOR_ELT()
4409 MVT IntVT = MVT::getIntegerVT(VecSize); in lowerEXTRACT_VECTOR_ELT() local
4415 SDValue BC = DAG.getNode(ISD::BITCAST, SL, IntVT, Vec); in lowerEXTRACT_VECTOR_ELT()
5560 EVT IntVT = VT.changeTypeToInteger(); in LowerINTRINSIC_W_CHAIN() local
5588 EVT IntVT = VT.changeTypeToInteger(); in LowerINTRINSIC_W_CHAIN() local
[all …]
H A DAMDGPUISelLowering.cpp1472 MVT IntVT = MVT::i32; in LowerDIVREM24() local
1492 SDValue jq = DAG.getConstant(1, DL, IntVT); in LowerDIVREM24()
1534 SDValue iq = DAG.getNode(ToInt, DL, IntVT, fq); in LowerDIVREM24()
/freebsd-12.1/contrib/llvm/lib/Target/X86/
H A DX86ISelLowering.h1051 bool shouldUseStrictFP_TO_INT(EVT FpVT, EVT IntVT,
H A DX86ISelLowering.cpp3440 MVT IntVT = Is64Bit ? MVT::i64 : MVT::i32; in LowerFormalArguments() local
3441 RegParmTypes.push_back(IntVT); in LowerFormalArguments()
33009 return DAG.getConstant(Imm, SDLoc(Op), IntVT); in combinevXi1ConstantToInteger()
35972 MVT IntVT = is64BitFP ? MVT::i64 : MVT::i32; in combineCompareEqual() local
35985 IntVT = MVT::i32; in combineCompareEqual()
38721 SDValue Op0 = DAG.getBitcast(IntVT, N->getOperand(0)); in lowerX86FPLogicOp()
38722 SDValue Op1 = DAG.getBitcast(IntVT, N->getOperand(1)); in lowerX86FPLogicOp()
38731 SDValue IntOp = DAG.getNode(IntOpcode, dl, IntVT, Op0, Op1); in lowerX86FPLogicOp()
40090 EVT IntVT = BV->getValueType(0); in combineVectorCompareAndMaskUnaryOp() local
40095 SDValue MaskConst = DAG.getBitcast(IntVT, SourceConst); in combineVectorCompareAndMaskUnaryOp()
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/freebsd-12.1/contrib/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp4671 MVT IntVT = MVT::getIntegerVT(VT.getScalarSizeInBits()); in lowerINSERT_VECTOR_ELT() local
4672 MVT IntVecVT = MVT::getVectorVT(IntVT, VT.getVectorNumElements()); in lowerINSERT_VECTOR_ELT()
4675 DAG.getNode(ISD::BITCAST, DL, IntVT, Op1), Op2); in lowerINSERT_VECTOR_ELT()
4698 MVT IntVT = MVT::getIntegerVT(VT.getSizeInBits()); in lowerEXTRACT_VECTOR_ELT() local
4699 MVT IntVecVT = MVT::getVectorVT(IntVT, VecVT.getVectorNumElements()); in lowerEXTRACT_VECTOR_ELT()
4700 SDValue Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, IntVT, in lowerEXTRACT_VECTOR_ELT()
/freebsd-12.1/contrib/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp9030 EVT IntVT = BV->getValueType(0); in performVectorCompareAndMaskUnaryOpCombine() local
9035 SDValue MaskConst = DAG.getNode(ISD::BITCAST, DL, IntVT, SourceConst); in performVectorCompareAndMaskUnaryOpCombine()
9036 SDValue NewAnd = DAG.getNode(ISD::AND, DL, IntVT, in performVectorCompareAndMaskUnaryOpCombine()
/freebsd-12.1/contrib/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp6706 EVT IntVT = Op.getValueType(); in LowerGET_DYNAMIC_AREA_OFFSET() local
6713 SDVTList VTs = DAG.getVTList(IntVT); in LowerGET_DYNAMIC_AREA_OFFSET()