| /pciutils/lib/ |
| H A D | header.h | 933 #define PCI_EXP_LNKCAP2_SPEED(x) (((x) >> 1) & 0x7f) argument 1081 #define PCI_PWR_DATA_TYPE(x) (((x) >> 15) & 7) /* Type */ argument 1148 #define PCI_CXL_RANGE_TYPE(x) (((x) >> 2) & 0x7) argument 1149 #define PCI_CXL_RANGE_CLASS(x) (((x) >> 5) & 0x7) argument 1150 #define PCI_CXL_RANGE_INTERLEAVE(x) (((x) >> 8) & 0x1f) argument 1151 #define PCI_CXL_RANGE_TIMEOUT(x) (((x) >> 13) & 0x7) argument 1333 #define PCI_MCAST_CAP_MAX_GROUP(x) ((x) & 0x3f) argument 1334 #define PCI_MCAST_CAP_WIN_SIZE(x) (((x) >> 8) & 0x3f) argument 1337 #define PCI_MCAST_CTRL_NUM_GROUP(x) ((x) & 0x3f) argument 1340 #define PCI_MCAST_BAR_INDEX_POS(x) ((u32) ((x) & 0x3f)) argument [all …]
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| H A D | i386-io-access.h | 64 #define intel_outb(x, y) _outp(y, x) argument 65 #define intel_outw(x, y) _outpw(y, x) argument 66 #define intel_outl(x, y) _outpd(y, x) argument 67 #define intel_inb(x) _inp(x) argument 68 #define intel_inw(x) _inpw(x) argument 69 #define intel_inl(x) _inpd(x) argument
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| H A D | sysdep.h | 14 #define FORMAT_CHECK(x,y,z) __attribute__((format(x,y,z))) argument 18 #define FORMAT_CHECK(x,y,z) argument 127 #define cpu_to_le16(x) (x) argument 128 #define cpu_to_le32(x) (x) argument 129 #define le16_to_cpu(x) (x) argument 130 #define le32_to_cpu(x) (x) argument
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| H A D | names-net.c | 38 #define GET16(x) do { if (p+2 > end) goto err; x = (p[0] << 8) | p[1]; p += 2; } while (0) argument 39 #define GET32(x) do { if (p+4 > end) goto err; x = (p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3]… argument 67 unsigned int x = *p++; in dns_skip_name() local 68 if (!x) in dns_skip_name() 70 switch (x & 0xc0) in dns_skip_name() 73 p += x; in dns_skip_name() 90 unsigned int UNUSED x; in dns_parse_packet() local 102 GET32(x); /* ID and flags are ignored */ in dns_parse_packet() 113 GET32(x); /* Type and class */ in dns_parse_packet() 116 GET32(x); /* TTL */ in dns_parse_packet()
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| H A D | generic.c | 164 u32 x = pci_read_long(d, PCI_BASE_ADDRESS_0 + i*4); in pci_generic_fill_info() local 165 if (!x || x == (u32) ~0) in pci_generic_fill_info() 167 if ((x & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) in pci_generic_fill_info() 168 d->base_addr[i] = x; in pci_generic_fill_info() 171 if ((x & PCI_BASE_ADDRESS_MEM_TYPE_MASK) != PCI_BASE_ADDRESS_MEM_TYPE_64) in pci_generic_fill_info() 172 d->base_addr[i] = x; in pci_generic_fill_info() 179 d->base_addr[i-1] = x | (((pciaddr_t) y) << 32); in pci_generic_fill_info() 184 d->base_addr[i-1] = x; in pci_generic_fill_info()
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| H A D | names.h | 45 static inline u32 id_pair(unsigned int x, unsigned int y) in id_pair() argument 47 return ((x << 16) | y); in id_pair() 50 static inline unsigned int pair_first(unsigned int x) in pair_first() argument 52 return (x >> 16) & 0xffff; in pair_first() 55 static inline unsigned int pair_second(unsigned int x) in pair_second() argument 57 return x & 0xffff; in pair_second()
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| H A D | names-parse.c | 64 int x = 0; in id_hex() local 67 x <<= 4; in id_hex() 69 x += (*p - '0'); in id_hex() 71 x += (*p - 'a' + 10); in id_hex() 73 x += (*p - 'A' + 10); in id_hex() 78 return x; in id_hex()
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| H A D | init.c | 244 void *x = malloc(size); in pci_malloc() local 246 if (!x) in pci_malloc() 248 return x; in pci_malloc() 252 pci_mfree(void *x) in pci_mfree() argument 254 if (x) in pci_mfree() 255 free(x); in pci_mfree()
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| H A D | internal.h | 56 #define _PCI_STRINGIFY(x) #x argument 57 #define PCI_STRINGIFY(x) _PCI_STRINGIFY(x) argument
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| H A D | types.h | 60 #define PCI_PRINTF(x,y) __attribute__((format(printf, x, y))) argument 64 #define PCI_PRINTF(x,y) argument
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| /pciutils/ |
| H A D | bitops.h | 21 #define FLAG(x, y) ((x & y) ? '+' : '-') argument 31 #define BITS(x, at, width) (((x) >> (at)) & ((1 << (width)) - 1)) argument 36 #define TABLE(tab, x, buf) \ argument 37 …((x) < sizeof(tab) / sizeof((tab)[0]) ? (tab)[x] : (snprintf((buf), sizeof(buf), "??%d", (x)), (bu…
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| H A D | setpci.c | 116 unsigned int i, x, y; in exec_op() local 164 x = op->values[i].value; in exec_op() 181 x = (y & ~op->values[i].mask) | op->values[i].value; in exec_op() 182 trace(mask_formats[width], y, op->values[i].value, op->values[i].mask, x); in exec_op() 189 pci_write_byte(dev, addr, x); in exec_op() 192 pci_write_word(dev, addr, x); in exec_op() 195 pci_write_long(dev, addr, x); in exec_op() 209 x = pci_read_byte(dev, addr); in exec_op() 212 x = pci_read_word(dev, addr); in exec_op() 215 x = pci_read_long(dev, addr); in exec_op() [all …]
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| H A D | lspci.c | 310 char *x; in show_terse() local 312 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf), in show_terse() 315 if (c || x) in show_terse() 318 if (x) in show_terse() 319 printf(" [%s]", x); in show_terse() 345 show_size(u64 x) in show_size() argument 349 if (!x) in show_size() 352 if (x % 1024) in show_size() 354 x /= 1024; in show_size() 356 printf(" [size=%u%s]", (unsigned)x, suffix[i]); in show_size()
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| H A D | ls-kernel.c | 180 #define MATCH(x, y) ((y) > 0xffff || (x) == (y)) in match_pcimap() argument
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| H A D | pci.ids | 5918 9660 TGUI 9660/938x/968x 9038 fe00 VXIpc-87x 9040 fe51 VXIpc-74x 16979 4216 422x-PxU 17499 # 4x serial ports, 2x printer ports 17501 # 4x serial ports, 2x printer ports 39039 5075 AIC-755x 39042 5175 AIC-755x 39044 5275 AIC-755x 39046 5375 AIC-755x [all …]
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| H A D | ChangeLog | 128 * Filters now accept "0x..." syntax for backward compatibility. 1508 * lspci.c (format_agp_rate): Write "x16", not "x@". 2195 * lspci.c: Replaced numerous occurrences of (x & flag) ? '+' : '-' 2340 * setpci.c: glibc 2.1.x already defines pread() and pwrite(). 2398 * filter.c (filter_parse_slot): Fixed ":x" type filters.
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| /pciutils/maint/ |
| H A D | release.pm | 137 my $x = pop @ifs; 138 defined $x or die "Improper nesting of conditionals"; 139 $x && next; 141 my $x = pop @ifs; 142 defined $x or die "Improper nesting of conditionals"; 143 push @ifs, -$x; 144 $x && next;
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| H A D | gen-zone | 42 my ($x) = @_; 43 $x =~ s/^\s+//; 44 $x =~ s/"/\\"/g; 45 return $x;
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| /pciutils/tests/ |
| H A D | cap-dvsec-cxl | 355 7f:00.0 CXL: Xilinx Corporation Device c084 (rev 70) (prog-if 10 [CXL Memory Device (CXL 2.x)])
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| H A D | tree-fsl-p2020 | 259 0000:05:00.0 Network controller [0280]: Qualcomm Atheros QCA986x/988x 802.11ac Wireless Network Ada…
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