1 /*
2 * The PCI Utilities -- Manipulate PCI Configuration Registers
3 *
4 * Copyright (c) 1998--2020 Martin Mares <[email protected]>
5 *
6 * Can be freely distributed and used under the terms of the GNU GPL v2+.
7 *
8 * SPDX-License-Identifier: GPL-2.0-or-later
9 */
10
11 #include <stdio.h>
12 #include <string.h>
13 #include <stdlib.h>
14 #include <stdarg.h>
15 #include <errno.h>
16
17 #define PCIUTILS_SETPCI
18 #include "pciutils.h"
19
20 static int force; /* Don't complain if no devices match */
21 static int verbose; /* Verbosity level */
22 static int demo_mode; /* Only show */
23 static int allow_raw_access;
24
25 const char program_name[] = "setpci";
26
27 static struct pci_access *pacc;
28
29 struct value {
30 unsigned int value;
31 unsigned int mask;
32 };
33
34 struct op {
35 struct op *next;
36 u16 cap_type; /* PCI_CAP_xxx or 0 */
37 u16 cap_id;
38 const char *name;
39 unsigned int hdr_type_mask;
40 unsigned int addr;
41 unsigned int width; /* Byte width of the access */
42 unsigned int num_values; /* Number of values to write; 0=read */
43 unsigned int number; /* The n-th capability of that id */
44 struct value values[0];
45 };
46
47 struct group {
48 struct group *next;
49 struct pci_filter filter;
50 struct op *first_op;
51 struct op **last_op;
52 };
53
54 static struct group *first_group, **last_group = &first_group;
55 static int need_bus_scan;
56 static unsigned int max_values[] = { 0, 0xff, 0xffff, 0, 0xffffffff };
57
58 static int
matches_single_device(struct group * group)59 matches_single_device(struct group *group)
60 {
61 struct pci_filter *f = &group->filter;
62 return (f->domain >= 0 && f->bus >= 0 && f->slot >= 0 && f->func >= 0);
63 }
64
65 static struct pci_dev **
select_devices(struct group * group)66 select_devices(struct group *group)
67 {
68 struct pci_filter *f = &group->filter;
69
70 if (!need_bus_scan && matches_single_device(group))
71 {
72 struct pci_dev **devs = xmalloc(sizeof(struct device *) * 2);
73 struct pci_dev *dev = pci_get_dev(pacc, f->domain, f->bus, f->slot, f->func);
74 int i = 0;
75 if (pci_filter_match(f, dev))
76 devs[i++] = dev;
77 devs[i] = NULL;
78 return devs;
79 }
80 else
81 {
82 struct pci_dev **devs, *dev;
83 int i = 0;
84 int cnt = 1;
85
86 for (dev = pacc->devices; dev; dev = dev->next)
87 if (pci_filter_match(f, dev))
88 cnt++;
89
90 devs = xmalloc(sizeof(struct device *) * cnt);
91
92 for (dev = pacc->devices; dev; dev = dev->next)
93 if (pci_filter_match(f, dev))
94 devs[i++] = dev;
95
96 devs[i] = NULL;
97 return devs;
98 }
99 }
100
101 static void PCI_PRINTF(1,2)
trace(const char * fmt,...)102 trace(const char *fmt, ...)
103 {
104 va_list args;
105 va_start(args, fmt);
106 if (verbose)
107 vprintf(fmt, args);
108 va_end(args);
109 }
110
111 static void
exec_op(struct op * op,struct pci_dev * dev)112 exec_op(struct op *op, struct pci_dev *dev)
113 {
114 const char * const formats[] = { NULL, " %02x", " %04x", NULL, " %08x" };
115 const char * const mask_formats[] = { NULL, " %02x->(%02x:%02x)->%02x", " %04x->(%04x:%04x)->%04x", NULL, " %08x->(%08x:%08x)->%08x" };
116 unsigned int i, x, y;
117 int addr = 0;
118 int width = op->width;
119 char slot[16];
120
121 snprintf(slot, sizeof(slot), "%04x:%02x:%02x.%x", dev->domain, dev->bus, dev->dev, dev->func);
122 trace("%s ", slot);
123 if (op->cap_type)
124 {
125 struct pci_cap *cap;
126 unsigned int cap_nr = op->number;
127 cap = pci_find_cap_nr(dev, op->cap_id, op->cap_type, &cap_nr);
128 if (cap)
129 addr = cap->addr;
130 else if (cap_nr == 0)
131 die("%s: Instance #%d of %s %04x not found - there are no capabilities with that id.", slot,
132 op->number, ((op->cap_type == PCI_CAP_NORMAL) ? "Capability" : "Extended capability"),
133 op->cap_id);
134 else
135 die("%s: Instance #%d of %s %04x not found - there %s only %d %s with that id.", slot,
136 op->number, ((op->cap_type == PCI_CAP_NORMAL) ? "Capability" : "Extended capability"),
137 op->cap_id, ((cap_nr == 1) ? "is" : "are"), cap_nr,
138 ((cap_nr == 1) ? "capability" : "capabilities"));
139
140 trace(((op->cap_type == PCI_CAP_NORMAL) ? "(cap %02x @%02x) " : "(ecap %04x @%03x) "), op->cap_id, addr);
141 }
142 addr += op->addr;
143 trace("@%02x", addr);
144
145 /* We have already checked it when parsing, but addressing relative to capabilities can change the address. */
146 if (addr & (width-1))
147 die("%s: Unaligned access of width %d to register %04x", slot, width, addr);
148 if (addr + width > 0x1000)
149 die("%s: Access of width %d to register %04x out of range", slot, width, addr);
150
151 if (op->hdr_type_mask)
152 {
153 unsigned int hdr_type = pci_read_byte(dev, PCI_HEADER_TYPE) & 0x7f;
154 if (hdr_type > 2 || !((1 << hdr_type) & op->hdr_type_mask))
155 die("%s: Does not have register %s.", slot, op->name);
156 }
157
158 if (op->num_values)
159 {
160 for (i=0; i<op->num_values; i++)
161 {
162 if ((op->values[i].mask & max_values[width]) == max_values[width])
163 {
164 x = op->values[i].value;
165 trace(formats[width], op->values[i].value);
166 }
167 else
168 {
169 switch (width)
170 {
171 case 1:
172 y = pci_read_byte(dev, addr);
173 break;
174 case 2:
175 y = pci_read_word(dev, addr);
176 break;
177 default:
178 y = pci_read_long(dev, addr);
179 break;
180 }
181 x = (y & ~op->values[i].mask) | op->values[i].value;
182 trace(mask_formats[width], y, op->values[i].value, op->values[i].mask, x);
183 }
184 if (!demo_mode)
185 {
186 switch (width)
187 {
188 case 1:
189 pci_write_byte(dev, addr, x);
190 break;
191 case 2:
192 pci_write_word(dev, addr, x);
193 break;
194 default:
195 pci_write_long(dev, addr, x);
196 break;
197 }
198 }
199 addr += width;
200 }
201 trace("\n");
202 }
203 else
204 {
205 trace(" = ");
206 switch (width)
207 {
208 case 1:
209 x = pci_read_byte(dev, addr);
210 break;
211 case 2:
212 x = pci_read_word(dev, addr);
213 break;
214 default:
215 x = pci_read_long(dev, addr);
216 break;
217 }
218 printf(formats[width]+1, x);
219 putchar('\n');
220 }
221 }
222
223 static void
execute(void)224 execute(void)
225 {
226 struct group *group;
227 int group_cnt = 0;
228
229 for (group = first_group; group; group = group->next)
230 {
231 struct pci_dev **vec = select_devices(group);
232 struct pci_dev *dev;
233 unsigned int i;
234
235 group_cnt++;
236 if (!vec[0] && !force)
237 fprintf(stderr, "setpci: Warning: No devices selected for operation group %d.\n", group_cnt);
238
239 for (i = 0; dev = vec[i]; i++)
240 {
241 struct op *op;
242 for (op = group->first_op; op; op = op->next)
243 exec_op(op, dev);
244 }
245
246 free(vec);
247 }
248 }
249
250 static void
scan_ops(void)251 scan_ops(void)
252 {
253 struct group *group;
254 struct op *op;
255
256 for (group = first_group; group; group = group->next)
257 for (op = group->first_op; op; op = op->next)
258 {
259 if (op->num_values && !demo_mode)
260 pacc->writeable = 1;
261 if (!matches_single_device(group) || !allow_raw_access)
262 need_bus_scan = 1;
263 }
264 }
265
266 struct reg_name {
267 unsigned int cap;
268 unsigned int offset;
269 unsigned int width;
270 unsigned int hdr_type_mask;
271 const char *name;
272 };
273
274 static const struct reg_name pci_reg_names[] = {
275 { 0, 0x00, 2, 0x0, "VENDOR_ID" },
276 { 0, 0x02, 2, 0x0, "DEVICE_ID" },
277 { 0, 0x04, 2, 0x0, "COMMAND" },
278 { 0, 0x06, 2, 0x0, "STATUS" },
279 { 0, 0x08, 1, 0x0, "REVISION" },
280 { 0, 0x09, 1, 0x0, "CLASS_PROG" },
281 { 0, 0x0a, 2, 0x0, "CLASS_DEVICE" },
282 { 0, 0x0c, 1, 0x0, "CACHE_LINE_SIZE" },
283 { 0, 0x0d, 1, 0x0, "LATENCY_TIMER" },
284 { 0, 0x0e, 1, 0x0, "HEADER_TYPE" },
285 { 0, 0x0f, 1, 0x0, "BIST" },
286 { 0, 0x10, 4, 0x3, "BASE_ADDRESS_0" },
287 { 0, 0x14, 4, 0x3, "BASE_ADDRESS_1" },
288 { 0, 0x18, 4, 0x1, "BASE_ADDRESS_2" },
289 { 0, 0x1c, 4, 0x1, "BASE_ADDRESS_3" },
290 { 0, 0x20, 4, 0x1, "BASE_ADDRESS_4" },
291 { 0, 0x24, 4, 0x1, "BASE_ADDRESS_5" },
292 { 0, 0x28, 4, 0x1, "CARDBUS_CIS" },
293 { 0, 0x2c, 2, 0x1, "SUBSYSTEM_VENDOR_ID" },
294 { 0, 0x2e, 2, 0x1, "SUBSYSTEM_ID" },
295 { 0, 0x30, 4, 0x1, "ROM_ADDRESS" },
296 { 0, 0x34, 1, 0x3, "CAPABILITIES" },
297 { 0, 0x3c, 1, 0x3, "INTERRUPT_LINE" },
298 { 0, 0x3d, 1, 0x3, "INTERRUPT_PIN" },
299 { 0, 0x3e, 1, 0x1, "MIN_GNT" },
300 { 0, 0x3f, 1, 0x1, "MAX_LAT" },
301 { 0, 0x18, 1, 0x2, "PRIMARY_BUS" },
302 { 0, 0x19, 1, 0x2, "SECONDARY_BUS" },
303 { 0, 0x1a, 1, 0x2, "SUBORDINATE_BUS" },
304 { 0, 0x1b, 1, 0x2, "SEC_LATENCY_TIMER" },
305 { 0, 0x1c, 1, 0x2, "IO_BASE" },
306 { 0, 0x1d, 1, 0x2, "IO_LIMIT" },
307 { 0, 0x1e, 2, 0x2, "SEC_STATUS" },
308 { 0, 0x20, 2, 0x2, "MEMORY_BASE" },
309 { 0, 0x22, 2, 0x2, "MEMORY_LIMIT" },
310 { 0, 0x24, 2, 0x2, "PREF_MEMORY_BASE" },
311 { 0, 0x26, 2, 0x2, "PREF_MEMORY_LIMIT" },
312 { 0, 0x28, 4, 0x2, "PREF_BASE_UPPER32" },
313 { 0, 0x2c, 4, 0x2, "PREF_LIMIT_UPPER32" },
314 { 0, 0x30, 2, 0x2, "IO_BASE_UPPER16" },
315 { 0, 0x32, 2, 0x2, "IO_LIMIT_UPPER16" },
316 { 0, 0x38, 4, 0x2, "BRIDGE_ROM_ADDRESS" },
317 { 0, 0x3e, 2, 0x2, "BRIDGE_CONTROL" },
318 { 0, 0x10, 4, 0x4, "CB_CARDBUS_BASE" },
319 { 0, 0x14, 2, 0x4, "CB_CAPABILITIES" },
320 { 0, 0x16, 2, 0x4, "CB_SEC_STATUS" },
321 { 0, 0x18, 1, 0x4, "CB_BUS_NUMBER" },
322 { 0, 0x19, 1, 0x4, "CB_CARDBUS_NUMBER" },
323 { 0, 0x1a, 1, 0x4, "CB_SUBORDINATE_BUS" },
324 { 0, 0x1b, 1, 0x4, "CB_CARDBUS_LATENCY" },
325 { 0, 0x1c, 4, 0x4, "CB_MEMORY_BASE_0" },
326 { 0, 0x20, 4, 0x4, "CB_MEMORY_LIMIT_0" },
327 { 0, 0x24, 4, 0x4, "CB_MEMORY_BASE_1" },
328 { 0, 0x28, 4, 0x4, "CB_MEMORY_LIMIT_1" },
329 { 0, 0x2c, 2, 0x4, "CB_IO_BASE_0" },
330 { 0, 0x2e, 2, 0x4, "CB_IO_BASE_0_HI" },
331 { 0, 0x30, 2, 0x4, "CB_IO_LIMIT_0" },
332 { 0, 0x32, 2, 0x4, "CB_IO_LIMIT_0_HI" },
333 { 0, 0x34, 2, 0x4, "CB_IO_BASE_1" },
334 { 0, 0x36, 2, 0x4, "CB_IO_BASE_1_HI" },
335 { 0, 0x38, 2, 0x4, "CB_IO_LIMIT_1" },
336 { 0, 0x3a, 2, 0x4, "CB_IO_LIMIT_1_HI" },
337 { 0, 0x40, 2, 0x4, "CB_SUBSYSTEM_VENDOR_ID" },
338 { 0, 0x42, 2, 0x4, "CB_SUBSYSTEM_ID" },
339 { 0, 0x44, 4, 0x4, "CB_LEGACY_MODE_BASE" },
340 { 0x10001, 0, 0, 0x0, "CAP_PM" },
341 { 0x10002, 0, 0, 0x0, "CAP_AGP" },
342 { 0x10003, 0, 0, 0x0, "CAP_VPD" },
343 { 0x10004, 0, 0, 0x0, "CAP_SLOTID" },
344 { 0x10005, 0, 0, 0x0, "CAP_MSI" },
345 { 0x10006, 0, 0, 0x0, "CAP_CHSWP" },
346 { 0x10007, 0, 0, 0x0, "CAP_PCIX" },
347 { 0x10008, 0, 0, 0x0, "CAP_HT" },
348 { 0x10009, 0, 0, 0x0, "CAP_VNDR" },
349 { 0x1000a, 0, 0, 0x0, "CAP_DBG" },
350 { 0x1000b, 0, 0, 0x0, "CAP_CCRC" },
351 { 0x1000c, 0, 0, 0x0, "CAP_HOTPLUG" },
352 { 0x1000d, 0, 0, 0x0, "CAP_SSVID" },
353 { 0x1000e, 0, 0, 0x0, "CAP_AGP3" },
354 { 0x1000f, 0, 0, 0x0, "CAP_SECURE" },
355 { 0x10010, 0, 0, 0x0, "CAP_EXP" },
356 { 0x10011, 0, 0, 0x0, "CAP_MSIX" },
357 { 0x10012, 0, 0, 0x0, "CAP_SATA" },
358 { 0x10013, 0, 0, 0x0, "CAP_AF" },
359 { 0x10014, 0, 0, 0x0, "CAP_EA" },
360 { 0x20001, 0, 0, 0x0, "ECAP_AER" },
361 { 0x20002, 0, 0, 0x0, "ECAP_VC" },
362 { 0x20003, 0, 0, 0x0, "ECAP_DSN" },
363 { 0x20004, 0, 0, 0x0, "ECAP_PB" },
364 { 0x20005, 0, 0, 0x0, "ECAP_RCLINK" },
365 { 0x20006, 0, 0, 0x0, "ECAP_RCILINK" },
366 { 0x20007, 0, 0, 0x0, "ECAP_RCEC" },
367 { 0x20008, 0, 0, 0x0, "ECAP_MFVC" },
368 { 0x20009, 0, 0, 0x0, "ECAP_VC2" },
369 { 0x2000a, 0, 0, 0x0, "ECAP_RBCB" },
370 { 0x2000b, 0, 0, 0x0, "ECAP_VNDR" },
371 { 0x2000d, 0, 0, 0x0, "ECAP_ACS" },
372 { 0x2000e, 0, 0, 0x0, "ECAP_ARI" },
373 { 0x2000f, 0, 0, 0x0, "ECAP_ATS" },
374 { 0x20010, 0, 0, 0x0, "ECAP_SRIOV" },
375 { 0x20011, 0, 0, 0x0, "ECAP_MRIOV" },
376 { 0x20012, 0, 0, 0x0, "ECAP_MCAST" },
377 { 0x20013, 0, 0, 0x0, "ECAP_PRI" },
378 { 0x20015, 0, 0, 0x0, "ECAP_REBAR" },
379 { 0x20016, 0, 0, 0x0, "ECAP_DPA" },
380 { 0x20017, 0, 0, 0x0, "ECAP_TPH" },
381 { 0x20018, 0, 0, 0x0, "ECAP_LTR" },
382 { 0x20019, 0, 0, 0x0, "ECAP_SECPCI" },
383 { 0x2001a, 0, 0, 0x0, "ECAP_PMUX" },
384 { 0x2001b, 0, 0, 0x0, "ECAP_PASID" },
385 { 0x2001c, 0, 0, 0x0, "ECAP_LNR" },
386 { 0x2001d, 0, 0, 0x0, "ECAP_DPC" },
387 { 0x2001e, 0, 0, 0x0, "ECAP_L1PM" },
388 { 0x2001f, 0, 0, 0x0, "ECAP_PTM" },
389 { 0x20020, 0, 0, 0x0, "ECAP_M_PCIE" },
390 { 0x20021, 0, 0, 0x0, "ECAP_FRS" },
391 { 0x20022, 0, 0, 0x0, "ECAP_RTR" },
392 { 0x20023, 0, 0, 0x0, "ECAP_DVSEC" },
393 { 0x20024, 0, 0, 0x0, "ECAP_VF_REBAR" },
394 { 0x20025, 0, 0, 0x0, "ECAP_DLNK" },
395 { 0x20026, 0, 0, 0x0, "ECAP_16GT" },
396 { 0x20027, 0, 0, 0x0, "ECAP_LMR" },
397 { 0x20028, 0, 0, 0x0, "ECAP_HIER_ID" },
398 { 0x20029, 0, 0, 0x0, "ECAP_NPEM" },
399 { 0x2002a, 0, 0, 0x0, "ECAP_32GT" },
400 { 0x20030, 0, 0, 0x0, "ECAP_IDE" },
401 { 0x20031, 0, 0, 0x0, "ECAP_64GT" },
402 { 0, 0, 0, 0x0, NULL }
403 };
404
405 static void
dump_registers(void)406 dump_registers(void)
407 {
408 const struct reg_name *r;
409
410 printf("cap pos w name\n");
411 for (r = pci_reg_names; r->name; r++)
412 {
413 if (r->cap >= 0x20000)
414 printf("%04x", r->cap - 0x20000);
415 else if (r->cap)
416 printf(" %02x", r->cap - 0x10000);
417 else
418 printf(" ");
419 printf(" %02x %c %s\n", r->offset, "-BW?L"[r->width], r->name);
420 }
421 }
422
423 static void NONRET
usage(void)424 usage(void)
425 {
426 fprintf(stderr,
427 "Usage: setpci [<options>] (<device>+ <reg>[=<values>]*)*\n"
428 "\n"
429 "General options:\n"
430 "-f\t\tDon't complain if there's nothing to do\n"
431 "-v\t\tBe verbose\n"
432 "-D\t\tList changes, don't commit them\n"
433 "-r\t\tUse raw access without bus scan if possible\n"
434 "--dumpregs\tDump all known register names and exit\n"
435 "\n"
436 "PCI access options:\n"
437 GENERIC_HELP
438 "\n"
439 "Setting commands:\n"
440 "<device>:\t-s [[[<domain>]:][<bus>]:][<slot>][.[<func>]]\n"
441 "\t\t-d [<vendor>]:[<device>]\n"
442 "<reg>:\t\t<base>[+<offset>][.(B|W|L)][@<number>]\n"
443 "<base>:\t\t<address>\n"
444 "\t\t<named-register>\n"
445 "\t\t[E]CAP_<capability-name>\n"
446 "\t\t[E]CAP<capability-number>\n"
447 "<values>:\t<value>[,<value>...]\n"
448 "<value>:\t<hex>\n"
449 "\t\t<hex>:<mask>\n");
450 exit(0);
451 }
452
453 static void NONRET PCI_PRINTF(1,2)
parse_err(const char * msg,...)454 parse_err(const char *msg, ...)
455 {
456 va_list args;
457 va_start(args, msg);
458 fprintf(stderr, "setpci: ");
459 vfprintf(stderr, msg, args);
460 fprintf(stderr, ".\nTry `setpci --help' for more information.\n");
461 exit(1);
462 }
463
464 static int
parse_options(int argc,char ** argv)465 parse_options(int argc, char **argv)
466 {
467 const char opts[] = GENERIC_OPTIONS;
468 int i=1;
469
470 if (argc == 2)
471 {
472 if (!strcmp(argv[1], "--help"))
473 usage();
474 if (!strcmp(argv[1], "--version"))
475 {
476 puts("setpci version " PCIUTILS_VERSION);
477 exit(0);
478 }
479 if (!strcmp(argv[1], "--dumpregs"))
480 {
481 dump_registers();
482 exit(0);
483 }
484 }
485
486 while (i < argc && argv[i][0] == '-')
487 {
488 char *c = argv[i++] + 1;
489 char *d = c;
490 char *e;
491 while (*c)
492 switch (*c)
493 {
494 case 0:
495 break;
496 case 'v':
497 verbose++;
498 c++;
499 break;
500 case 'f':
501 force++;
502 c++;
503 break;
504 case 'D':
505 demo_mode++;
506 c++;
507 break;
508 case 'r':
509 allow_raw_access++;
510 c++;
511 break;
512 default:
513 if (e = strchr(opts, *c))
514 {
515 char *arg;
516 c++;
517 if (e[1] == ':')
518 {
519 if (*c)
520 arg = c;
521 else if (i < argc)
522 arg = argv[i++];
523 else
524 parse_err("Option -%c requires an argument", *e);
525 c = "";
526 }
527 else
528 arg = NULL;
529 if (!parse_generic_option(*e, pacc, arg))
530 parse_err("Unable to parse option -%c", *e);
531 }
532 else
533 {
534 if (c != d)
535 parse_err("Invalid or misplaced option -%c", *c);
536 return i-1;
537 }
538 }
539 }
540
541 return i;
542 }
543
parse_filter(int argc,char ** argv,int i,struct group * group)544 static int parse_filter(int argc, char **argv, int i, struct group *group)
545 {
546 char *c = argv[i++];
547 char *d;
548
549 if (!c[1] || !strchr("sd", c[1]))
550 parse_err("Invalid option -%c", c[1]);
551 if (c[2])
552 d = (c[2] == '=') ? c+3 : c+2;
553 else if (i < argc)
554 d = argv[i++];
555 else
556 parse_err("Option -%c requires an argument", c[1]);
557 switch (c[1])
558 {
559 case 's':
560 if (d = pci_filter_parse_slot(&group->filter, d))
561 parse_err("Unable to parse filter -s %s", d);
562 break;
563 case 'd':
564 if (d = pci_filter_parse_id(&group->filter, d))
565 parse_err("Unable to parse filter -d %s", d);
566 break;
567 default:
568 parse_err("Unknown filter option -%c", c[1]);
569 }
570
571 return i;
572 }
573
parse_reg_name(char * name)574 static const struct reg_name *parse_reg_name(char *name)
575 {
576 const struct reg_name *r;
577
578 for (r = pci_reg_names; r->name; r++)
579 if (!strcasecmp(r->name, name))
580 return r;
581 return NULL;
582 }
583
parse_x32(char * c,char ** stopp,unsigned int * resp)584 static int parse_x32(char *c, char **stopp, unsigned int *resp)
585 {
586 char *stop;
587 unsigned long int l;
588
589 if (!*c)
590 return -1;
591 errno = 0;
592 l = strtoul(c, &stop, 16);
593 if (errno)
594 return -1;
595 if ((l & ~0U) != l)
596 return -1;
597 *resp = l;
598 if (*stop)
599 {
600 if (stopp)
601 *stopp = stop;
602 return 0;
603 }
604 else
605 {
606 if (stopp)
607 *stopp = NULL;
608 return 1;
609 }
610 }
611
parse_register(struct op * op,char * base)612 static void parse_register(struct op *op, char *base)
613 {
614 const struct reg_name *r;
615 unsigned int cap;
616
617 op->cap_type = op->cap_id = 0;
618 if (parse_x32(base, NULL, &op->addr) > 0)
619 return;
620 else if (r = parse_reg_name(base))
621 {
622 switch (r->cap & 0xff0000)
623 {
624 case 0x10000:
625 op->cap_type = PCI_CAP_NORMAL;
626 break;
627 case 0x20000:
628 op->cap_type = PCI_CAP_EXTENDED;
629 break;
630 }
631 op->cap_id = r->cap & 0xffff;
632 op->addr = r->offset;
633 op->hdr_type_mask = r->hdr_type_mask;
634 op->name = r->name;
635 if (r->width && !op->width)
636 op->width = r->width;
637 return;
638 }
639 else if (!strncasecmp(base, "CAP", 3))
640 {
641 if (parse_x32(base+3, NULL, &cap) > 0 && cap < 0x100)
642 {
643 op->cap_type = PCI_CAP_NORMAL;
644 op->cap_id = cap;
645 op->addr = 0;
646 return;
647 }
648 }
649 else if (!strncasecmp(base, "ECAP", 4))
650 {
651 if (parse_x32(base+4, NULL, &cap) > 0 && cap < 0x1000)
652 {
653 op->cap_type = PCI_CAP_EXTENDED;
654 op->cap_id = cap;
655 op->addr = 0;
656 return;
657 }
658 }
659 parse_err("Unknown register \"%s\"", base);
660 }
661
parse_op(char * c,struct group * group)662 static void parse_op(char *c, struct group *group)
663 {
664 char *base, *offset, *width, *value, *number;
665 char *e, *f;
666 int n, j;
667 struct op *op;
668
669 /* Split the argument */
670 base = xstrdup(c);
671 if (value = strchr(base, '='))
672 *value++ = 0;
673 if (number = strchr(base, '@'))
674 *number++ = 0;
675 if (width = strchr(base, '.'))
676 *width++ = 0;
677 if (offset = strchr(base, '+'))
678 *offset++ = 0;
679
680 /* Look for setting of values and count how many */
681 n = 0;
682 if (value)
683 {
684 if (!*value)
685 parse_err("Missing value");
686 n++;
687 for (e=value; *e; e++)
688 if (*e == ',')
689 n++;
690 }
691
692 /* Allocate the operation */
693 op = xmalloc(sizeof(struct op) + n*sizeof(struct value));
694 memset(op, 0, sizeof(struct op));
695 *group->last_op = op;
696 group->last_op = &op->next;
697 op->num_values = n;
698
699 /* What is the width suffix? */
700 if (width)
701 {
702 if (width[1])
703 parse_err("Invalid width \"%s\"", width);
704 switch (*width & 0xdf)
705 {
706 case 'B':
707 op->width = 1; break;
708 case 'W':
709 op->width = 2; break;
710 case 'L':
711 op->width = 4; break;
712 default:
713 parse_err("Invalid width \"%c\"", *width);
714 }
715 }
716 else
717 op->width = 0;
718
719 /* Check which n-th capability of the same id we want */
720 if (number)
721 {
722 unsigned int num;
723 if (parse_x32(number, NULL, &num) <= 0 || (int) num < 0)
724 parse_err("Invalid number \"%s\"", number);
725 op->number = num;
726
727 }
728 else
729 op->number = 0;
730
731 /* Find the register */
732 parse_register(op, base);
733 if (!op->width)
734 parse_err("Missing width");
735
736 /* Add offset */
737 if (offset)
738 {
739 unsigned int off;
740 if (parse_x32(offset, NULL, &off) <= 0 || off >= 0x1000)
741 parse_err("Invalid offset \"%s\"", offset);
742 op->addr += off;
743 }
744
745 /* Check range */
746 if (op->addr >= 0x1000 || op->addr + op->width*(n ? n : 1) > 0x1000)
747 parse_err("Register number %02x out of range", op->addr);
748 if (op->addr & (op->width - 1))
749 parse_err("Unaligned register address %02x", op->addr);
750
751 /* Parse the values */
752 for (j=0; j<n; j++)
753 {
754 unsigned int ll, lim;
755 e = strchr(value, ',');
756 if (e)
757 *e++ = 0;
758 if (parse_x32(value, &f, &ll) < 0 || f && *f != ':')
759 parse_err("Invalid value \"%s\"", value);
760 lim = max_values[op->width];
761 if (ll > lim && ll < ~0U - lim)
762 parse_err("Value \"%s\" is out of range", value);
763 op->values[j].value = ll;
764 if (f && *f == ':')
765 {
766 if (parse_x32(f+1, NULL, &ll) <= 0)
767 parse_err("Invalid mask \"%s\"", f+1);
768 if (ll > lim && ll < ~0U - lim)
769 parse_err("Mask \"%s\" is out of range", f+1);
770 op->values[j].mask = ll;
771 op->values[j].value &= ll;
772 }
773 else
774 op->values[j].mask = ~0U;
775 value = e;
776 }
777 }
778
new_group(void)779 static struct group *new_group(void)
780 {
781 struct group *g = xmalloc(sizeof(*g));
782
783 memset(g, 0, sizeof(*g));
784 pci_filter_init(pacc, &g->filter);
785 g->last_op = &g->first_op;
786
787 *last_group = g;
788 last_group = &g->next;
789 return g;
790 }
791
parse_ops(int argc,char ** argv,int i)792 static void parse_ops(int argc, char **argv, int i)
793 {
794 struct group *group = NULL;
795
796 while (i < argc)
797 {
798 char *c = argv[i++];
799
800 if (*c == '-')
801 {
802 if (!group || group->first_op)
803 group = new_group();
804 i = parse_filter(argc, argv, i-1, group);
805 }
806 else
807 {
808 if (!group)
809 parse_err("Filter specification expected");
810 parse_op(c, group);
811 }
812 }
813 if (!group)
814 parse_err("No operation specified");
815 }
816
817 int
main(int argc,char ** argv)818 main(int argc, char **argv)
819 {
820 int i;
821
822 pacc = pci_alloc();
823 pacc->error = die;
824 i = parse_options(argc, argv);
825
826 pci_init(pacc);
827
828 parse_ops(argc, argv, i);
829 scan_ops();
830
831 if (need_bus_scan)
832 pci_scan_bus(pacc);
833
834 execute();
835
836 return 0;
837 }
838