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Searched refs:insertBits (Results 1 – 20 of 20) sorted by relevance

/llvm-project-15.0.7/llvm/test/TableGen/
H A DVarLenEncoder.td71 // CHECK: Inst.insertBits(Scratch.extractBits(8, 0), 0);
74 // CHECK: Inst.insertBits(Scratch.extractBits(16, 0), 16);
77 // CHECK: Inst.insertBits(Scratch.extractBits(4, 0), 32);
80 // CHECK: Inst.insertBits(Scratch.extractBits(3, 1), 36);
83 // CHECK: Inst.insertBits(Scratch.extractBits(2, 0), 39);
89 // CHECK: Inst.insertBits(Scratch.extractBits(8, 0), 0);
92 // CHECK: Inst.insertBits(Scratch.extractBits(32, 0), 16);
95 // CHECK: Inst.insertBits(Scratch.extractBits(4, 0), 48);
98 // CHECK: Inst.insertBits(Scratch.extractBits(3, 1), 52);
101 // CHECK: Inst.insertBits(Scratch.extractBits(2, 0), 55);
H A DBigEncoder.td50 // CHECK: Value.insertBits(op.extractBitsAsZExtValue(4, 3), 12, 4);
51 // CHECK-NEXT: Value.insertBits(op.extractBitsAsZExtValue(4, 7), 8, 4);
54 // CHECK: Value.insertBits(op.extractBitsAsZExtValue(7, 0), 8, 7);
57 // CHECK: Value.insertBits(op.extractBitsAsZExtValue(8, 3), 8, 8);
H A DBitOffsetDecoder.td62 // CHECK: insertBits(tmp, fieldFromInstruction(insn, 8, 4), 7, 4);
63 // CHECK: insertBits(tmp, fieldFromInstruction(insn, 12, 4), 3, 4);
H A DVarLenDecoder.td74 // CHECK-NEXT: insertBits(tmp, fieldFromInstruction(insn, 11, 16), 16, 16);
75 // CHECK-NEXT: insertBits(tmp, fieldFromInstruction(insn, 27, 16), 0, 16);
/llvm-project-15.0.7/llvm/test/TableGen/FixedLenDecoderEmitter/
H A DInitValue.td44 // CHECK: insertBits(tmp, fieldFromInstruction(insn, 9, 7), 1, 7);
46 // CHECK: insertBits(tmp, fieldFromInstruction(insn, 8, 7), 25, 7);
/llvm-project-15.0.7/llvm/include/llvm/Support/
H A DKnownBits.h210 void insertBits(const KnownBits &SubBits, unsigned BitPosition) { in insertBits() function
211 Zero.insertBits(SubBits.Zero, BitPosition); in insertBits()
212 One.insertBits(SubBits.One, BitPosition); in insertBits()
/llvm-project-15.0.7/llvm/unittests/ADT/
H A DAPIntTest.cpp1936 TEST(APIntTest, insertBits) { in TEST() argument
1941 i31.insertBits(iSrc, 0); in TEST()
1946 i63.insertBits(iSrc, 4); in TEST()
1955 i120.insertBits(iSrc, 8); in TEST()
1960 i127.insertBits(iSrc, 48); in TEST()
1999 i31.insertBits(iSrc, 0, 31); in TEST()
2004 i63.insertBits(iSrc, 4, 31); in TEST()
2025 i256.insertBits(0, 0, 64); in TEST()
2026 i256.insertBits(0, 64, 1); in TEST()
2027 i256.insertBits(0, 64, 64); in TEST()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/M68k/Disassembler/
H A DM68kDisassembler.cpp122 Insn.insertBits(support::endian::read16be(&Bytes[Idx]), Idx * 8, 16); in getInstruction()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ShuffleDecodeConstantPool.cpp93 MaskBits.insertBits(cast<ConstantInt>(COp)->getValue(), BitOffset); in extractConstantMask()
H A DX86ISelLowering.cpp7227 MaskBits.insertBits(SrcEltBits[i], BitOffset); in getTargetConstantBitsFromNode()
7418 UndefSrcElts.insertBits(UndefSubElts, BaseIdx); in getTargetConstantBitsFromNode()
54153 UndefElts.insertBits(OpUndefElts, I * OpUndefElts.getBitWidth()); in combineConcatVectorOps()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.h43 void insertBits(uint64_t SubBits, unsigned BitPosition, unsigned NumBits) { in insertBits() function
/llvm-project-15.0.7/llvm/include/llvm/ADT/
H A DAPInt.h1399 void insertBits(const APInt &SubBits, unsigned bitPosition);
1400 void insertBits(uint64_t SubBits, unsigned bitPosition, unsigned numBits);
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DLoadStoreOpt.cpp397 WideConst.insertBits(ConstantVals[Idx], Idx * SmallTy.getSizeInBits()); in doSingleStoreMerge()
H A DGISelKnownBits.cpp494 Known.insertBits(SrcOpKnown, I * OpSize); in computeKnownBitsImpl()
/llvm-project-15.0.7/llvm/lib/Support/
H A DAPInt.cpp347 Result.insertBits(*this, NewLSB.getBitWidth()); in concatSlowCase()
359 void APInt::insertBits(const APInt &subBits, unsigned bitPosition) { in insertBits() function in APInt
417 void APInt::insertBits(uint64_t subBits, unsigned bitPosition, unsigned numBits) { in insertBits() function in APInt
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp727 DemandedSrcBits.insertBits(DemandedBits, Offset); in SimplifyMultipleUseDemandedBits()
1211 DemandedSrcElts.insertBits(APInt::getZero(NumSubElts), Idx); in SimplifyDemandedBits()
2532 DemandedSrcBits.insertBits(DemandedBits, Offset); in SimplifyDemandedBits()
3014 KnownUndef.insertBits(SubUndef, i * NumSubElts); in SimplifyDemandedVectorElts()
3015 KnownZero.insertBits(SubZero, i * NumSubElts); in SimplifyDemandedVectorElts()
3047 DemandedSrcElts.insertBits(APInt::getZero(NumSubElts), Idx); in SimplifyDemandedVectorElts()
3063 KnownUndef.insertBits(SubUndef, Idx); in SimplifyDemandedVectorElts()
3064 KnownZero.insertBits(SubZero, Idx); in SimplifyDemandedVectorElts()
H A DSelectionDAG.cpp3042 DemandedSrcElts.insertBits(APInt::getZero(NumSubElts), Idx); in computeKnownBits()
3117 Known.insertBits(Known2, SubBitWidth * Shifts); in computeKnownBits()
3344 Known.insertBits(Known2, LoBits); in computeKnownBits()
4394 DemandedSrcElts.insertBits(APInt::getZero(NumSubElts), Idx); in ComputeNumSignBits()
11426 SplatValue.insertBits(CN->getAPIntValue().zextOrTrunc(EltWidth), BitPos); in isConstantSplat()
11428 SplatValue.insertBits(CN->getValueAPF().bitcastToAPInt(), BitPos); in isConstantSplat()
11662 DstBits.insertBits(SrcBits, J * SrcEltSizeInBits); in recastRawBits()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp7196 SrcDemE.insertBits(DemandedElts, 0); in getDemandedSrcElements()
7205 SrcDemE.insertBits(DemandedElts, NumElts); in getDemandedSrcElements()
7227 SrcDemE.insertBits(DemEls, FirstIdx); in getDemandedSrcElements()
7230 SrcDemE.insertBits(DemEls, 0); in getDemandedSrcElements()
/llvm-project-15.0.7/llvm/lib/Analysis/
H A DConstantFolding.cpp2895 Val.insertBits(B, I, 8); in ConstantFoldAMDGCNPermIntrinsic()
H A DValueTracking.cpp1269 Known.insertBits(KnownSrc, ShiftElt * SubBitWidth); in computeKnownBitsFromOperator()