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Searched refs:getUndefRegState (Results 1 – 17 of 17) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DMachineInstrBuilder.h514 inline unsigned getUndefRegState(bool B) { in getUndefRegState() function
532 getUndefRegState(RegOp.isUndef()) | in getRegState()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DMachineInstrBundle.cpp228 MIB.addReg(Reg, getKillRegState(isKill) | getUndefRegState(isUndef) | in finalizeBundle()
H A DSplitKit.cpp524 .addReg(ToReg, RegState::Define | getUndefRegState(FirstCopy) in buildSingleSubRegCopy()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp1743 .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef)); in InsertLDR_STR()
1751 .addReg(Reg, getKillRegState(RegDeadKill) | getUndefRegState(RegUndef)) in InsertLDR_STR()
1752 .addReg(BaseReg, getKillRegState(BaseKill)|getUndefRegState(BaseUndef)); in InsertLDR_STR()
1822 getKillRegState(EvenDeadKill) | getUndefRegState(EvenUndef)) in FixInvalidRegPairOp()
1824 getKillRegState(OddDeadKill) | getUndefRegState(OddUndef)) in FixInvalidRegPairOp()
H A DARMExpandPseudoInsts.cpp738 MIB.addReg(D0, getUndefRegState(SrcIsUndef)); in ExpandVST()
740 MIB.addReg(D1, getUndefRegState(SrcIsUndef)); in ExpandVST()
742 MIB.addReg(D2, getUndefRegState(SrcIsUndef)); in ExpandVST()
744 MIB.addReg(D3, getUndefRegState(SrcIsUndef)); in ExpandVST()
822 unsigned SrcFlags = (getUndefRegState(MO.isUndef()) | in ExpandLaneOp()
H A DARMBaseInstrInfo.cpp5193 .addReg(DReg, getUndefRegState(!MI.readsRegister(DReg, TRI))) in setExecutionDomain()
5229 .addReg(DDst, getUndefRegState(!MI.readsRegister(DDst, TRI))) in setExecutionDomain()
5263 NewMIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain()
5267 NewMIB.addReg(CurReg, getUndefRegState(CurUndef)) in setExecutionDomain()
5281 MIB.addReg(CurReg, getUndefRegState(CurUndef)); in setExecutionDomain()
5285 MIB.addReg(CurReg, getUndefRegState(CurUndef)) in setExecutionDomain()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp678 unsigned Flags1 = getUndefRegState(Cond[1].isUndef()); in insertBranch()
682 unsigned Flags2 = getUndefRegState(Cond[2].isUndef()); in insertBranch()
693 unsigned Flags = getUndefRegState(RO.isUndef()); in insertBranch()
717 unsigned Flags = getUndefRegState(RO.isUndef()); in insertBranch()
923 unsigned UndefLo = getUndefRegState(!LiveAtMI.contains(SrcLo)); in copyPhysReg()
924 unsigned UndefHi = getUndefRegState(!LiveAtMI.contains(SrcHi)); in copyPhysReg()
1136 unsigned UndefLo = getUndefRegState(!LiveIn.contains(SrcLo)); in expandPostRAPseudo()
1137 unsigned UndefHi = getUndefRegState(!LiveIn.contains(SrcHi)); in expandPostRAPseudo()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIOptimizeExecMaskingPreRA.cpp205 .addReg(CCReg, getUndefRegState(CC->isUndef()), CC->getSubReg()); in optimizeVcndVcmpPair()
H A DAMDGPUInstructionSelector.cpp548 MIB.addReg(Src.getReg(), getUndefRegState(Src.isUndef())); in selectG_MERGE_VALUES()
H A DSIInstrInfo.cpp5496 unsigned VRsrcUndef = getUndefRegState(Rsrc.isUndef()); in emitLoadSRsrcFromVGPRLoop()
H A DSIISelLowering.cpp3617 .addReg(Idx.getReg(), getUndefRegState(Idx.isUndef())); in emitLoadM0FromVGPRLoop()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.cpp83 unsigned Reg128Undef = getUndefRegState(LowRegOp.isUndef()); in splitMove()
268 .addReg(SrcReg, getKillRegState(KillSrc) | getUndefRegState(UndefSrc)); in emitGRX32Move()
273 .addReg(SrcReg, getKillRegState(KillSrc) | getUndefRegState(UndefSrc)) in emitGRX32Move()
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyRegStackify.cpp649 .addReg(DefReg, getUndefRegState(DefMO.isDead())); in moveAndTeeForMultiUse()
/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRExpandPseudoInsts.cpp1073 .addReg(DstReg, getUndefRegState(DstIsUndef)) in expand()
1077 .addReg(DstReg, getUndefRegState(DstIsUndef)) in expand()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86FrameLowering.cpp313 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub)) in emitSPUpdate()
H A DX86InstrInfo.cpp4869 getUndefRegState(MIB->getOperand(1).isUndef())); in expandSHXDROT()
6937 getUndefRegState(ImpOp.isUndef())); in unfoldMemoryOperand()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.cpp3929 .addReg(DestReg0, RegState::Define | getUndefRegState(IsUndef), SubIdx0) in loadRegPairFromStackSlot()
3930 .addReg(DestReg1, RegState::Define | getUndefRegState(IsUndef), SubIdx1) in loadRegPairFromStackSlot()