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Searched refs:getStoreSizeInBits (Results 1 – 13 of 13) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DValueTypes.h379 TypeSize getStoreSizeInBits() const { in getStoreSizeInBits() function
/llvm-project-15.0.7/llvm/include/llvm/Support/
H A DMachineValueType.h1118 TypeSize getStoreSizeInBits() const { in getStoreSizeInBits() function
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp40 unsigned StoreSize = VT.getStoreSizeInBits(); in getEquivalentMemType()
639 unsigned NewSize = NewVT.getStoreSizeInBits(); in shouldReduceLoadWidth()
647 unsigned OldSize = OldVT.getStoreSizeInBits(); in shouldReduceLoadWidth()
995 unsigned MemoryBits = ArgVT.getStoreSizeInBits() / NumRegs; in analyzeFormalArgumentsCompute()
996 assert(ArgVT.getStoreSizeInBits() % NumRegs == 0); in analyzeFormalArgumentsCompute()
H A DSIISelLowering.cpp7955 EVT::getIntegerVT(*DAG.getContext(), StoreVT.getStoreSizeInBits()); in handleD16VData()
7961 WidenedStoreVT.getStoreSizeInBits()); in handleD16VData()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DAtomicExpandPass.cpp348 unsigned BitWidth = VT.getStoreSizeInBits(); in getCorrespondingIntegerType()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp546 TypeSize StSize = StVT.getStoreSizeInBits(); in LegalizeStoreOps()
728 if (SrcWidth != SrcVT.getStoreSizeInBits() && in LegalizeLoadOps()
741 unsigned NewWidth = SrcVT.getStoreSizeInBits(); in LegalizeLoadOps()
H A DDAGCombiner.cpp12907 LN0->getMemoryVT().getStoreSizeInBits().getFixedSize(); in reduceLoadWidth()
12908 unsigned EVTStoreBits = ExtVT.getStoreSizeInBits().getFixedSize(); in reduceLoadWidth()
16695 Offset = ((int64_t)STMemType.getStoreSizeInBits().getFixedSize() - in ForwardStoreValueToDirectLoad()
16696 (int64_t)LDMemType.getStoreSizeInBits().getFixedSize()) / in ForwardStoreValueToDirectLoad()
17667 (NewVT.getStoreSizeInBits() != NewBW || in ReduceLoadOpStoreWidth()
17891 TypeSize ElementSizeBits = MemVT.getStoreSizeInBits(); in mergeStoresOfConstantsOrVecElts()
H A DTargetLowering.cpp8222 unsigned NumLoadBits = SrcVT.getStoreSizeInBits(); in scalarizeVectorLoad()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp503 LargestAlignSeen, Align(VA.getLocVT().getStoreSizeInBits() / 8)); in LowerCall()
873 : VA.getLocVT().getStoreSizeInBits() / 8; in LowerFormalArguments()
/llvm-project-15.0.7/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1789 unsigned StoreBits = ST->getMemoryVT().getStoreSizeInBits(); in PerformDAGCombine()
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DIRTranslator.cpp2477 : LLT::scalar(Info.memVT.getStoreSizeInBits()); in translateCall()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp2277 NumBits != Load->getMemoryVT().getStoreSizeInBits()) in adjustSubwordCmp()
2494 if (L->getMemoryVT().getStoreSizeInBits().getFixedSize() <= in adjustICmpTruncate()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp7362 unsigned SubVecSizeInBits = MemIntr->getMemoryVT().getStoreSizeInBits(); in getTargetConstantBitsFromNode()
9259 assert(EltBaseVT.getSizeInBits() == EltBaseVT.getStoreSizeInBits() && in EltsFromConsecutiveLoads()
9263 unsigned BaseSizeInBits = EltBaseVT.getStoreSizeInBits(); in EltsFromConsecutiveLoads()
41403 if (ExtSizeInBits == MemVT.getStoreSizeInBits()) { in SimplifyDemandedVectorEltsForTargetNode()
41412 } else if ((ExtSizeInBits % MemVT.getStoreSizeInBits()) == 0) { in SimplifyDemandedVectorEltsForTargetNode()