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Searched refs:getSpillAlign (Results 1 – 25 of 25) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/XCore/
H A DXCoreMachineFunctionInfo.cpp53 TRI.getSpillAlign(RC), true); in createLRSpillSlot()
67 MFI.CreateStackObject(TRI.getSpillSize(RC), TRI.getSpillAlign(RC), true); in createFPSpillSlot()
80 Align Alignment = TRI.getSpillAlign(RC); in createEHSpillSlot()
H A DXCoreFrameLowering.cpp578 Align Alignment = TRI.getSpillAlign(RC); in processFunctionBeforeFrameFinalized()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsMachineFunction.cpp165 TRI.getSpillAlign(RC), false); in createEhDataRegsFI()
179 TRI.getSpillAlign(RC), false); in createISRRegFI()
205 TRI.getSpillSize(*RC), TRI.getSpillAlign(*RC), false); in getMoveF64ViaSpillFI()
H A DMipsSEFrameLowering.cpp895 TRI->getSpillAlign(RC), false); in determineCalleeSaves()
911 TRI->getSpillAlign(RC), false); in determineCalleeSaves()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86LowerTileCopy.cpp91 Align Alignment = TRI->getSpillAlign(X86::TILERegClass); in runOnMachineFunction()
95 Alignment = TRI->getSpillAlign(X86::GR64RegClass); in runOnMachineFunction()
H A DX86FastPreTileConfig.cpp129 Align Alignment = TRI->getSpillAlign(RC); in getStackSpaceFor()
H A DX86FrameLowering.cpp2662 Align Alignment = TRI->getSpillAlign(*RC); in assignCalleeSavedSpillSlots()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonVExtract.cpp140 Align Alignment = HRI.getSpillAlign(VecRC); in runOnMachineFunction()
H A DHexagonFrameLowering.cpp1718 Align Alignment = std::min(TRI->getSpillAlign(*RC), getStackAlign()); in assignCalleeSavedSpillSlots()
1942 Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); in expandStoreVec2()
1994 Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); in expandLoadVec2()
2038 Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); in expandStoreVec()
2068 Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); in expandLoadVec()
2172 Align A = HRI.getSpillAlign(*RC); in determineCalleeSaves()
H A DHexagonInstrInfo.cpp1168 Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); in expandPostRAPseudo()
1184 Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); in expandPostRAPseudo()
1206 Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); in expandPostRAPseudo()
1223 Align NeedAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); in expandPostRAPseudo()
H A DHexagonISelLowering.cpp526 Align VecAlign = HRI.getSpillAlign(Hexagon::HvxVRRegClass); in LowerCall()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIMachineFunctionInfo.cpp483 TRI.getSpillSize(*RC), TRI.getSpillAlign(*RC)); in allocateWWMReservedSpillSlots()
497 TRI.getSpillAlign(AMDGPU::SGPR_32RegClass), false); in getScavengeFI()
H A DSILowerSGPRSpills.cpp223 TRI->getSpillAlign(*RC), true); in spillCalleeSavedRegs()
/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCFrameLowering.cpp443 RegInfo->getSpillAlign(*RC), false); in processFunctionBeforeFrameFinalized()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h289 Align getSpillAlign(const TargetRegisterClass &RC) const { in getSpillAlign() function
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DVirtRegMap.cpp97 Align Alignment = TRI->getSpillAlign(*RC); in createSpillSlot()
H A DRegisterScavenging.cpp453 Align NeedAlign = TRI->getSpillAlign(RC); in spill()
H A DPrologEpilogInserter.cpp464 Align Alignment = RegInfo->getSpillAlign(*RC); in assignCalleeSavedSpillSlots()
H A DRegAllocFast.cpp328 Align Alignment = TRI->getSpillAlign(RC); in getStackSpaceFor()
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYFrameLowering.cpp442 Align align = TRI->getSpillAlign(*RC); in determineCalleeSaves()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVFrameLowering.cpp1035 RegInfo->getSpillSize(*RC), RegInfo->getSpillAlign(*RC), false)); in processFunctionBeforeFrameFinalized()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZFrameLowering.cpp1033 Align Alignment = TRI->getSpillAlign(*RC); in assignCalleeSavedSpillSlots()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64FrameLowering.cpp3089 Align Alignment = TRI->getSpillAlign(RC); in determineCalleeSaves()
3155 Align Alignment(RegInfo->getSpillAlign(*RC)); in assignCalleeSavedSpillSlots()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCFrameLowering.cpp2283 Align Alignment = TRI.getSpillAlign(RC); in addScavengingSpillSlot()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMFrameLowering.cpp2734 Align Alignment = TRI->getSpillAlign(RC); in determineCalleeSaves()