| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | ScheduleDAG.cpp | 112 if (!Required && PredDep.getSUnit() == D.getSUnit()) in addPred() 136 SUnit *N = D.getSUnit(); in addPred() 183 SUnit *N = D.getSUnit(); in removePred() 225 SUnit *SuccSU = SuccDep.getSUnit(); in setDepthDirty() 240 SUnit *PredSU = PredDep.getSUnit(); in setHeightDirty() 273 SUnit *PredSU = PredDep.getSUnit(); in ComputeDepth() 304 SUnit *SuccSU = SuccDep.getSUnit(); in ComputeHeight() 370 dumpNodeName(*Dep.getSUnit()); in dumpNodeAll() 380 dumpNodeName(*Dep.getSUnit()); in dumpNodeAll() 501 SUnit *SU = PredDep.getSUnit(); in InitDAGTopologicalSorting() [all …]
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| H A D | MachinePipeliner.cpp | 693 SUnit *SuccSU = SI.getSUnit(); in isSuccOrder() 936 SUnit *DefSU = getSUnit(DefMI); in changeDependences() 953 if (P.getSUnit() == DefSU) in changeDependences() 1203 SUnit *TargetSU = D.getSUnit(); in swapAntiDependences() 1453 SUnit *pred = P.getSUnit(); in computeNodeFunctions() 1473 SUnit *succ = S.getSUnit(); in computeNodeFunctions() 2219 SUnit *SU = getSUnit(MI); in applyInstrChange() 2464 return P.getSUnit(); in multipleIterations() 2484 if (Dep.getSUnit() == I) { in computeStart() 2598 if (S.getSUnit() != *I) in orderDependence() [all …]
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| H A D | MacroFusion.cpp | 41 return SI.getSUnit(); in getPredClusterSU() 83 if (SI.getSUnit() == &SecondSU) in fuseInstructionPair() 87 if (SI.getSUnit() == &FirstSU) in fuseInstructionPair() 100 SUnit *SU = SI.getSUnit(); in fuseInstructionPair() 113 SUnit *SU = SI.getSUnit(); in fuseInstructionPair() 182 SUnit &DepSU = *Dep.getSUnit(); in scheduleAdjacentImpl()
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| H A D | VLIWMachineScheduler.cpp | 97 if (S.getSUnit() == SUu && S.getLatency() > 0) in hasDependence() 312 unsigned PredReadyCycle = PI.getSUnit()->TopReadyCycle; in releaseTopNode() 330 unsigned SuccReadyCycle = I->getSUnit()->BotReadyCycle; in releaseBottomNode() 554 if (!Pred.getSUnit()->isScheduled && (Pred.getSUnit() != SU2)) in isSingleUnscheduledPred() 569 if (!Succ.getSUnit()->isScheduled && (Succ.getSUnit() != SU2)) in isSingleUnscheduledSucc() 667 if (isSingleUnscheduledPred(SI.getSUnit(), SU)) in SchedulingCost() 673 if (isSingleUnscheduledSucc(PI.getSUnit(), SU)) in SchedulingCost() 713 Top.ResourceModel->isInPacket(PI.getSUnit())) { in SchedulingCost() 722 Bot.ResourceModel->isInPacket(SI.getSUnit())) { in SchedulingCost() 738 Top.ResourceModel->isInPacket(PI.getSUnit())) { in SchedulingCost() [all …]
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| H A D | LatencyPriorityQueue.cpp | 59 SUnit &Pred = *P.getSUnit(); in getSingleUnscheduledPred() 77 if (getSingleUnscheduledPred(Succ.getSUnit()) == SU) in push() 91 AdjustPriorityOfUnscheduledPreds(Succ.getSUnit()); in scheduledNode()
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| H A D | ScheduleDAGInstrs.cpp | 1199 if (Topo.IsReachable(PredDep.getSUnit(), SuccSU)) in addEdge() 1201 Topo.AddPredQueued(SuccSU, PredDep.getSUnit()); in addEdge() 1277 unsigned PredNum = PredDep.getSUnit()->NodeNum; in visitPostorderNode() 1305 += R.DFSNodeData[PredDep.getSUnit()->NodeNum].InstrCount; in visitPostorderEdge() 1311 ConnectionPairs.push_back(std::make_pair(PredDep.getSUnit(), Succ)); in visitCrossEdge() 1358 const SUnit *PredSU = PredDep.getSUnit(); in joinPredSubtree() 1434 !SuccDep.getSUnit()->isBoundaryNode()) in hasDataSucc() 1461 || PredDep.getSUnit()->isBoundaryNode()) { in compute() 1465 if (Impl.isVisited(PredDep.getSUnit())) { in compute() 1469 Impl.visitPreorder(PredDep.getSUnit()); in compute() [all …]
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| H A D | MachineScheduler.cpp | 639 SUnit *SuccSU = SuccEdge->getSUnit(); in releaseSucc() 676 SUnit *PredSU = PredEdge->getSUnit(); in releasePred() 930 if (SUnit *SU = getSUnit(&MI)) in dumpSchedule() 1351 const SUnit *DefSU = getSUnit(DefMI); in computeCyclicCriticalPath() 1649 if (Succ.getSUnit() == SUb) in clusterNeighboringMemOps() 1663 if (Pred.getSUnit() == SUa) in clusterNeighboringMemOps() 1723 (Pred.getSUnit() && Pred.getSUnit()->getInstr()->mayStore()))) && in groupMemOps() 1906 if (Succ.getSUnit() == GlobalSU) in constrainLocalCopy() 1910 LocalUses.push_back(Succ.getSUnit()); in constrainLocalCopy() 1921 if (Pred.getSUnit() == FirstLocalSU) in constrainLocalCopy() [all …]
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| H A D | AggressiveAntiDepBreaker.cpp | 276 const SUnit *PredSU = Pred.getSUnit(); in CriticalPathStep() 289 return (Next) ? Next->getSUnit() : nullptr; in CriticalPathStep() 832 SUnit *NextSU = Edge->getSUnit(); in BreakAntiDependencies() 875 if (Pred.getSUnit() == NextSU ? (Pred.getKind() != SDep::Anti || in BreakAntiDependencies() 884 if ((Pred.getSUnit() == NextSU) && (Pred.getKind() != SDep::Anti) && in BreakAntiDependencies() 889 } else if ((Pred.getSUnit() != NextSU) && in BreakAntiDependencies()
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| H A D | CriticalAntiDepBreaker.cpp | 145 const SUnit *PredSU = P.getSUnit(); in CriticalPathStep() 562 const SUnit *NextSU = Edge->getSUnit(); in BreakAntiDependencies() 585 if (P.getSUnit() == NextSU in BreakAntiDependencies()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | GCNMinRegStrategy.cpp | 90 for (auto PDep : SDep.getSUnit()->Preds) { in getReadySuccessors() 91 auto PSU = PDep.getSUnit(); in getReadySuccessors() 180 if (S.getSUnit()->isBoundaryNode() || isScheduled(S.getSUnit()) || in bumpPredsPriority() 183 for (const auto &P : S.getSUnit()->Preds) { in bumpPredsPriority() 184 auto PSU = P.getSUnit(); in bumpPredsPriority() 196 if (!P.getSUnit()->isBoundaryNode() && !isScheduled(P.getSUnit()) && in bumpPredsPriority() 197 Set.insert(P.getSUnit()).second) in bumpPredsPriority() 198 Worklist.push_back(P.getSUnit()); in bumpPredsPriority() 215 auto SuccSU = S.getSUnit(); in releaseSuccessors()
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| H A D | AMDGPUExportClustering.cpp | 70 SUnit *PredSU = Pred.getSUnit(); in buildCluster() 86 SUnit *PredSU = Pred.getSUnit(); in removeExportDependencies() 95 SUnit *ExportPredSU = ExportPred.getSUnit(); in removeExportDependencies() 130 removeExportDependencies(DAG, *Succ.getSUnit()); in apply()
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| H A D | SIMachineScheduler.cpp | 435 SUnit *SuccSU = SuccEdge->getSUnit(); in undoReleaseSucc() 445 SUnit *SuccSU = SuccEdge->getSUnit(); in releaseSucc() 466 SUnit *SuccSU = Succ.getSUnit(); in releaseSuccessors() 647 if (PredDep.getSUnit() == &FromSU && in hasDataDependencyPred() 802 SUnit *Pred = PredDep.getSUnit(); in colorComputeReservedDependencies() 844 SUnit *Succ = SuccDep.getSUnit(); in colorComputeReservedDependencies() 926 SUnit *Succ = SuccDep.getSUnit(); in colorEndsAccordingToDependencies() 996 SUnit *Succ = SuccDep.getSUnit(); in colorMergeConstantLoadsNextGroup() 1017 SUnit *Succ = SuccDep.getSUnit(); in colorMergeIfPossibleNextGroup() 1214 SUnit *Pred = PredDep.getSUnit(); in createBlocksForVariant() [all …]
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| H A D | GCNILPSched.cpp | 66 SUnit *PredSU = Pred.getSUnit(); in CalcNodeSethiUllmanNumber() 110 unsigned Height = Succ.getSUnit()->getHeight(); in closestSucc() 277 auto PredSU = PredEdge.getSUnit(); in releasePredecessors()
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| H A D | AMDGPUIGroupLP.cpp | 419 for (auto &SP : S.getSUnit()->Preds) { in resetSchedBarrierEdges() 420 if (SP.getSUnit() == &SU) { in resetSchedBarrierEdges() 421 S.getSUnit()->removePred(SP); in resetSchedBarrierEdges()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHazardRecognizer.cpp | 150 S.getSUnit()->NumPredsLeft == 1) { in EmitInstruction() 151 UsesDotCur = S.getSUnit(); in EmitInstruction() 165 TII->mayBeNewStore(*S.getSUnit()->getInstr()) && in EmitInstruction() 166 Resources->canReserveResources(*S.getSUnit()->getInstr())) { in EmitInstruction() 167 PrefVectorStoreNew = S.getSUnit(); in EmitInstruction()
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| H A D | HexagonSubtarget.cpp | 289 MachineInstr &MI2 = *SI.getSUnit()->getInstr(); in apply() 296 for (SDep &PI : SI.getSUnit()->Preds) { in apply() 300 SI.getSUnit()->setDepthDirty(); in apply() 573 if (!I.isAssignedRegDep() || I.getSUnit() != Dst) in restoreLatency() 621 if (!I.isAssignedRegDep() || I.getSUnit() != Dst) in changeLatency() 638 !I.getSUnit()->getInstr()->isPseudo()) in getZeroLatency() 639 return I.getSUnit(); in getZeroLatency() 716 if (ExclSrc.count(I.getSUnit()) == 0 && in isBestZeroLatency() 718 changeLatency(I.getSUnit(), DstBest, 0); in isBestZeroLatency() 724 if (ExclDst.count(I.getSUnit()) == 0 && in isBestZeroLatency() [all …]
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| H A D | HexagonVLIWPacketizer.cpp | 937 if (Dep.getSUnit() == PacketSUDep && Dep.getKind() == SDep::Anti && in restrictingDepExistInPacket() 1005 if (Dep.getSUnit() == SU && Dep.getKind() == SDep::Data && in arePredicatesComplements() 1413 if (SUJ->Succs[i].getSUnit() != SUI) in isLegalToPacketizeTogether() 1921 if (Pred.getSUnit() == SUJ) in calcStall() 1932 if (Pred.getSUnit() == SUJ && Pred.getLatency() > 1) in calcStall()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGRRList.cpp | 234 Topo.AddPred(SU, D.getSUnit()); in AddPred() 242 Topo.RemovePred(SU, D.getSUnit()); in RemovePred() 1093 SUnit *SuccDep = D.getSUnit(); in TryUnfoldSU() 1104 SUnit *SuccDep = D.getSUnit(); in TryUnfoldSU() 1201 SUnit *SuccSU = Succ.getSUnit(); in CopyAndMoveSuccessors() 1240 SUnit *SuccSU = Succ.getSUnit(); in InsertCopiesAndMoveSuccs() 2106 SUnit *PredSU = Pred.getSUnit(); in HighRegPressure() 2155 SUnit *PredSU = Pred.getSUnit(); in RegPressureDiff() 2198 SUnit *PredSU = Pred.getSUnit(); in scheduledNode() 2280 SUnit *PredSU = Pred.getSUnit(); in unscheduledNode() [all …]
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| H A D | ResourcePriorityQueue.cpp | 73 SUnit *PredSU = Pred.getSUnit(); in numberRCValPredInSU() 111 SUnit *SuccSU = Succ.getSUnit(); in numberRCValSuccInSU() 212 SUnit &PredSU = *Pred.getSUnit(); in getSingleUnscheduledPred() 229 if (getSingleUnscheduledPred(Succ.getSUnit()) == SU) in push() 273 if (Succ.getSUnit() == SU) in isResourceAvailable() 498 if (Pred.isCtrl() || (Pred.getSUnit()->NumRegDefsLeft == 0)) in scheduledNode() 500 --Pred.getSUnit()->NumRegDefsLeft; in scheduledNode() 513 adjustPriorityOfUnscheduledPreds(Succ.getSUnit()); in scheduledNode()
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| H A D | ScheduleDAGFast.cpp | 136 SUnit *PredSU = PredEdge->getSUnit(); in ReleasePred() 167 LiveRegDefs[Pred.getReg()] = Pred.getSUnit(); in ReleasePredecessors() 190 if (LiveRegCycles[Succ.getReg()] == Succ.getSUnit()->getHeight()) { in ScheduleNodeBottomUp() 281 else if (Pred.getSUnit()->getNode() && in CopyAndMoveSuccessors() 282 Pred.getSUnit()->getNode()->isOperandOf(LoadNode)) in CopyAndMoveSuccessors() 294 if (ChainPred.getSUnit()) { in CopyAndMoveSuccessors() 313 SUnit *SuccDep = D.getSUnit(); in CopyAndMoveSuccessors() 321 SUnit *SuccDep = D.getSUnit(); in CopyAndMoveSuccessors() 358 SUnit *SuccSU = Succ.getSUnit(); in CopyAndMoveSuccessors() 394 SUnit *SuccSU = Succ.getSUnit(); in InsertCopiesAndMoveSuccs() [all …]
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| H A D | ScheduleDAGVLIW.cpp | 110 SUnit *SuccSU = D.getSUnit(); in releaseSucc()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCHazardRecognizers.cpp | 39 const MCInstrDesc *PredMCID = DAG->getInstrDesc(SU->Preds[i].getSUnit()); in isLoadAfterStore() 47 if (SU->Preds[i].getSUnit() == CurGroup[j]) in isLoadAfterStore() 65 const MCInstrDesc *PredMCID = DAG->getInstrDesc(SU->Preds[i].getSUnit()); in isBCTRAfterSet() 73 if (SU->Preds[i].getSUnit() == CurGroup[j]) in isBCTRAfterSet()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | ScheduleDAG.h | 152 SUnit *getSUnit() const; 433 if (Pred.getSUnit() == N) in isPred() 441 if (Succ.getSUnit() == N) in isSucc() 480 inline SUnit *SDep::getSUnit() const { return Dep.getPointer(); } in getSUnit() function 635 return Node->Preds[Operand].getSUnit();
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| H A D | ScheduleDAGInstrs.h | 286 SUnit *getSUnit(MachineInstr *MI) const; 390 inline SUnit *ScheduleDAGInstrs::getSUnit(MachineInstr *MI) const { in getSUnit() function
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| H A D | MachinePipeliner.h | 252 return Source->getInstr()->isPHI() || Dep.getSUnit()->getInstr()->isPHI(); in isBackedge() 339 auto SuccSUnit = Succ.getSUnit(); in NodeSet()
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