| /llvm-project-15.0.7/llvm/lib/MC/MCParser/ |
| H A D | MCTargetAsmParser.cpp | 22 MCSubtargetInfo &STICopy = getContext().getSubtargetCopy(getSTI()); in copySTI() 27 const MCSubtargetInfo &MCTargetAsmParser::getSTI() const { in getSTI() function in MCTargetAsmParser
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| H A D | AsmParser.cpp | 969 Out.initSections(false, getTargetParser().getSTI()); in Run() 1085 Out.initSections(false, getTargetParser().getSTI()); in checkForValidSection() 3180 const MCSubtargetInfo &STI = MCT.getSTI(); in parseDirectiveReloc() 3488 getStreamer().emitCodeAlignment(Alignment, &getTargetParser().getSTI(), in parseDirectiveAlign()
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| H A D | MasmParser.cpp | 1321 Out.initSections(false, getTargetParser().getSTI()); in Run() 1439 Out.initSections(false, getTargetParser().getSTI()); in checkForValidSection() 4725 getStreamer().emitCodeAlignment(Alignment, &getTargetParser().getSTI(), in emitAlignTo()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1409 return AMDGPU::isSI(getSTI()); in isSI() 1413 return AMDGPU::isCI(getSTI()); in isCI() 1417 return AMDGPU::isVI(getSTI()); in isVI() 1421 return AMDGPU::isGFX9(getSTI()); in isGFX9() 1426 return AMDGPU::isGFX90A(getSTI()); in isGFX90A() 1430 return AMDGPU::isGFX940(getSTI()); in isGFX940() 1438 return AMDGPU::isGFX10(getSTI()); in isGFX10() 1444 return AMDGPU::isGFX11(getSTI()); in isGFX11() 1493 return getSTI().getFeatureBits(); in getFeatureBits() 7939 getTargetStreamer().initializeTargetID(getSTI(), getSTI().getFeatureString()); in onBeginOfFile() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 73 bool isRV64() const { return getSTI().hasFeature(RISCV::Feature64Bit); } in isRV64() 74 bool isRV32E() const { return getSTI().hasFeature(RISCV::FeatureRV32E); } in isRV32E() 183 if (!(getSTI().getFeatureBits()[Feature])) { in setFeatureBits() 191 return getSTI().getFeatureBits()[Feature]; in getFeatureBits() 195 if (getSTI().getFeatureBits()[Feature]) { in clearFeatureBits() 205 FeatureBitStack.push_back(getSTI().getFeatureBits()); in pushFeatureBits() 248 !getSTI().getFeatureBits()[RISCV::FeatureStdExtF]) { in RISCVAsmParser() 253 !getSTI().getFeatureBits()[RISCV::FeatureStdExtD]) { in RISCVAsmParser() 1965 if (getSTI().getFeatureBits()[RISCV::FeatureRelax]) { in ParseInstruction() 2299 bool Res = compressInst(CInst, Inst, getSTI(), S.getContext()); in emitToStreamer() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/AsmParser/ |
| H A D | CSKYAsmParser.cpp | 685 FeatureBitset FBS = ComputeAvailableFeatures(getSTI().getFeatureBits()); in MatchAndEmitInstruction() 837 } else if (getSTI().getFeatureBits()[CSKY::HasE2] && in processLRW() 867 Out.emitInstruction(Inst, getSTI()); in processLRW() 888 Out.emitInstruction(Inst, getSTI()); in processJSRI() 909 Out.emitInstruction(Inst, getSTI()); in processJMPI() 1018 if (!matchRegisterNameHelper(getSTI(), (MCRegister &)RegNo, Name)) { in ParseRegister() 1037 if (matchRegisterNameHelper(getSTI(), (MCRegister &)RegNo, Name)) in parseRegister() 1611 if (matchRegisterNameHelper(getSTI(), (MCRegister &)RegNo, Name)) in tryParseRegister() 1749 Res = compressInst(CInst, Inst, getSTI(), S.getContext()); in emitToStreamer() 1752 S.emitInstruction((Res ? CInst : Inst), getSTI()); in emitToStreamer()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 484 if (!(getSTI().getFeatureBits()[Feature])) { in setFeatureBits() 493 if (getSTI().getFeatureBits()[Feature]) { in clearFeatureBits() 603 return getSTI().getFeatureBits()[Mips::FeatureFPXX]; in isABI_FPXX() 615 return getSTI().getFeatureBits()[Mips::FeatureMips1]; in hasMips1() 619 return getSTI().getFeatureBits()[Mips::FeatureMips2]; in hasMips2() 675 return getSTI().getFeatureBits()[Mips::FeatureDSP]; in hasDSP() 687 return getSTI().getFeatureBits()[Mips::FeatureMSA]; in hasMSA() 714 return getSTI().getFeatureBits()[Mips::FeatureMT]; in hasMT() 718 return getSTI().getFeatureBits()[Mips::FeatureCRC]; in hasCRC() 722 return getSTI().getFeatureBits()[Mips::FeatureVirt]; in hasVirt() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/LoongArch/AsmParser/ |
| H A D | LoongArchAsmParser.cpp | 374 Out.emitInstruction(Inst, getSTI()); in processInstruction() 465 FeatureBitset FBS = ComputeAvailableFeatures(getSTI().getFeatureBits()); in MatchAndEmitInstruction()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 1213 return getSTI().getFeatureBits()[X86::Is64Bit]; in is64BitMode() 1217 return getSTI().getFeatureBits()[X86::Is32Bit]; in is32BitMode() 1221 return getSTI().getFeatureBits()[X86::Is16Bit]; in is16BitMode() 3965 Out.emitInstruction(ShlInst, getSTI()); in applyLVICFIMitigation() 3966 Out.emitInstruction(FenceInst, getSTI()); in applyLVICFIMitigation() 4025 Out.emitInstruction(FenceInst, getSTI()); in applyLVILoadHardeningMitigation() 4035 Out.emitInstruction(Inst, getSTI()); in emitInstruction() 4038 getSTI().getFeatureBits()[X86::FeatureLVILoadHardening]) in emitInstruction() 4682 const MCSubtargetInfo& STI = getSTI(); in parseDirectiveNops() 4720 getStreamer().initSections(false, getSTI()); in parseDirectiveEven() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 160 setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits())); in HexagonAsmParser() 466 MCSubtargetInfo const &STI = getSTI(); in finishBundle() 510 if (getSTI().getFeatureBits()[Hexagon::FeatureMemNoShuf]) in matchBundleOptions() 807 if (!getSTI().getFeatureBits()[Hexagon::ArchV62]) in RegisterMatchesArch() 1323 if (!getSTI().getFeatureBits()[Hexagon::ArchV65]) { in processInstruction() 1490 getStreamer().emitCodeAlignment(byteSize, &getSTI(), byteSize); in processInstruction()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 303 Out.emitInstruction(ITInst, getSTI()); in flushPendingInstructions() 308 Out.emitInstruction(Inst, getSTI()); in flushPendingInstructions() 520 return getSTI().getFeatureBits()[ARM::ModeThumb]; in isThumb() 532 return getSTI().getFeatureBits()[ARM::HasV4TOps]; in hasThumb() 540 return getSTI().getFeatureBits()[ARM::HasV6Ops]; in hasV6Ops() 548 return getSTI().getFeatureBits()[ARM::HasV6MOps]; in hasV6MOps() 552 return getSTI().getFeatureBits()[ARM::HasV7Ops]; in hasV7Ops() 556 return getSTI().getFeatureBits()[ARM::HasV8Ops]; in hasV8Ops() 11013 Out.emitInstruction(Inst, getSTI()); in MatchAndEmitInstruction() 11471 if (!getSTI().isCPUStringValid(CPU)) in parseDirectiveCPU() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/AsmParser/ |
| H A D | SystemZAsmParser.cpp | 492 setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits())); in SystemZAsmParser() 1334 Parser.getStreamer().emitInstruction(Inst, getSTI()); in ParseDirectiveInsn() 1541 Out.emitInstruction(Inst, getSTI()); in MatchAndEmitInstruction() 1572 FeatureBitset FBS = ComputeAvailableFeatures(getSTI().getFeatureBits()); in MatchAndEmitInstruction()
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| /llvm-project-15.0.7/llvm/include/llvm/MC/MCParser/ |
| H A D | MCTargetAsmParser.h | 357 const MCSubtargetInfo &getSTI() const;
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 3060 getSTI().getFeatureBits()[AArch64::FeatureSVE]) { in parseCondCodeString() 3121 if (SVCR && SVCR->haveFeatures(getSTI().getFeatureBits())) in tryParseSVCR() 3386 else if (!IC->haveFeatures(getSTI().getFeatureBits())) { in parseSysAlias() 3396 else if (!DC->haveFeatures(getSTI().getFeatureBits())) { in parseSysAlias() 3406 else if (!AT->haveFeatures(getSTI().getFeatureBits())) { in parseSysAlias() 3416 else if (!TLBI->haveFeatures(getSTI().getFeatureBits())) { in parseSysAlias() 3426 else if (!PRCTX->haveFeatures(getSTI().getFeatureBits())) { in parseSysAlias() 3611 if (PState && PState->haveFeatures(getSTI().getFeatureBits())) in tryParseSysReg() 5807 Out.emitInstruction(Inst, getSTI()); in MatchAndEmitInstruction() 6287 if (!getSTI().isCPUStringValid(CPU)) { in parseDirectiveCPU() [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/AsmParser/ |
| H A D | PPCAsmParser.cpp | 1138 if (getSTI().getFeatureBits()[PPC::FeatureMFTB]) { in ProcessInstruction() 1161 Out.emitInstruction(Inst, getSTI()); in MatchAndEmitInstruction() 1166 FeatureBitset FBS = ComputeAvailableFeatures(getSTI().getFeatureBits()); in MatchAndEmitInstruction() 1559 if (getSTI().getFeatureBits()[PPC::FeatureBookE] && in ParseInstruction()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | AsmPrinterInlineAsm.cpp | 129 emitInlineAsmEnd(STI, &TAP->getSTI()); in emitInlineAsm()
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 115 return getSTI().getTargetTriple().getArch() == Triple::sparcv9; in is64Bit() 137 setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits())); in SparcAsmParser() 668 Out.emitInstruction(I, getSTI()); in MatchAndEmitInstruction()
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| /llvm-project-15.0.7/llvm/lib/Target/BPF/AsmParser/ |
| H A D | BPFAsmParser.cpp | 301 Out.emitInstruction(Inst, getSTI()); in MatchAndEmitInstruction()
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| /llvm-project-15.0.7/llvm/lib/Target/VE/AsmParser/ |
| H A D | VEAsmParser.cpp | 95 setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits())); in VEAsmParser() 773 Out.emitInstruction(Inst, getSTI()); in MatchAndEmitInstruction()
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/AsmParser/ |
| H A D | WebAssemblyAsmParser.cpp | 1022 Out.emitInstruction(Inst, getSTI()); in MatchAndEmitInstruction()
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