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Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4 |
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7070c6a9 |
| 02-May-2022 |
Ilya Leoshkevich <[email protected]> |
[SystemZ] Accept (. - 0x100000000) PCRel32 constants
Clang does not accept instructions like brasl %r0,.-0x100000000, because the second operand's right-hand-side (0x100000000) barely misses the acc
[SystemZ] Accept (. - 0x100000000) PCRel32 constants
Clang does not accept instructions like brasl %r0,.-0x100000000, because the second operand's right-hand-side (0x100000000) barely misses the acceptable range. However, since it's being subtracted, it makes sense to perform the range check on the negated value.
Reviewed By: uweigand
Differential Revision: https://reviews.llvm.org/D124780
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Revision tags: llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2 |
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06943537 |
| 09-Feb-2022 |
serge-sans-paille <[email protected]> |
Cleanup MCParser headers
As usual with that header cleanup series, some implicit dependencies now need to be explicit:
llvm/MC/MCParser/MCAsmParser.h no longer includes llvm/MC/MCParser/MCAsmLexer.
Cleanup MCParser headers
As usual with that header cleanup series, some implicit dependencies now need to be explicit:
llvm/MC/MCParser/MCAsmParser.h no longer includes llvm/MC/MCParser/MCAsmLexer.h
Preprocessed lines to build llvm on my setup: after: 1068185081 before: 1068324320
So no compile time benefit to expect, but we still get the looser coupling between files which is great.
Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup Differential Revision: https://reviews.llvm.org/D119359
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Revision tags: llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1 |
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1c3ef9ef |
| 05-Nov-2021 |
Jonas Paulsson <[email protected]> |
[SystemZ] Support symbolic displacements.
This patch adds support for symbolic displacements, e.g. like 'lg %r0, sym(%r1)', which is done using relocations. This is needed to compile the kernel with
[SystemZ] Support symbolic displacements.
This patch adds support for symbolic displacements, e.g. like 'lg %r0, sym(%r1)', which is done using relocations. This is needed to compile the kernel without disabling the integrated assembler.
Review: Ulrich Weigand
Differential Revision: https://reviews.llvm.org/D113341
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89b57061 |
| 08-Oct-2021 |
Reid Kleckner <[email protected]> |
Move TargetRegistry.(h|cpp) from Support to MC
This moves the registry higher in the LLVM library dependency stack. Every client of the target registry needs to link against MC anyway to actually us
Move TargetRegistry.(h|cpp) from Support to MC
This moves the registry higher in the LLVM library dependency stack. Every client of the target registry needs to link against MC anyway to actually use the target, so we might as well move this out of Support.
This allows us to ensure that Support doesn't have includes from MC/*.
Differential Revision: https://reviews.llvm.org/D111454
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9e4f1f92 |
| 28-Sep-2021 |
Kazu Hirata <[email protected]> |
[SystemZ] Remove redundant declaration SystemZMnemonicSpellCheck (NFC)
Note that SystemZMnemonicSpellCheck is defined in SystemZGenAsmMatcher.inc, which SystemZAsmParser.cpp includes.
Identified wi
[SystemZ] Remove redundant declaration SystemZMnemonicSpellCheck (NFC)
Note that SystemZMnemonicSpellCheck is defined in SystemZGenAsmMatcher.inc, which SystemZAsmParser.cpp includes.
Identified with readability-redundant-declaration.
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3 |
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1a5ab3e9 |
| 12-Sep-2021 |
Jonas Paulsson <[email protected]> |
[SystemZ] Recognize .machine directive in parser.
The .machine directive can be used in assembly files to specify the ISA for the instructions following it.
Review: Ulrich Weigand Differential Rev
[SystemZ] Recognize .machine directive in parser.
The .machine directive can be used in assembly files to specify the ISA for the instructions following it.
Review: Ulrich Weigand Differential Revision: https://reviews.llvm.org/D109660
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Revision tags: llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1 |
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f076da66 |
| 19-May-2021 |
Anirudh Prasad <[email protected]> |
[AsmParser][SystemZ][z/OS] Introducing HLASM Parser support to AsmParser - Part 1
- This patch (is one in a series of patches) which introduces HLASM Parser support (for the first parameter of inlin
[AsmParser][SystemZ][z/OS] Introducing HLASM Parser support to AsmParser - Part 1
- This patch (is one in a series of patches) which introduces HLASM Parser support (for the first parameter of inline asm statements) to LLVM ([[ https://lists.llvm.org/pipermail/llvm-dev/2021-January/147686.html | main RFC here ]]) - This patch in particular introduces HLASM Parser support for Z machine instructions. - The approach taken here was to subclass `AsmParser`, and make various functions and variables as "protected" wherever appropriate. - The `HLASMAsmParser` class overrides the `parseStatement` function. Two new private functions `parseAsHLASMLabel` and `parseAsMachineInstruction` are introduced as well.
The general syntax is laid out as follows (more information available in [[ https://www.ibm.com/support/knowledgecenter/SSENW6_1.6.0/com.ibm.hlasm.v1r6.asm/asmr1023.pdf | HLASM V1R6 Language Reference Manual ]] - Chapter 2 - Instruction Statement Format):
``` <TokA><spaces.*><TokB><spaces.*><TokC><spaces.*><TokD> ```
1. TokA is referred to as the Name Entry. This token is optional 2. TokB is referred to as the Operation Entry. This token is mandatory. 3. TokC is referred to as the Operand Entry. This token is mandatory 4. TokD is referred to as the Remarks Entry. This token is optional
- If TokA is provided, then we either parse TokA as a possible comment or as a label (Name Entry), Tok B as the Operation Entry and so on. - If TokA is not provided (i.e. we have one or more spaces and then the first token), then we will parse the first token (i.e TokB) as a possible Z machine instruction, TokC as the operands to the Z machine instruction and TokD as a possible Remark field - TokC (Operand Entry), no spaces are allowed between OperandEntries. If a space occurs it is classified as an error. - TokD if provided is taken as is, and emitted as a comment.
The following additional approach was examined, but not taken:
- Adding custom private only functions to base AsmParser class, and only invoking them for z/OS. While this would eliminate the need for another child class, these private functions would be of non-use to every other target. Similarly, adding any pure virtual functions to the base MCAsmParser class and overriding them in AsmParser would also have the same disadvantage.
Testing:
- This patch doesn't have tests added with it, for the sole reason that MCStreamer Support and Object File support hasn't been added for the z/OS target (yet). Hence, it's not possible generate code outright for the z/OS target. They are in the process of being committed / process of being worked on.
- Any comments / feedback on how to combat this "lack of testing" due to other missing required features is appreciated.
Reviewed By: Kai, uweigand
Differential Revision: https://reviews.llvm.org/D98276
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ca02fab7 |
| 03-May-2021 |
Anirudh Prasad <[email protected]> |
[AsmParser][SystemZ][z/OS] Implement HLASM location counter syntax ("*") for Z PC-relative instructions.
- This patch attempts to implement the location counter syntax (*) for the HLASM variant for
[AsmParser][SystemZ][z/OS] Implement HLASM location counter syntax ("*") for Z PC-relative instructions.
- This patch attempts to implement the location counter syntax (*) for the HLASM variant for PC-relative instructions. - In the HLASM variant, for purely constant relocatable values, we expect a * token preceding it, with special support for " *" which is parsed as "<pc-rel-insn 0>" - For combinations of absolute values and relocatable values, we don't expect the "*" preceding the token.
When you have a " * " what’s accepted is:
``` *<space>.*{.*} -> <pc-rel-insn> 0 *[+|-][constant-value] -> <pc-rel-insn> [+|-]constant-value ```
When you don’t have a " * " what’s accepted is:
``` brasl 1,func is allowed (MCSymbolRef type) brasl 1,func+4 is allowed (MCBinary type) brasl 1,4+func is allowed (MCBinary type) brasl 1,-4+func is allowed (MCBinary type) brasl 1,func-4 is allowed (MCBinary type) brasl 1,*func is not allowed (* cannot be used for non-MCConstantExprs) brasl 1,*+func is not allowed (* cannot be used for non-MCConstantExprs) brasl 1,*+func+4 is not allowed (* cannot be used for non-MCConstantExprs) brasl 1,*+4+func is not allowed (* cannot be used for non-MCConstantExprs) brasl 1,*-4+8+func is not allowed (* cannot be used for non-MCConstantExprs) ```
Reviewed By: Kai
Differential Revision: https://reviews.llvm.org/D100987
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3ed6a6f6 |
| 03-May-2021 |
Anirudh Prasad <[email protected]> |
[SystemZ][z/OS] Enforce prefix-less registers in SystemZAsmParser for the HLASM dialect.
- Previously, https://reviews.llvm.org/D101308 removed prefixes from register while printing them out. This w
[SystemZ][z/OS] Enforce prefix-less registers in SystemZAsmParser for the HLASM dialect.
- Previously, https://reviews.llvm.org/D101308 removed prefixes from register while printing them out. This was especially needed for inline asm statements which used input/output operands. - However, the backend SystemZAsmParser, accepts both prefixed registers and prefix-less registers as part of its implementation - This patch aims to change that by ensuring that prefixed registers are only allowed for the ATT dialect.
Reviewed By: uweigand
Differential Revision: https://reviews.llvm.org/D101665
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7da22dfc |
| 13-Apr-2021 |
Anirudh Prasad <[email protected]> |
[SystemZ][z/OS] Introduce dialect querying helper functions
- In the SystemZAsmParser, there will be a few queries to the type of dialect it is (AD_ATT, AD_HLASM) in future patches. - It would be ni
[SystemZ][z/OS] Introduce dialect querying helper functions
- In the SystemZAsmParser, there will be a few queries to the type of dialect it is (AD_ATT, AD_HLASM) in future patches. - It would be nice to have two small helper functions `isParsingATT()` and `isParsingHLASM()` - Putting this as a separate smaller patch allows us to remove its definitions from other dependent patches.
Reviewed By: uweigand, abhina.sreeskantharajan
Differential Revision: https://reviews.llvm.org/D99891
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Revision tags: llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3 |
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7a46d34a |
| 08-Mar-2021 |
Anirudh Prasad <[email protected]> |
[SystemZ][z/OS] Add support to validate a HLASM Label.
- This patch adds in support to determine whether a particular label is valid for the hlasm variant - The label syntax being checked is that
[SystemZ][z/OS] Add support to validate a HLASM Label.
- This patch adds in support to determine whether a particular label is valid for the hlasm variant - The label syntax being checked is that of an ordinary HLASM symbol (Reference, Chapter 2 (Coding and Structure) - Terms, Literals and Expressions - Terms - Symbols - Ordinary Symbol) - To achieve this, the virtual function isLabel defined in MCTargetAsmParser.h is made use of - The isLabel function is overridden in SystemZAsmParser for the hlasm variant, and the syntax is checked appropriately - Things remain unchanged for the att variant - Further patches will add in support to emit the label. These future patches will make use of this isLabel function
Reviewed By: uweigand, Kai
Differential Revision: https://reviews.llvm.org/D97748
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bcc1aba6 |
| 26-Feb-2021 |
Anirudh Prasad <[email protected]> |
[SystemZ] Introducing assembler dialects for the Z backend
- This patch introduces a different assembler dialect ("hlasm") for z/OS. The default dialect has now been given the "att" dialect name.
[SystemZ] Introducing assembler dialects for the Z backend
- This patch introduces a different assembler dialect ("hlasm") for z/OS. The default dialect has now been given the "att" dialect name. For this appropriate changes have been added to SystemZ.td. - This patch also makes a few changes to SystemZInstrFormats.td which restrict a few condition code mnemonics to just the "att" dialect variant (he, le, lh, nhe, nle, nlh). These extended condition code mnemonics are not available in HLASM. - A new private function has been introduced in SystemZAsmParser.cpp to return the assembler dialect set in SystemZMCAsmInfo.cpp. The reason we couldn't/haven't explicitly queried the overriden getAssemblerDialect function from AsmParser is outlined in this thread here. This returned dialect is directly passed onto the relevant matcher functions which taken in a variantID, so that the matcher functions can appropriately choose an instruction based on the variant.
Reviewed By: uweigand
Differential Revision: https://reviews.llvm.org/D94250
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Revision tags: llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1, llvmorg-11.0.1, llvmorg-11.0.1-rc2 |
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f03c21df |
| 02-Dec-2020 |
Anirudh Prasad <[email protected]> |
[SystemZ] Adding extra extended mnemonics for SystemZ target
This patch consists of the addition of some common additional extended mnemonics to the SystemZ target.
- These are jnop, jct, jctg, jas
[SystemZ] Adding extra extended mnemonics for SystemZ target
This patch consists of the addition of some common additional extended mnemonics to the SystemZ target.
- These are jnop, jct, jctg, jas, jasl, jxh, jxhg, jxle, jxleg, bru, brul, br*, br*l. - These mnemonics and the instructions they map to are defined here, Chapter 4 - Branching with extended mnemonic codes. - Except for jnop (which is a variant of brc 0, label), every other mnemonic is marked as a MnemonicAlias since there is already a "defined" instruction with the same encoding and/or condition mask values. - brc 0, label doesn't have a defined extended mnemonic, thus jnop is defined using as an InstAlias. Furthermore, the applyMnemonicAliases function is called in the overridden parseInstruction function in SystemZAsmParser.cpp to ensure any mnemonic aliases are applied before any further processing on the instruction is done.
Reviewed By: uweigand
Differential Revision: https://reviews.llvm.org/D92185
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Revision tags: llvmorg-11.0.1-rc1, llvmorg-11.0.0, llvmorg-11.0.0-rc6 |
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5588dbce |
| 06-Oct-2020 |
Jonas Paulsson <[email protected]> |
[SystemZAsmParser] Treat VR128 separately in ParseDirectiveInsn().
This patch makes the parser - reject higher vector registers (>=16) in operands where they should not be accepted. - accept
[SystemZAsmParser] Treat VR128 separately in ParseDirectiveInsn().
This patch makes the parser - reject higher vector registers (>=16) in operands where they should not be accepted. - accept higher integers (>=16) in vector register operands.
Review: Ulrich Weigand Differential Revision: https://reviews.llvm.org/D88888
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Revision tags: llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4 |
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34b61d6c |
| 25-Sep-2020 |
Jonas Paulsson <[email protected]> |
[SystemZ] Add support for .insn directives for vector instructions.
Support VRI, VRR, VRS, VRV, VRX, VSI instruction formats with the .insn directive.
Review: Ulrich Weigand Differential Revision:
[SystemZ] Add support for .insn directives for vector instructions.
Support VRI, VRR, VRS, VRV, VRX, VSI instruction formats with the .insn directive.
Review: Ulrich Weigand Differential Revision: https://reviews.llvm.org/D88357
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Revision tags: llvmorg-11.0.0-rc3, llvmorg-11.0.0-rc2, llvmorg-11.0.0-rc1, llvmorg-12-init |
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cca8578e |
| 08-Jul-2020 |
Ulrich Weigand <[email protected]> |
[SystemZ] Allow specifying integer registers as part of the address calculation
Revision e1de2773a534957305d7a559c6d88c4b5ac354e2 provided support for accepting integer registers in inline asm i.e.
[SystemZ] Allow specifying integer registers as part of the address calculation
Revision e1de2773a534957305d7a559c6d88c4b5ac354e2 provided support for accepting integer registers in inline asm i.e.
__asm("lhi %r0, 5") -> lhi %r0, 5 __asm("lhi 0, 5") -> lhi 0,5
This patch aims to extend this support to instructions which compute addresses as well. (i.e instructions of type BDMem and BD[X|R|V|L]Mem)
Author: anirudhp
Differential Revision: https://reviews.llvm.org/D83251
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Revision tags: llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2, llvmorg-10.0.1-rc1 |
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e1de2773 |
| 29-Apr-2020 |
Ulrich Weigand <[email protected]> |
[SystemZ] Allow specifying plain register numbers in AsmParser
For compatibility with other assemblers on the platform, allow using just plain integer register numbers in all places where a register
[SystemZ] Allow specifying plain register numbers in AsmParser
For compatibility with other assemblers on the platform, allow using just plain integer register numbers in all places where a register operand is expected.
Bug: llvm.org/PR45582
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6bfde063 |
| 29-Apr-2020 |
Ulrich Weigand <[email protected]> |
[SystemZ] Simplify register parsing in AsmParser
Remove redundant Group and Regs arguments from parseRegister and eliminate one of its overloaded versions.
Remove redundant Regs argument from parse
[SystemZ] Simplify register parsing in AsmParser
Remove redundant Group and Regs arguments from parseRegister and eliminate one of its overloaded versions.
Remove redundant Regs argument from parseAddress.
NFC intended.
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c726c920 |
| 31-Mar-2020 |
Ulrich Weigand <[email protected]> |
[SystemZ] Allow %r0 in address context for AsmParser
Registers used in any address (as well as in a few other contexts) have special semantics when a "zero" register is used, which is why the back-e
[SystemZ] Allow %r0 in address context for AsmParser
Registers used in any address (as well as in a few other contexts) have special semantics when a "zero" register is used, which is why the back-end defines extra register classes ADDR32, ADDR64 etc to be used to prevent the register allocator from using %r0 there.
However, when writing assembler code "by hand", you sometimes need to trigger that special semantics. However, currently the AsmParser will reject %r0 in those places. In some cases it may be possible to write that instruction differently - but in others it is currently not possible at all.
This check in AsmParser simply seems overly strict, so this patch just removes the check completely. This brings the behaviour of AsmParser in line with the GNU assembler as well.
Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=45092
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Revision tags: llvmorg-10.0.0, llvmorg-10.0.0-rc6, llvmorg-10.0.0-rc5, llvmorg-10.0.0-rc4, llvmorg-10.0.0-rc3 |
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6d2d589b |
| 15-Feb-2020 |
Fangrui Song <[email protected]> |
[MC] De-capitalize another set of MCStreamer::Emit* functions
Emit{ValueTo,Code}Alignment Emit{DTP,TP,GP}* EmitSymbolValue etc
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bcd24b2d |
| 14-Feb-2020 |
Fangrui Song <[email protected]> |
[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
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Revision tags: llvmorg-10.0.0-rc2 |
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8d5bf042 |
| 11-Feb-2020 |
Eric Astor <[email protected]> |
[ms] [llvm-ml] Add support for attempted register parsing
Summary: Add a new method (tryParseRegister) that attempts to parse a register specification.
MASM allows the use of IFDEF <register>, as w
[ms] [llvm-ml] Add support for attempted register parsing
Summary: Add a new method (tryParseRegister) that attempts to parse a register specification.
MASM allows the use of IFDEF <register>, as well as IFDEF <symbol>. To accommodate this, we make it possible to check whether a register specification can be parsed at the current location, without failing the entire parse if it can't.
Reviewers: thakis
Reviewed By: thakis
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73486
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Revision tags: llvmorg-10.0.0-rc1, llvmorg-11-init |
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0dbcb363 |
| 15-Jan-2020 |
Tom Stellard <[email protected]> |
CMake: Make most target symbols hidden by default
Summary: For builds with LLVM_BUILD_LLVM_DYLIB=ON and BUILD_SHARED_LIBS=OFF this change makes all symbols in the target specific libraries hidden by
CMake: Make most target symbols hidden by default
Summary: For builds with LLVM_BUILD_LLVM_DYLIB=ON and BUILD_SHARED_LIBS=OFF this change makes all symbols in the target specific libraries hidden by default.
A new macro called LLVM_EXTERNAL_VISIBILITY has been added to mark symbols in these libraries public, which is mainly needed for the definitions of the LLVMInitialize* functions.
This patch reduces the number of public symbols in libLLVM.so by about 25%. This should improve load times for the dynamic library and also make abi checker tools, like abidiff require less memory when analyzing libLLVM.so
One side-effect of this change is that for builds with LLVM_BUILD_LLVM_DYLIB=ON and LLVM_LINK_LLVM_DYLIB=ON some unittests that access symbols that are no longer public will need to be statically linked.
Before and after public symbol counts (using gcc 8.2.1, ld.bfd 2.31.1): nm before/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l 36221 nm after/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l 26278
Reviewers: chandlerc, beanz, mgorny, rnk, hans
Reviewed By: rnk, hans
Subscribers: merge_guards_bot, luismarques, smeenai, ldionne, lenary, s.egerton, pzheng, sameer.abuasal, MaskRay, wuzish, echristo, Jim, hiraditya, michaelplatings, chapuni, jholewinski, arsenm, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, javed.absar, sbc100, jgravelle-google, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, mgrang, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, kristina, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D54439
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Revision tags: llvmorg-9.0.1, llvmorg-9.0.1-rc3, llvmorg-9.0.1-rc2, llvmorg-9.0.1-rc1 |
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| #
580310ff |
| 02-Nov-2019 |
Jonas Paulsson <[email protected]> |
[SystemZ] Improve handling of huge PC relative immediate offsets.
Demand that an immediate offset to a PC relative address fits in 32 bits, or else load it into a register and perform a separate ad
[SystemZ] Improve handling of huge PC relative immediate offsets.
Demand that an immediate offset to a PC relative address fits in 32 bits, or else load it into a register and perform a separate add.
Verify in the assembler that such immediate offsets fit the bitwidth.
Even though the final address of a Load Address Relative Long may fit in 32 bits even with a >32 bit offset (depending on where the symbol lives relative to PC), the GNU toolchain demands the offset by itself to be in range. This patch adapts the same behavior for llvm.
Review: Ulrich Weigand https://reviews.llvm.org/D69749
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Revision tags: llvmorg-9.0.0, llvmorg-9.0.0-rc6, llvmorg-9.0.0-rc5, llvmorg-9.0.0-rc4, llvmorg-9.0.0-rc3 |
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0eaee545 |
| 15-Aug-2019 |
Jonas Devlieghere <[email protected]> |
[llvm] Migrate llvm::make_unique to std::make_unique
Now that we've moved to C++14, we no longer need the llvm::make_unique implementation from STLExtras.h. This patch is a mechanical replacement of
[llvm] Migrate llvm::make_unique to std::make_unique
Now that we've moved to C++14, we no longer need the llvm::make_unique implementation from STLExtras.h. This patch is a mechanical replacement of (hopefully) all the llvm::make_unique instances across the monorepo.
llvm-svn: 369013
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