| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetCallingConv.h | 153 Align getNonZeroByValAlign() const { in getNonZeroByValAlign() function
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | CallingConvLower.cpp | 45 Align Alignment = ArgFlags.getNonZeroByValAlign(); in HandleByVal()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 760 Align DstAlign = std::max(Flags.getNonZeroByValAlign(), in handleAssignments()
763 Align SrcAlign = std::max(Flags.getNonZeroByValAlign(), in handleAssignments()
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| /llvm-project-15.0.7/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 605 std::max(Align(StackSlotSize), ArgDI.Flags.getNonZeroByValAlign()); in LowerCallArguments()
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 1064 Out.Flags.getNonZeroByValAlign(), in LowerCall()
1070 Chain, DL, FINode, OutVal, SizeNode, Out.Flags.getNonZeroByValAlign(), in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 541 Align Alignment = Flags.getNonZeroByValAlign(); in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 641 Align Alignment = Flags.getNonZeroByValAlign(); in LowerCCCCallTo()
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| /llvm-project-15.0.7/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 868 Chain, dl, PtrOff, Arg, SizeNode, Flags.getNonZeroByValAlign(), in LowerCCCCallTo()
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| /llvm-project-15.0.7/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 1394 Align ParamByValAlign = Outs[OIdx].Flags.getNonZeroByValAlign(); in getPrototype()
1519 ArgAlign = Outs[OIdx].Flags.getNonZeroByValAlign(); in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 1392 std::max(Align(StackSlotSize), ArgDI->Flags.getNonZeroByValAlign()); in LowerCCCArguments()
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 219 Chain, DL, Dst, Src, SizeNode, Flags.getNonZeroByValAlign(), in CreateCopyOfByValArgument()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 179 Chain, dl, Dst, Src, SizeNode, Flags.getNonZeroByValAlign(), in CreateCopyOfByValArgument()
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 831 Align Alignment = Flags.getNonZeroByValAlign(); in LowerCall_32()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 3907 auto BVAlign = Flags.getNonZeroByValAlign(); in CalculateStackSlotAlignment()
5064 Flags.getNonZeroByValAlign(), false, false, false, in CreateCopyOfByValArgument()
6611 if (ArgFlags.getNonZeroByValAlign() > PtrAlign) in CC_AIX()
7082 if (Flags.getNonZeroByValAlign() > PtrByteSize) in LowerFormalArguments_AIX()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 4410 std::min(Flags.getNonZeroByValAlign(), Align(RegSizeInBytes)); in passByValArg()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 3220 ? Flags.getNonZeroByValAlign() in LowerCall()
3252 Outs[i].Flags.getNonZeroByValAlign(), in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 11205 Align Alignment = Flags.getNonZeroByValAlign(); in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 6809 Outs[i].Flags.getNonZeroByValAlign(), in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 2593 DAG.getConstant(Flags.getNonZeroByValAlign().value(), dl, MVT::i32); in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 3585 Chain, dl, Dst, Src, SizeNode, Flags.getNonZeroByValAlign(), in CreateCopyOfByValArgument()
4531 std::max(Align(16), Flags.getNonZeroByValAlign()), false); in LowerCall()
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