| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | MachineCombiner.cpp | 238 int UseIdx = InstrPtr->findRegisterUseOperandIdx(MO.getReg()); in getDepth()
248 InstrPtr, InstrPtr->findRegisterUseOperandIdx(MO.getReg())); in getDepth()
292 UseMO->findRegisterUseOperandIdx(MO.getReg())); in getLatency()
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| H A D | StackSlotColoring.cpp | 459 if (NextMI->findRegisterUseOperandIdx(LoadReg, true, nullptr) != -1) { in RemoveDeadStores()
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| H A D | FixupStatepointCallerSaved.cpp | 115 int Idx = RI->findRegisterUseOperandIdx(Reg, false, &TRI); in performCopyPropagation()
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| H A D | PeepholeOptimizer.cpp | 1527 unsigned Idx = MI.findRegisterUseOperandIdx(Reg); in findTargetRecurrence()
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| H A D | TwoAddressInstructionPass.cpp | 1331 unsigned NewSrcIdx = NewMIs[1]->findRegisterUseOperandIdx(regB); in tryInstructionTransform()
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| H A D | MachineInstr.cpp | 945 int MachineInstr::findRegisterUseOperandIdx( in findRegisterUseOperandIdx() function in MachineInstr
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| H A D | RegisterCoalescer.cpp | 736 int UIdx = ValSEndInst->findRegisterUseOperandIdx(IntB.reg(), true); in adjustCopiesBackFrom()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 1345 return findRegisterUseOperandIdx(Reg, false, TRI) != -1;
1366 return findRegisterUseOperandIdx(Reg, true, TRI) != -1;
1401 int findRegisterUseOperandIdx(Register Reg, bool isKill = false,
1408 int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI);
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | MVETPAndVPTOptimisationsPass.cpp | 675 if (Iter->findRegisterUseOperandIdx(Reg) != -1) { in MoveVPNOTBeforeFirstUser()
680 if (Iter->findRegisterUseOperandIdx(VPNOTResult) == -1) in MoveVPNOTBeforeFirstUser()
734 Iter->findRegisterUseOperandIdx(VCCRValue) != -1) { in ReduceOldVCCRValueUses()
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| H A D | ARMLowOverheadLoops.cpp | 94 return MI.findRegisterUseOperandIdx(ARM::VPR) != -1; in hasVPRUse()
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| H A D | ARMBaseInstrInfo.cpp | 4157 Idx = II->findRegisterUseOperandIdx(Reg, false, TRI); in getBundledUseMI()
5343 UseOp = MI.findRegisterUseOperandIdx(Reg, false, TRI); in getPartialRegUpdateClearance()
6072 int SPIdx = MI->findRegisterUseOperandIdx(ARM::SP); in checkAndUpdateStackOffset()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIPreEmitPeephole.cpp | 238 MI.removeOperand(MI.findRegisterUseOperandIdx(CondReg, false /*Kill*/, TRI)); in optimizeVccBranch()
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| H A D | SIOptimizeExecMaskingPreRA.cpp | 488 int Idx = SingleExecUser->findRegisterUseOperandIdx(SavedExec); in runOnMachineFunction()
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| H A D | SIWholeQuadMode.cpp | 1476 int Index = MI->findRegisterUseOperandIdx(AMDGPU::EXEC); in lowerCopyInstrs()
1479 Index = MI->findRegisterUseOperandIdx(AMDGPU::EXEC); in lowerCopyInstrs()
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| H A D | R600InstrInfo.cpp | 210 return MI.findRegisterUseOperandIdx(R600::AR_X, false, &RI) != -1; in usesAddressRegister()
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| H A D | SIInstrInfo.cpp | 7164 int SCCIdx = MI.findRegisterUseOperandIdx(AMDGPU::SCC, false, &RI); in addSCCDefUsersToVALUWorklist()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCPreEmitPeephole.cpp | 160 int KillIdx = AfterBBI->findRegisterUseOperandIdx(Reg, true, TRI); in removeRedundantLIs()
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| H A D | PPCInstrInfo.cpp | 3180 int UseOpIdx = MI.findRegisterUseOperandIdx(InUseReg, false, TRI); in replaceInstrOperandWithImm()
3421 EndMI->findRegisterUseOperandIdx(RegNo, false, &getRegisterInfo()); in fixupIsDeadOrKill()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZElimCompare.cpp | 650 int CCUse = MBBI->findRegisterUseOperandIdx(SystemZ::CC, false, TRI); in fuseCompareOperations()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.cpp | 701 ZeroOperandPosition = I->findRegisterUseOperandIdx(Mips::ZERO, false, TRI); in genInstrWithNewOpc()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 1532 int Idx = Instr.findRegisterUseOperandIdx(AArch64::NZCV); in findCondCodeUseOperandIdxForBranchOrSelect()
1547 int Idx = Instr.findRegisterUseOperandIdx(AArch64::NZCV); in findCondCodeUseOperandIdxForBranchOrSelect()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 4312 int Idx = UseMI.findRegisterUseOperandIdx(*SR, false, &HRI); in getOperandLatency()
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