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/llvm-project-15.0.7/clang/test/Sema/
H A Dtautological-unsigned-zero-compare.c239 if (dl == 0) in main()
241 if (dl != 0) in main()
243 if (dl < 0) in main()
245 if (dl <= 0) in main()
247 if (dl > 0) in main()
249 if (dl >= 0) in main()
252 if (0 == dl) in main()
254 if (0 != dl) in main()
256 if (0 < dl) in main()
258 if (0 <= dl) in main()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp567 const SDLoc &dl(Idx); in getIndexInWord32() local
1408 const SDLoc &dl(Op); in LowerHvxBuildVector() local
1449 const SDLoc &dl(Op); in LowerHvxSplatVector() local
1471 const SDLoc &dl(Op); in LowerHvxConcatVectors() local
1567 const SDLoc &dl(Op); in LowerHvxExtractElement() local
1578 const SDLoc &dl(Op); in LowerHvxInsertElement() local
1608 const SDLoc &dl(Op); in LowerHvxExtractSubvector() local
1625 const SDLoc &dl(Op); in LowerHvxInsertSubvector() local
1672 const SDLoc &dl(Op); in LowerHvxCttz() local
1845 VQ, DAG.getConstant(i, dl, MVT::i32), dl, MVT::i32, DAG); in LowerHvxBitcast()
[all …]
H A DHexagonISelLowering.cpp724 SDLoc dl(Op); in LowerREADCYCLECOUNTER() local
749 SDLoc dl(Op); in LowerDYNAMIC_STACKALLOC() local
1178 SDLoc dl(Op); in LowerRETURNADDR() local
1200 SDLoc dl(Op); in LowerFRAMEADDR() local
1212 SDLoc dl(Op); in LowerATOMIC_FENCE() local
1218 SDLoc dl(Op); in LowerGLOBALADDRESS() local
1253 SDLoc dl(Op); in LowerBlockAddress() local
1282 SDLoc dl(GA); in GetDynamicTLSAddr() local
1315 SDLoc dl(GA); in LowerToTLSInitialExecModel() local
1357 SDLoc dl(GA); in LowerToTLSLocalExecModel() local
[all …]
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp791 SDLoc dl(N); in tryBitfieldInsert() local
1334 SDLoc dl(N); in selectI64Imm() local
2053 getI32Imm(0, dl), getI32Imm(31, dl) }; in SelectAndParts32()
2113 getI32Imm(0, dl), getI32Imm(31, dl) }; in Select32()
2216 { ExtendToInt64(V, dl), getI32Imm(RLAmt, dl), in SelectRotMask64()
2224 { ExtendToInt64(V, dl), getI32Imm(RLAmt, dl), in SelectRotMask64()
2231 { ExtendToInt64(V, dl), getI32Imm(RLAmt, dl), in SelectRotMask64()
2238 { ExtendToInt64(V, dl), getI32Imm(RLAmt, dl), in SelectRotMask64()
2280 { ExtendToInt64(Base, dl), ExtendToInt64(V, dl), getI32Imm(RLAmt, dl), in SelectRotMaskIns64()
2288 { ExtendToInt64(Base, dl), ExtendToInt64(V, dl), getI32Imm(RLAmt, dl), in SelectRotMaskIns64()
[all …]
H A DPPCISelLowering.cpp2734 SDLoc dl(N); in SelectAddressRegImm() local
2842 SDLoc dl(N); in SelectAddressRegImm34() local
3302 SDLoc dl(GA); in LowerGlobalTLSAddressAIX() local
3332 SDLoc dl(GA); in LowerGlobalTLSAddressLinux() local
3509 SDLoc dl(Op); in LowerSETCC() local
3755 SDLoc dl(Op); in LowerINIT_TRAMPOLINE() local
8581 dl, in LowerINT_TO_FP()
9549 SDLoc dl(N); in lowerToVINSERTB() local
9655 SDLoc dl(N); in lowerToVINSERTH() local
10765 SDLoc dl(N); in LowerATOMIC_LOAD_STORE() local
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/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86SelectionDAGInfo.cpp104 Count = DAG.getIntPtrConstant(SizeVal, dl); in EmitTargetCodeForMemset()
113 Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, dl, AVT), in EmitTargetCodeForMemset()
118 Count = DAG.getIntPtrConstant(SizeVal, dl); in EmitTargetCodeForMemset()
133 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops); in EmitTargetCodeForMemset()
142 DAG.getMemset(Chain, dl, in EmitTargetCodeForMemset()
166 Chain = DAG.getCopyToReg(Chain, dl, DI, Dst, InFlag); in emitRepmovs()
173 return DAG.getNode(X86ISD::REP_MOVS, dl, Tys, Ops); in emitRepmovs()
231 emitRepmovs(Subtarget, DAG, dl, Chain, Dst, Src, in emitConstantSizeRepmov()
252 Chain, dl, in emitConstantSizeRepmov()
253 DAG.getNode(ISD::ADD, dl, DstVT, Dst, DAG.getConstant(Offset, dl, DstVT)), in emitConstantSizeRepmov()
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/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypesGeneric.cpp45 SDLoc dl(N); in ExpandRes_BITCAST() local
214 SDLoc dl(N); in ExpandRes_EXTRACT_VECTOR_ELT() local
252 SDLoc dl(N); in ExpandRes_NormalLoad() local
294 SDLoc dl(N); in ExpandRes_VAARG() local
335 SDLoc dl(N); in ExpandOp_BITCAST() local
377 SDLoc dl(N); in ExpandOp_BUILD_VECTOR() local
413 SDLoc dl(N); in ExpandOp_INSERT_VECTOR_ELT() local
446 SDLoc dl(N); in ExpandOp_SCALAR_TO_VECTOR() local
462 SDLoc dl(N); in ExpandOp_NormalStore() local
511 SDLoc dl(N); in SplitRes_Select() local
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H A DLegalizeIntegerTypes.cpp383 SDLoc dl(N); in PromoteIntRes_BITCAST() local
489 SDLoc dl(N); in PromoteIntRes_BSWAP() local
510 SDLoc dl(N); in PromoteIntRes_BITREVERSE() local
540 SDLoc dl(N); in PromoteIntRes_Constant() local
554 SDLoc dl(N); in PromoteIntRes_CTLZ() local
604 SDLoc dl(N); in PromoteIntRes_CTTZ() local
633 SDLoc dl(N); in PromoteIntRes_EXTRACT_VECTOR_ELT() local
660 SDLoc dl(N); in PromoteIntRes_FP_TO_XINT() local
714 SDLoc dl(N); in PromoteIntRes_FP_TO_XINT_SAT() local
721 SDLoc dl(N); in PromoteIntRes_FP_TO_FP16() local
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H A DTargetLowering.cpp562 SDLoc dl(Op); in ShrinkDemandedOp() local
1085 SDLoc dl(Op); in SimplifyDemandedBits() local
5773 SDLoc dl(N); in BuildSDIV() local
5921 SDLoc dl(N); in BuildUDIV() local
8010 ISD::AND, dl, VT, DAG.getNOT(dl, Op, VT), in expandCTTZ()
8024 SDLoc dl(N); in expandABS() local
8078 SDLoc dl(N); in expandBSWAP() local
8136 SDLoc dl(N); in expandBITREVERSE() local
8373 SDLoc dl(LD); in expandUnalignedLoad() local
8529 SDLoc dl(ST); in expandUnalignedStore() local
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H A DLegalizeDAG.cpp288 SDLoc dl(CFP); in ExpandConstantFP() local
344 SDLoc dl(CP); in ExpandConstant() local
438 SDLoc dl(ST); in OptimizeFloatStore() local
491 SDLoc dl(Node); in LegalizeStoreOps() local
669 SDLoc dl(Node); in LegalizeLoadOps() local
1356 SDLoc dl(Op); in ExpandExtractFromVectorThroughStack() local
1443 SDLoc dl(Op); in ExpandInsertToVectorThroughStack() local
1481 SDLoc dl(Node); in ExpandVectorBuildThroughStack() local
1693 SDLoc dl(Node); in ExpandDYNAMIC_STACKALLOC() local
1782 SDLoc dl(Node); in ExpandSCALAR_TO_VECTOR() local
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H A DLegalizeVectorTypes.cpp227 SDLoc dl(N); in ScalarizeVecRes_StrictFPOp() local
549 SDLoc dl(N); in ScalarizeVecRes_FP_TO_XINT_SAT() local
828 SDLoc dl(N); in ScalarizeVecOp_STORE() local
1186 SDLoc dl(N); in SplitVecRes_BinOp() local
1220 SDLoc dl(N); in SplitVecRes_TernaryOp() local
1251 SDLoc dl(N); in SplitVecRes_FIX() local
1267 SDLoc dl(N); in SplitVecRes_BITCAST() local
1324 SDLoc dl(N); in SplitVecRes_BUILD_VECTOR() local
1337 SDLoc dl(N); in SplitVecRes_CONCAT_VECTORS() local
1359 SDLoc dl(N); in SplitVecRes_EXTRACT_SUBVECTOR() local
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/llvm-project-15.0.7/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp250 SDLoc dl(GA); in getGlobalAddressWrapper() local
324 SDLoc dl(CP); in LowerConstantPool() local
347 SDLoc dl(Op); in LowerBR_JT() local
496 SDLoc dl(Op); in LowerSTORE() local
541 SDLoc dl(Op); in LowerSMUL_LOHI() local
558 SDLoc dl(Op); in LowerUMUL_LOHI() local
643 SDLoc dl(N); in TryExpandADDWithMul() local
700 SDLoc dl(N); in ExpandADDSUB() local
759 SDLoc dl(Op); in LowerVASTART() local
823 SDLoc dl(Op); in LowerEH_RETURN() local
[all …]
H A DXCoreFrameLowering.cpp107 BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(OpImm); in IfNeededExtSP()
110 EmitDefCfaOffset(MBB, MBBI, dl, TII, Adjusted*4); in IfNeededExtSP()
234 DebugLoc dl; in emitPrologue() local
269 EmitDefCfaOffset(MBB, MBBI, dl, TII, Adjusted*4); in emitPrologue()
271 EmitCfiOffset(MBB, MBBI, dl, TII, DRegNum, 0); in emitPrologue()
289 BuildMI(MBB, MBBI, dl, TII.get(Opcode)) in emitPrologue()
309 EmitDefCfaRegister(MBB, MBBI, dl, TII, MF, in emitPrologue()
321 EmitCfiOffset(MBB, Pos, dl, TII, DRegNum, Offset); in emitPrologue()
333 EmitCfiOffset(MBB, MBBI, dl, TII, in emitPrologue()
336 EmitCfiOffset(MBB, MBBI, dl, TII, in emitPrologue()
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H A DXCoreISelDAGToDAG.cpp49 inline SDValue getI32Imm(unsigned Imm, const SDLoc &dl) { in getI32Imm() argument
50 return CurDAG->getTargetConstant(Imm, dl, MVT::i32); in getI32Imm()
133 SDLoc dl(N); in Select() local
142 ReplaceNode(N, CurDAG->getMachineNode(XCore::MKMSK_rus, dl, in Select()
165 ReplaceNode(N, CurDAG->getMachineNode(XCore::LADD_l5r, dl, MVT::i32, in Select()
172 ReplaceNode(N, CurDAG->getMachineNode(XCore::LSUB_l5r, dl, MVT::i32, in Select()
179 ReplaceNode(N, CurDAG->getMachineNode(XCore::MACCU_l4r, dl, MVT::i32, in Select()
193 ReplaceNode(N, CurDAG->getMachineNode(XCore::LMUL_l6r, dl, MVT::i32, in Select()
199 ReplaceNode(N, CurDAG->getMachineNode(XCore::CRC8_l4r, dl, MVT::i32, in Select()
239 SDLoc dl(N); in tryBRIND() local
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H A DXCoreRegisterInfo.cpp66 DebugLoc dl = MI.getDebugLoc(); in InsertFPImmInst() local
76 BuildMI(MBB, II, dl, TII.get(XCore::STW_2rus)) in InsertFPImmInst()
99 DebugLoc dl = MI.getDebugLoc(); in InsertFPConstInst() local
106 BuildMI(MBB, II, dl, TII.get(XCore::LDW_3r), Reg) in InsertFPConstInst()
112 BuildMI(MBB, II, dl, TII.get(XCore::STW_l3r)) in InsertFPConstInst()
133 DebugLoc dl = MI.getDebugLoc(); in InsertSPImmInst() local
140 BuildMI(MBB, II, dl, TII.get(NewOpcode), Reg) in InsertSPImmInst()
146 BuildMI(MBB, II, dl, TII.get(NewOpcode)) in InsertSPImmInst()
153 BuildMI(MBB, II, dl, TII.get(NewOpcode), Reg) in InsertSPImmInst()
167 DebugLoc dl = MI.getDebugLoc(); in InsertSPConstInst() local
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/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.cpp106 Src = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src); in EmitSpecializedLibcall()
108 Src = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src); in EmitSpecializedLibcall()
129 CLI.setDebugLoc(dl) in EmitSpecializedLibcall()
180 DAG.getZExtOrTrunc(Size, dl, MVT::i32)); in EmitTargetCodeForMemcpy()
233 Dst = DAG.getNode(ARMISD::MEMCPY, dl, VTs, Chain, Dst, Src, in EmitTargetCodeForMemcpy()
234 DAG.getConstant(NumRegs, dl, MVT::i32)); in EmitTargetCodeForMemcpy()
260 Loads[i] = DAG.getLoad(VT, dl, Chain, in EmitTargetCodeForMemcpy()
269 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, in EmitTargetCodeForMemcpy()
277 TFOps[i] = DAG.getStore(Chain, dl, Loads[i], in EmitTargetCodeForMemcpy()
285 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, in EmitTargetCodeForMemcpy()
[all …]
H A DARMISelLowering.cpp3423 SDLoc dl(Op); in LowerConstantPool() local
3618 SDLoc dl(GA); in LowerToTLSGeneralDynamicModel() local
6195 SDLoc dl(N); in ExpandBITCAST() local
6415 SDLoc dl(N); in LowerCTTZ() local
6558 SDLoc dl(N); in LowerShift() local
6601 SDLoc dl(N); in Expand64BitShift() local
9434 SDLoc dl(N); in SkipExtensionForVMULL() local
10471 SDLoc dl(N); in ReplaceLongIntrinsic() local
12417 SDLoc dl(N); in AddCombineToVPADD() local
12457 SDLoc dl(N); in AddCombineVUZPToVPADDL() local
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H A DThumbRegisterInfo.cpp75 BuildMI(MBB, MBBI, dl, TII.get(ARM::tLDRpci)) in emitThumb1LoadConstPool()
94 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2LDRpci)) in emitThumb2LoadConstPool()
148 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg) in emitThumbRegPlusImmInReg()
153 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg) in emitThumbRegPlusImmInReg()
157 BuildMI(MBB, MBBI, dl, TII.get(ARM::tRSB), LdReg) in emitThumbRegPlusImmInReg()
162 BuildMI(MBB, MBBI, dl, TII.get(ARM::t2MOVi32imm), LdReg) in emitThumbRegPlusImmInReg()
300 emitThumbRegPlusImmInReg(MBB, MBBI, dl, in emitThumbRegPlusImmediate()
367 DebugLoc dl = MI.getDebugLoc(); in rewriteFrameIndex() local
406 BuildMI(MBB, II, dl, TII.get(ARM::tMOVr), DestReg) in rewriteFrameIndex()
474 DebugLoc dl = MI.getDebugLoc(); in eliminateFrameIndex() local
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/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp207 SDLoc dl(Op); in LowerSELECT_CC() local
218 SDLoc dl(Op); in LowerSIGN_EXTEND_INREG() local
230 SDValue SR = DAG.getNode(ISD::SRA, dl, MVT::i32, LS, in LowerSIGN_EXTEND_INREG()
241 SDLoc dl(Op); in LowerBR_CC() local
264 SDLoc &dl = CLI.DL; in LowerCall() local
396 DAG.getConstant(0, dl, PtrVT, true), Glue, dl); in LowerCall()
611 Chain, dl, FIN, ArgDI.SDV, DAG.getConstant(Size, dl, MVT::i32), in LowerCallArguments()
689 Chain, dl, OutVals[i], FIN, in LowerReturn()
756 SDLoc dl(Op); in LowerFRAMEADDR() local
767 SDLoc dl(GN); in LowerGlobalAddress() local
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/llvm-project-15.0.7/clang/test/CodeGen/
H A Dbuiltins-nvptx.c206 __device__ long dl; variable
219 __nvvm_atom_add_gen_l(&dl, l); in nvvm_atom()
226 __nvvm_atom_sub_gen_l(&dl, l); in nvvm_atom()
233 __nvvm_atom_and_gen_l(&dl, l); in nvvm_atom()
240 __nvvm_atom_or_gen_l(&dl, l); in nvvm_atom()
247 __nvvm_atom_xor_gen_l(&dl, l); in nvvm_atom()
254 __nvvm_atom_xchg_gen_l(&dl, l); in nvvm_atom()
263 __nvvm_atom_max_gen_l(&dl, l); in nvvm_atom()
276 __nvvm_atom_min_gen_l(&dl, l); in nvvm_atom()
289 __nvvm_atom_cas_gen_l(&dl, 0, l); in nvvm_atom()
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/llvm-project-15.0.7/llvm/test/Bindings/OCaml/
H A Dtarget.ml45 let dl = DL.of_string layout in
48 assert_equal (DL.as_string dl) layout;
49 assert_equal (DL.byte_order dl) Endian.Little;
50 assert_equal (DL.pointer_size dl) 4;
51 assert_equal (DL.intptr_type context dl) i32_type;
52 assert_equal (DL.qualified_pointer_size 0 dl) 4;
54 assert_equal (DL.size_in_bits sty dl) (Int64.of_int 96);
55 assert_equal (DL.store_size sty dl) (Int64.of_int 12);
56 assert_equal (DL.abi_size sty dl) (Int64.of_int 12);
57 assert_equal (DL.stack_align sty dl) 4;
[all …]
/llvm-project-15.0.7/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp923 DAG.getConstant(0, dl, PtrVT, true), InFlag, dl); in LowerCCCCallTo()
963 SDLoc dl(N); in LowerShifts() local
1024 SDLoc dl(Op); in LowerExternalSymbol() local
1034 SDLoc dl(Op); in LowerBlockAddress() local
1134 SDLoc dl (Op); in LowerBR_CC() local
1146 SDLoc dl (Op); in LowerSETCC() local
1225 SDLoc dl (Op); in LowerSELECT_CC() local
1239 SDLoc dl(Op); in LowerSIGN_EXTEND() local
1275 SDLoc dl(Op); in LowerRETURNADDR() local
1430 DebugLoc dl = MI.getDebugLoc(); in EmitShiftInstr() local
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp2444 SDLoc dl(Op); in LowerFP_TO_SINT() local
2473 SDLoc dl(Op); in LowerSINT_TO_FP() local
2501 SDLoc dl(Op); in LowerFP_TO_UINT() local
2522 SDLoc dl(Op); in LowerUINT_TO_FP() local
2546 SDLoc dl(Op); in LowerBR_CC() local
2583 SDLoc dl(Op); in LowerSELECT_CC() local
2663 SDLoc dl(Op); in LowerDYNAMIC_STACKALLOC() local
2721 SDLoc dl(Op); in getFLUSHW() local
2734 SDLoc dl(Op); in getFRAMEADDR() local
3197 SDLoc dl(N); in PerformBITCASTCombine() local
[all …]
H A DSparcISelDAGToDAG.cpp170 SDLoc dl(N); in tryInlineAsm() local
246 SDValue T0 = CurDAG->getCopyToReg(Sub0, dl, Reg0, Sub0, in tryInlineAsm()
261 SDValue T0 = CurDAG->getCopyFromReg(Chain, dl, Reg0, MVT::i32, in tryInlineAsm()
263 SDValue T1 = CurDAG->getCopyFromReg(Chain, dl, Reg1, MVT::i32, in tryInlineAsm()
267 TargetOpcode::REG_SEQUENCE, dl, MVT::v2i32, in tryInlineAsm()
269 CurDAG->getTargetConstant(SP::IntPairRegClassID, dl, in tryInlineAsm()
272 CurDAG->getTargetConstant(SP::sub_even, dl, MVT::i32), in tryInlineAsm()
274 CurDAG->getTargetConstant(SP::sub_odd, dl, MVT::i32), in tryInlineAsm()
282 Chain = CurDAG->getCopyToReg(T1, dl, GPVR, Pair, T1.getValue(1)); in tryInlineAsm()
299 Flag, dl, MVT::i32); in tryInlineAsm()
[all …]
H A DSparcFrameLowering.cpp47 DebugLoc dl; in emitSPAdjustment() local
52 BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6) in emitSPAdjustment()
64 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1) in emitSPAdjustment()
66 BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1) in emitSPAdjustment()
68 BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6) in emitSPAdjustment()
77 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1) in emitSPAdjustment()
79 BuildMI(MBB, MBBI, dl, TII.get(SP::XORri), SP::G1) in emitSPAdjustment()
81 BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6) in emitSPAdjustment()
99 DebugLoc dl; in emitPrologue() local
220 DebugLoc dl = MBBI->getDebugLoc(); in emitEpilogue() local
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