Lines Matching refs:dl
2136 SDValue ARMTargetLowering::MoveToHPR(const SDLoc &dl, SelectionDAG &DAG, in MoveToHPR() argument
2138 Val = DAG.getNode(ISD::BITCAST, dl, MVT::getIntegerVT(LocVT.getSizeInBits()), in MoveToHPR()
2141 Val = DAG.getNode(ARMISD::VMOVhr, dl, ValVT, Val); in MoveToHPR()
2143 Val = DAG.getNode(ISD::TRUNCATE, dl, in MoveToHPR()
2145 Val = DAG.getNode(ISD::BITCAST, dl, ValVT, Val); in MoveToHPR()
2150 SDValue ARMTargetLowering::MoveFromHPR(const SDLoc &dl, SelectionDAG &DAG, in MoveFromHPR() argument
2154 Val = DAG.getNode(ARMISD::VMOVrh, dl, in MoveFromHPR()
2157 Val = DAG.getNode(ISD::BITCAST, dl, in MoveFromHPR()
2159 Val = DAG.getNode(ISD::ZERO_EXTEND, dl, in MoveFromHPR()
2162 return DAG.getNode(ISD::BITCAST, dl, LocVT, Val); in MoveFromHPR()
2169 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult() argument
2195 SDValue Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, in LowerCallResult()
2200 SDValue Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, in LowerCallResult()
2206 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerCallResult()
2209 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerCallResult()
2210 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val, in LowerCallResult()
2211 DAG.getConstant(0, dl, MVT::i32)); in LowerCallResult()
2214 Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, InFlag); in LowerCallResult()
2218 Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, InFlag); in LowerCallResult()
2223 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerCallResult()
2224 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val, in LowerCallResult()
2225 DAG.getConstant(1, dl, MVT::i32)); in LowerCallResult()
2228 Val = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getLocVT(), in LowerCallResult()
2238 Val = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), Val); in LowerCallResult()
2247 Val = MoveToHPR(dl, DAG, VA.getLocVT(), VA.getValVT(), Val); in LowerCallResult()
2256 const SDLoc &dl, SelectionDAG &DAG, const CCValAssign &VA, SDValue StackPtr, in computeAddrForCallArg() argument
2272 SDValue PtrOff = DAG.getIntPtrConstant(Offset, dl); in computeAddrForCallArg()
2273 DstAddr = DAG.getNode(ISD::ADD, dl, getPointerTy(DAG.getDataLayout()), in computeAddrForCallArg()
2282 void ARMTargetLowering::PassF64ArgInRegs(const SDLoc &dl, SelectionDAG &DAG, in PassF64ArgInRegs() argument
2290 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl, in PassF64ArgInRegs()
2300 StackPtr = DAG.getCopyFromReg(Chain, dl, ARM::SP, in PassF64ArgInRegs()
2306 computeAddrForCallArg(dl, DAG, NextVA, StackPtr, IsTailCall, SPDiff); in PassF64ArgInRegs()
2308 DAG.getStore(Chain, dl, fmrrd.getValue(1 - id), DstAddr, DstInfo)); in PassF64ArgInRegs()
2324 SDLoc &dl = CLI.DL; in LowerCall() local
2440 Chain = DAG.getCALLSEQ_START(Chain, isTailCall ? 0 : NumBytes, 0, dl); in LowerCall()
2444 DAG.getCopyFromReg(Chain, dl, ARM::SP, getPointerTy(DAG.getDataLayout())); in LowerCall()
2471 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
2474 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
2477 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
2480 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
2494 Arg = MoveFromHPR(dl, DAG, VA.getLocVT(), VA.getValVT(), Arg); in LowerCall()
2503 DAG.getConstant(MaskValue, dl, MVT::getIntegerVT(LocBits)); in LowerCall()
2504 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::getIntegerVT(LocBits), Arg); in LowerCall()
2505 Arg = DAG.getNode(ISD::AND, dl, MVT::getIntegerVT(LocBits), Arg, Mask); in LowerCall()
2506 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
2512 SDValue Op0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerCall()
2513 DAG.getConstant(0, dl, MVT::i32)); in LowerCall()
2514 SDValue Op1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerCall()
2515 DAG.getConstant(1, dl, MVT::i32)); in LowerCall()
2517 PassF64ArgInRegs(dl, DAG, Chain, Op0, RegsToPass, VA, ArgLocs[++i], in LowerCall()
2522 PassF64ArgInRegs(dl, DAG, Chain, Op1, RegsToPass, VA, ArgLocs[++i], in LowerCall()
2529 computeAddrForCallArg(dl, DAG, VA, StackPtr, isTailCall, SPDiff); in LowerCall()
2530 MemOpChains.push_back(DAG.getStore(Chain, dl, Op1, DstAddr, DstInfo)); in LowerCall()
2533 PassF64ArgInRegs(dl, DAG, Chain, Arg, RegsToPass, VA, ArgLocs[++i], in LowerCall()
2566 SDValue Const = DAG.getConstant(4*i, dl, MVT::i32); in LowerCall()
2567 SDValue AddArg = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, Const); in LowerCall()
2569 DAG.getLoad(PtrVT, dl, Chain, AddArg, MachinePointerInfo(), in LowerCall()
2587 computeAddrForCallArg(dl, DAG, VA, StackPtr, isTailCall, SPDiff); in LowerCall()
2588 SDValue SrcOffset = DAG.getIntPtrConstant(4*offset, dl); in LowerCall()
2589 SDValue Src = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, SrcOffset); in LowerCall()
2590 SDValue SizeNode = DAG.getConstant(Flags.getByValSize() - 4*offset, dl, in LowerCall()
2593 DAG.getConstant(Flags.getNonZeroByValAlign().value(), dl, MVT::i32); in LowerCall()
2597 MemOpChains.push_back(DAG.getNode(ARMISD::COPY_STRUCT_BYVAL, dl, VTs, in LowerCall()
2605 computeAddrForCallArg(dl, DAG, VA, StackPtr, isTailCall, SPDiff); in LowerCall()
2607 SDValue Store = DAG.getStore(Chain, dl, Arg, DstAddr, DstInfo); in LowerCall()
2613 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains); in LowerCall()
2619 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
2655 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
2657 PtrVt, dl, DAG.getEntryNode(), CPAddr, in LowerCall()
2669 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
2671 PtrVt, dl, DAG.getEntryNode(), CPAddr, in LowerCall()
2685 ARMISD::WrapperPIC, dl, PtrVt, in LowerCall()
2686 DAG.getTargetGlobalAddress(GV, dl, PtrVt, 0, ARMII::MO_NONLAZY)); in LowerCall()
2688 PtrVt, dl, DAG.getEntryNode(), Callee, in LowerCall()
2700 Callee = DAG.getTargetGlobalAddress(GV, dl, PtrVt, /*offset=*/0, in LowerCall()
2704 DAG.getLoad(PtrVt, dl, DAG.getEntryNode(), in LowerCall()
2705 DAG.getNode(ARMISD::Wrapper, dl, PtrVt, Callee), in LowerCall()
2708 Callee = DAG.getTargetGlobalAddress(GV, dl, PtrVt, 0, 0); in LowerCall()
2721 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
2723 PtrVt, dl, DAG.getEntryNode(), CPAddr, in LowerCall()
2725 SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex, dl, MVT::i32); in LowerCall()
2726 Callee = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVt, Callee, PICLabel); in LowerCall()
2739 dl.getDebugLoc()); in LowerCall()
2746 dl.getDebugLoc()); in LowerCall()
2779 Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(0, dl, true), in LowerCall()
2780 DAG.getIntPtrConstant(0, dl, true), InFlag, dl); in LowerCall()
2789 Ops.push_back(DAG.getTargetConstant(SPDiff, dl, MVT::i32)); in LowerCall()
2823 SDValue Ret = DAG.getNode(ARMISD::TC_RETURN, dl, NodeTys, Ops); in LowerCall()
2829 Chain = DAG.getNode(CallOpc, dl, NodeTys, Ops); in LowerCall()
2841 Chain = DAG.getCALLSEQ_END(Chain, DAG.getIntPtrConstant(NumBytes, dl, true), in LowerCall()
2842 DAG.getIntPtrConstant(CalleePopBytes, dl, true), in LowerCall()
2843 InFlag, dl); in LowerCall()
2849 return LowerCallResult(Chain, InFlag, CallConv, isVarArg, Ins, dl, DAG, in LowerCall()
3141 const SDLoc &dl, SelectionDAG &DAG) const { in LowerReturn() argument
3210 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerReturn()
3218 Arg = MoveFromHPR(dl, DAG, VA.getLocVT(), VA.getValVT(), Arg); in LowerReturn()
3223 DAG.getConstant(MaskValue, dl, MVT::getIntegerVT(LocBits)); in LowerReturn()
3224 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::getIntegerVT(LocBits), Arg); in LowerReturn()
3225 Arg = DAG.getNode(ISD::AND, dl, MVT::getIntegerVT(LocBits), Arg, Mask); in LowerReturn()
3226 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerReturn()
3234 SDValue Half = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerReturn()
3235 DAG.getConstant(0, dl, MVT::i32)); in LowerReturn()
3236 SDValue HalfGPRs = DAG.getNode(ARMISD::VMOVRRD, dl, in LowerReturn()
3240 DAG.getCopyToReg(Chain, dl, VA.getLocReg(), in LowerReturn()
3246 DAG.getCopyToReg(Chain, dl, VA.getLocReg(), in LowerReturn()
3253 Arg = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerReturn()
3254 DAG.getConstant(1, dl, MVT::i32)); in LowerReturn()
3258 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl, in LowerReturn()
3260 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), in LowerReturn()
3265 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), in LowerReturn()
3268 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), Arg, Flag); in LowerReturn()
3305 return LowerInterruptReturn(RetOps, dl, DAG); in LowerReturn()
3310 return DAG.getNode(RetNode, dl, MVT::Other, RetOps); in LowerReturn()
3423 SDLoc dl(Op); in LowerConstantPool() local
3444 dl, PtrVT); in LowerConstantPool()
3453 return DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Res); in LowerConstantPool()
3618 SDLoc dl(GA); in LowerToTLSGeneralDynamicModel() local
3628 Argument = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Argument); in LowerToTLSGeneralDynamicModel()
3630 PtrVT, dl, DAG.getEntryNode(), Argument, in LowerToTLSGeneralDynamicModel()
3634 SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex, dl, MVT::i32); in LowerToTLSGeneralDynamicModel()
3635 Argument = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Argument, PICLabel); in LowerToTLSGeneralDynamicModel()
3646 CLI.setDebugLoc(dl).setChain(Chain).setLibCallee( in LowerToTLSGeneralDynamicModel()
3661 SDLoc dl(GA); in LowerToTLSExecModels() local
3666 SDValue ThreadPointer = DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT); in LowerToTLSExecModels()
3679 Offset = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Offset); in LowerToTLSExecModels()
3681 PtrVT, dl, Chain, Offset, in LowerToTLSExecModels()
3685 SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex, dl, MVT::i32); in LowerToTLSExecModels()
3686 Offset = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Offset, PICLabel); in LowerToTLSExecModels()
3689 PtrVT, dl, Chain, Offset, in LowerToTLSExecModels()
3697 Offset = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Offset); in LowerToTLSExecModels()
3699 PtrVT, dl, Chain, Offset, in LowerToTLSExecModels()
3705 return DAG.getNode(ISD::ADD, dl, PtrVT, ThreadPointer, Offset); in LowerToTLSExecModels()
3755 EVT PtrVT, const SDLoc &dl) { in promoteToConstantPool() argument
3846 return DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in promoteToConstantPool()
3874 SDLoc dl(Op); in LowerGlobalAddressELF() local
3881 if (SDValue V = promoteToConstantPool(this, GV, DAG, PtrVT, dl)) in LowerGlobalAddressELF()
3886 SDValue G = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, in LowerGlobalAddressELF()
3888 SDValue Result = DAG.getNode(ARMISD::WrapperPIC, dl, PtrVT, G); in LowerGlobalAddressELF()
3891 DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), Result, in LowerGlobalAddressELF()
3896 SDValue G = DAG.getTargetGlobalAddress(GV, dl, PtrVT); in LowerGlobalAddressELF()
3897 SDValue Result = DAG.getNode(ARMISD::WrapperPIC, dl, PtrVT, G); in LowerGlobalAddressELF()
3904 SDValue G = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, ARMII::MO_SBREL); in LowerGlobalAddressELF()
3905 RelAddr = DAG.getNode(ARMISD::Wrapper, dl, PtrVT, G); in LowerGlobalAddressELF()
3910 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerGlobalAddressELF()
3912 PtrVT, dl, DAG.getEntryNode(), CPAddr, in LowerGlobalAddressELF()
3915 SDValue SB = DAG.getCopyFromReg(DAG.getEntryNode(), dl, ARM::R9, PtrVT); in LowerGlobalAddressELF()
3916 SDValue Result = DAG.getNode(ISD::ADD, dl, PtrVT, SB, RelAddr); in LowerGlobalAddressELF()
3926 return DAG.getNode(ARMISD::Wrapper, dl, PtrVT, in LowerGlobalAddressELF()
3927 DAG.getTargetGlobalAddress(GV, dl, PtrVT)); in LowerGlobalAddressELF()
3930 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerGlobalAddressELF()
3932 PtrVT, dl, DAG.getEntryNode(), CPAddr, in LowerGlobalAddressELF()
3942 SDLoc dl(Op); in LowerGlobalAddressDarwin() local
3953 SDValue G = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, ARMII::MO_NONLAZY); in LowerGlobalAddressDarwin()
3954 SDValue Result = DAG.getNode(Wrapper, dl, PtrVT, G); in LowerGlobalAddressDarwin()
3957 Result = DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), Result, in LowerGlobalAddressDarwin()
3996 SDLoc dl(Op); in LowerEH_SJLJ_SETJMP() local
3997 SDValue Val = DAG.getConstant(0, dl, MVT::i32); in LowerEH_SJLJ_SETJMP()
3998 return DAG.getNode(ARMISD::EH_SJLJ_SETJMP, dl, in LowerEH_SJLJ_SETJMP()
4005 SDLoc dl(Op); in LowerEH_SJLJ_LONGJMP() local
4006 return DAG.getNode(ARMISD::EH_SJLJ_LONGJMP, dl, MVT::Other, Op.getOperand(0), in LowerEH_SJLJ_LONGJMP()
4007 Op.getOperand(1), DAG.getConstant(0, dl, MVT::i32)); in LowerEH_SJLJ_LONGJMP()
4012 SDLoc dl(Op); in LowerEH_SJLJ_SETUP_DISPATCH() local
4013 return DAG.getNode(ARMISD::EH_SJLJ_SETUP_DISPATCH, dl, MVT::Other, in LowerEH_SJLJ_SETUP_DISPATCH()
4029 SDLoc dl(Op); in LowerINTRINSIC_VOID() local
4039 DAG.getCopyFromReg(DAG.getEntryNode(), dl, Reg, PtrVT); in LowerINTRINSIC_VOID()
4047 ARM::tBL_PUSHLR, dl, ResultTys, in LowerINTRINSIC_VOID()
4048 {ReturnAddress, DAG.getTargetConstant(ARMCC::AL, dl, PtrVT), in LowerINTRINSIC_VOID()
4052 DAG.getMachineNode(ARM::BL_PUSHLR, dl, ResultTys, in LowerINTRINSIC_VOID()
4063 SDLoc dl(Op); in LowerINTRINSIC_WO_CHAIN() local
4068 return DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT); in LowerINTRINSIC_WO_CHAIN()
4074 DAG.getNode(ISD::SRA, dl, VTy, Operand, DAG.getConstant(31, dl, VTy)); in LowerINTRINSIC_WO_CHAIN()
4075 SDValue XOR = DAG.getNode(ISD::XOR, dl, VTy, SRA, Operand); in LowerINTRINSIC_WO_CHAIN()
4077 DAG.getNode(ISD::SHL, dl, VTy, XOR, DAG.getConstant(1, dl, VTy)); in LowerINTRINSIC_WO_CHAIN()
4079 DAG.getNode(ISD::OR, dl, VTy, SHL, DAG.getConstant(1, dl, VTy)); in LowerINTRINSIC_WO_CHAIN()
4080 SDValue Result = DAG.getNode(ISD::CTLZ, dl, VTy, OR); in LowerINTRINSIC_WO_CHAIN()
4089 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VTy, Operand, in LowerINTRINSIC_WO_CHAIN()
4090 DAG.getConstant(1, dl, VTy)); in LowerINTRINSIC_WO_CHAIN()
4091 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VTy, Operand, in LowerINTRINSIC_WO_CHAIN()
4092 DAG.getConstant(0, dl, VTy)); in LowerINTRINSIC_WO_CHAIN()
4093 SDValue Constant0 = DAG.getConstant(0, dl, VTy); in LowerINTRINSIC_WO_CHAIN()
4094 SDValue Constant1 = DAG.getConstant(1, dl, VTy); in LowerINTRINSIC_WO_CHAIN()
4095 SDValue Constant31 = DAG.getConstant(31, dl, VTy); in LowerINTRINSIC_WO_CHAIN()
4096 SDValue SRAHi = DAG.getNode(ISD::SRA, dl, VTy, Hi, Constant31); in LowerINTRINSIC_WO_CHAIN()
4097 SDValue XORHi = DAG.getNode(ISD::XOR, dl, VTy, SRAHi, Hi); in LowerINTRINSIC_WO_CHAIN()
4098 SDValue SHLHi = DAG.getNode(ISD::SHL, dl, VTy, XORHi, Constant1); in LowerINTRINSIC_WO_CHAIN()
4099 SDValue ORHi = DAG.getNode(ISD::OR, dl, VTy, SHLHi, Constant1); in LowerINTRINSIC_WO_CHAIN()
4100 SDValue CLSHi = DAG.getNode(ISD::CTLZ, dl, VTy, ORHi); in LowerINTRINSIC_WO_CHAIN()
4102 DAG.getSetCC(dl, MVT::i1, CLSHi, Constant31, ISD::CondCode::SETEQ); in LowerINTRINSIC_WO_CHAIN()
4104 DAG.getSetCC(dl, MVT::i1, Hi, Constant0, ISD::CondCode::SETEQ); in LowerINTRINSIC_WO_CHAIN()
4106 DAG.getSelect(dl, VTy, HiIsZero, Lo, DAG.getNOT(dl, Lo, VTy)); in LowerINTRINSIC_WO_CHAIN()
4107 SDValue CLZAdjustedLo = DAG.getNode(ISD::CTLZ, dl, VTy, AdjustedLo); in LowerINTRINSIC_WO_CHAIN()
4109 DAG.getSelect(dl, VTy, CheckLo, in LowerINTRINSIC_WO_CHAIN()
4110 DAG.getNode(ISD::ADD, dl, VTy, CLZAdjustedLo, Constant31), CLSHi); in LowerINTRINSIC_WO_CHAIN()
4125 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerINTRINSIC_WO_CHAIN()
4127 PtrVT, dl, DAG.getEntryNode(), CPAddr, in LowerINTRINSIC_WO_CHAIN()
4131 SDValue PICLabel = DAG.getConstant(ARMPCLabelIndex, dl, MVT::i32); in LowerINTRINSIC_WO_CHAIN()
4132 Result = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel); in LowerINTRINSIC_WO_CHAIN()
4200 SDLoc dl(Op); in LowerATOMIC_FENCE() local
4212 return DAG.getNode(ARMISD::MEMBARRIER_MCR, dl, MVT::Other, Op.getOperand(0), in LowerATOMIC_FENCE()
4213 DAG.getConstant(0, dl, MVT::i32)); in LowerATOMIC_FENCE()
4230 return DAG.getNode(ISD::INTRINSIC_VOID, dl, MVT::Other, Op.getOperand(0), in LowerATOMIC_FENCE()
4231 DAG.getConstant(Intrinsic::arm_dmb, dl, MVT::i32), in LowerATOMIC_FENCE()
4232 DAG.getConstant(Domain, dl, MVT::i32)); in LowerATOMIC_FENCE()
4243 SDLoc dl(Op); in LowerPREFETCH() local
4257 return DAG.getNode(ARMISD::PRELOAD, dl, MVT::Other, Op.getOperand(0), in LowerPREFETCH()
4258 Op.getOperand(1), DAG.getConstant(isRead, dl, MVT::i32), in LowerPREFETCH()
4259 DAG.getConstant(isData, dl, MVT::i32)); in LowerPREFETCH()
4268 SDLoc dl(Op); in LowerVASTART() local
4272 return DAG.getStore(Op.getOperand(0), dl, FR, Op.getOperand(1), in LowerVASTART()
4280 const SDLoc &dl) const { in GetF64FormalArgument()
4292 SDValue ArgValue = DAG.getCopyFromReg(Root, dl, Reg, MVT::i32); in GetF64FormalArgument()
4302 MVT::i32, dl, Root, FIN, in GetF64FormalArgument()
4306 ArgValue2 = DAG.getCopyFromReg(Root, dl, Reg, MVT::i32); in GetF64FormalArgument()
4310 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, ArgValue, ArgValue2); in GetF64FormalArgument()
4322 const SDLoc &dl, SDValue &Chain, in StoreByValRegs() argument
4362 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32); in StoreByValRegs()
4363 SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, in StoreByValRegs()
4366 FIN = DAG.getNode(ISD::ADD, dl, PtrVT, FIN, DAG.getConstant(4, dl, PtrVT)); in StoreByValRegs()
4370 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps); in StoreByValRegs()
4376 const SDLoc &dl, SDValue &Chain, in VarArgStyleRegisters() argument
4388 int FrameIndex = StoreByValRegs(CCInfo, DAG, dl, Chain, nullptr, in VarArgStyleRegisters()
4433 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments() argument
4507 GetF64FormalArgument(VA, ArgLocs[++i], Chain, DAG, dl); in LowerFormalArguments()
4514 MVT::f64, dl, Chain, FIN, in LowerFormalArguments()
4517 ArgValue2 = GetF64FormalArgument(VA, ArgLocs[++i], Chain, DAG, dl); in LowerFormalArguments()
4519 ArgValue = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerFormalArguments()
4520 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, ArgValue, in LowerFormalArguments()
4521 ArgValue1, DAG.getIntPtrConstant(0, dl)); in LowerFormalArguments()
4522 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, ArgValue, in LowerFormalArguments()
4523 ArgValue2, DAG.getIntPtrConstant(1, dl)); in LowerFormalArguments()
4525 ArgValue = GetF64FormalArgument(VA, ArgLocs[++i], Chain, DAG, dl); in LowerFormalArguments()
4547 ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); in LowerFormalArguments()
4563 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
4566 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerFormalArguments()
4568 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
4571 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerFormalArguments()
4573 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
4582 ArgValue = MoveToHPR(dl, DAG, VA.getLocVT(), VA.getValVT(), ArgValue); in LowerFormalArguments()
4608 CCInfo, DAG, dl, Chain, &*CurOrigArg, CurByValIndex, in LowerFormalArguments()
4619 InVals.push_back(DAG.getLoad(VA.getValVT(), dl, Chain, FIN, in LowerFormalArguments()
4630 VarArgStyleRegisters(CCInfo, DAG, dl, Chain, CCInfo.getNextStackOffset(), in LowerFormalArguments()
4635 "secure entry function must not be variadic", dl.getDebugLoc()); in LowerFormalArguments()
4655 "secure entry function requires arguments on stack", dl.getDebugLoc()); in LowerFormalArguments()
4690 const SDLoc &dl) const { in getARMCmp()
4701 RHS = DAG.getConstant(C - 1, dl, MVT::i32); in getARMCmp()
4708 RHS = DAG.getConstant(C - 1, dl, MVT::i32); in getARMCmp()
4715 RHS = DAG.getConstant(C + 1, dl, MVT::i32); in getARMCmp()
4722 RHS = DAG.getConstant(C + 1, dl, MVT::i32); in getARMCmp()
4766 SDValue ShiftAmt = DAG.getConstant(ShiftBits, dl, MVT::i32); in getARMCmp()
4767 LHS = DAG.getNode(ISD::SHL, dl, MVT::i32, LHS.getOperand(0), ShiftAmt); in getARMCmp()
4768 RHS = DAG.getConstant(RHSV << ShiftBits, dl, MVT::i32); in getARMCmp()
4786 SDValue Shift = DAG.getNode(ARMISD::LSLS, dl, in getARMCmp()
4789 DAG.getConstant(ShiftAmt, dl, MVT::i32)); in getARMCmp()
4790 SDValue Chain = DAG.getCopyToReg(DAG.getEntryNode(), dl, ARM::CPSR, in getARMCmp()
4792 ARMcc = DAG.getConstant(ARMCC::HI, dl, MVT::i32); in getARMCmp()
4824 ARMcc = DAG.getConstant(CondCode, dl, MVT::i32); in getARMCmp()
4825 return DAG.getNode(CompareType, dl, MVT::Glue, LHS, RHS); in getARMCmp()
4830 SelectionDAG &DAG, const SDLoc &dl, in getVFPCmp() argument
4836 dl, MVT::Glue, LHS, RHS); in getVFPCmp()
4839 dl, MVT::Glue, LHS); in getVFPCmp()
4840 return DAG.getNode(ARMISD::FMSTAT, dl, MVT::Glue, Cmp); in getVFPCmp()
4876 SDLoc dl(Op); in getARMXALUOOp() local
4887 ARMcc = DAG.getConstant(ARMCC::VC, dl, MVT::i32); in getARMXALUOOp()
4888 Value = DAG.getNode(ISD::ADD, dl, Op.getValueType(), LHS, RHS); in getARMXALUOOp()
4889 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, Value, LHS); in getARMXALUOOp()
4892 ARMcc = DAG.getConstant(ARMCC::HS, dl, MVT::i32); in getARMXALUOOp()
4895 Value = DAG.getNode(ARMISD::ADDC, dl, in getARMXALUOOp()
4898 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, Value, LHS); in getARMXALUOOp()
4901 ARMcc = DAG.getConstant(ARMCC::VC, dl, MVT::i32); in getARMXALUOOp()
4902 Value = DAG.getNode(ISD::SUB, dl, Op.getValueType(), LHS, RHS); in getARMXALUOOp()
4903 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, LHS, RHS); in getARMXALUOOp()
4906 ARMcc = DAG.getConstant(ARMCC::HS, dl, MVT::i32); in getARMXALUOOp()
4907 Value = DAG.getNode(ISD::SUB, dl, Op.getValueType(), LHS, RHS); in getARMXALUOOp()
4908 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, LHS, RHS); in getARMXALUOOp()
4912 ARMcc = DAG.getConstant(ARMCC::EQ, dl, MVT::i32); in getARMXALUOOp()
4913 Value = DAG.getNode(ISD::UMUL_LOHI, dl, in getARMXALUOOp()
4916 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, Value.getValue(1), in getARMXALUOOp()
4917 DAG.getConstant(0, dl, MVT::i32)); in getARMXALUOOp()
4923 ARMcc = DAG.getConstant(ARMCC::EQ, dl, MVT::i32); in getARMXALUOOp()
4924 Value = DAG.getNode(ISD::SMUL_LOHI, dl, in getARMXALUOOp()
4927 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, Value.getValue(1), in getARMXALUOOp()
4928 DAG.getNode(ISD::SRA, dl, Op.getValueType(), in getARMXALUOOp()
4930 DAG.getConstant(31, dl, MVT::i32))); in getARMXALUOOp()
4948 SDLoc dl(Op); in LowerSignedALUO() local
4950 SDValue TVal = DAG.getConstant(1, dl, MVT::i32); in LowerSignedALUO()
4951 SDValue FVal = DAG.getConstant(0, dl, MVT::i32); in LowerSignedALUO()
4954 SDValue Overflow = DAG.getNode(ARMISD::CMOV, dl, VT, TVal, FVal, in LowerSignedALUO()
4958 return DAG.getNode(ISD::MERGE_VALUES, dl, VTs, Value, Overflow); in LowerSignedALUO()
4993 SDLoc dl(Op); in LowerUnsignedALUO() local
5003 Value = DAG.getNode(ARMISD::ADDC, dl, VTs, LHS, RHS); in LowerUnsignedALUO()
5008 Value = DAG.getNode(ARMISD::SUBC, dl, VTs, LHS, RHS); in LowerUnsignedALUO()
5013 Overflow = DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerUnsignedALUO()
5014 DAG.getConstant(1, dl, MVT::i32), Overflow); in LowerUnsignedALUO()
5019 return DAG.getNode(ISD::MERGE_VALUES, dl, VTs, Value, Overflow); in LowerUnsignedALUO()
5068 SDLoc dl(Op); in LowerADDSUBSAT() local
5070 DAG.getNode(NewOpcode, dl, MVT::i32, in LowerADDSUBSAT()
5071 DAG.getSExtOrTrunc(Op->getOperand(0), dl, MVT::i32), in LowerADDSUBSAT()
5072 DAG.getSExtOrTrunc(Op->getOperand(1), dl, MVT::i32)); in LowerADDSUBSAT()
5073 return DAG.getNode(ISD::TRUNCATE, dl, VT, Add); in LowerADDSUBSAT()
5080 SDLoc dl(Op); in LowerSELECT() local
5095 return getCMOV(dl, VT, SelectTrue, SelectFalse, ARMcc, CCR, in LowerSELECT()
5130 return getCMOV(dl, VT, True, False, ARMcc, CCR, Cmp, DAG); in LowerSELECT()
5137 Cond = DAG.getNode(ISD::AND, dl, Cond.getValueType(), Cond, in LowerSELECT()
5138 DAG.getConstant(1, dl, Cond.getValueType())); in LowerSELECT()
5140 return DAG.getSelectCC(dl, Cond, in LowerSELECT()
5141 DAG.getConstant(0, dl, Cond.getValueType()), in LowerSELECT()
5195 SDValue ARMTargetLowering::getCMOV(const SDLoc &dl, EVT VT, SDValue FalseVal, in getCMOV() argument
5199 FalseVal = DAG.getNode(ARMISD::VMOVRRD, dl, in getCMOV()
5201 TrueVal = DAG.getNode(ARMISD::VMOVRRD, dl, in getCMOV()
5209 SDValue Low = DAG.getNode(ARMISD::CMOV, dl, MVT::i32, FalseLow, TrueLow, in getCMOV()
5211 SDValue High = DAG.getNode(ARMISD::CMOV, dl, MVT::i32, FalseHigh, TrueHigh, in getCMOV()
5214 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Low, High); in getCMOV()
5216 return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, ARMcc, CCR, in getCMOV()
5308 SDLoc dl(Op); in LowerSaturatingConditional() local
5310 return DAG.getNode(ARMISD::SSAT, dl, VT, V2Tmp, in LowerSaturatingConditional()
5311 DAG.getConstant(countTrailingOnes(K), dl, VT)); in LowerSaturatingConditional()
5313 return DAG.getNode(ARMISD::USAT, dl, VT, V2Tmp, in LowerSaturatingConditional()
5314 DAG.getConstant(countTrailingOnes(K), dl, VT)); in LowerSaturatingConditional()
5373 SDLoc dl(Op); in LowerSELECT_CC() local
5390 SDValue ShiftV = DAG.getNode(ISD::SRA, dl, VT, SatValue, in LowerSELECT_CC()
5391 DAG.getConstant(31, dl, VT)); in LowerSELECT_CC()
5393 SDValue NotShiftV = DAG.getNode(ISD::XOR, dl, VT, ShiftV, in LowerSELECT_CC()
5394 DAG.getAllOnesConstant(dl, VT)); in LowerSELECT_CC()
5395 return DAG.getNode(ISD::AND, dl, VT, SatValue, NotShiftV); in LowerSELECT_CC()
5397 return DAG.getNode(ISD::OR, dl, VT, SatValue, ShiftV); in LowerSELECT_CC()
5450 SDValue Cmp = getARMCmp(LHS, RHS, CC, ARMcc, DAG, dl); in LowerSELECT_CC()
5452 return DAG.getNode(Opcode, dl, VT, TrueVal, FalseVal, ARMcc, Cmp); in LowerSELECT_CC()
5458 DAG, LHS.getValueType(), LHS, RHS, CC, dl, LHS, RHS); in LowerSELECT_CC()
5463 RHS = DAG.getConstant(0, dl, LHS.getValueType()); in LowerSELECT_CC()
5492 SDValue Cmp = getARMCmp(LHS, RHS, CC, ARMcc, DAG, dl); in LowerSELECT_CC()
5495 ARMcc = DAG.getConstant(ARMCC::GE, dl, MVT::i32); in LowerSELECT_CC()
5496 return getCMOV(dl, VT, FalseVal, TrueVal, ARMcc, CCR, Cmp, DAG); in LowerSELECT_CC()
5524 SDValue ARMcc = DAG.getConstant(CondCode, dl, MVT::i32); in LowerSELECT_CC()
5525 SDValue Cmp = getVFPCmp(LHS, RHS, DAG, dl); in LowerSELECT_CC()
5527 SDValue Result = getCMOV(dl, VT, FalseVal, TrueVal, ARMcc, CCR, Cmp, DAG); in LowerSELECT_CC()
5529 SDValue ARMcc2 = DAG.getConstant(CondCode2, dl, MVT::i32); in LowerSELECT_CC()
5531 SDValue Cmp2 = getVFPCmp(LHS, RHS, DAG, dl); in LowerSELECT_CC()
5532 Result = getCMOV(dl, VT, Result, TrueVal, ARMcc2, CCR, Cmp2, DAG); in LowerSELECT_CC()
5574 SDLoc dl(Op); in expandf64Toi32() local
5577 RetVal1 = DAG.getConstant(0, dl, MVT::i32); in expandf64Toi32()
5578 RetVal2 = DAG.getConstant(0, dl, MVT::i32); in expandf64Toi32()
5585 DAG.getLoad(MVT::i32, dl, Ld->getChain(), Ptr, Ld->getPointerInfo(), in expandf64Toi32()
5589 SDValue NewPtr = DAG.getNode(ISD::ADD, dl, in expandf64Toi32()
5590 PtrType, Ptr, DAG.getConstant(4, dl, PtrType)); in expandf64Toi32()
5591 RetVal2 = DAG.getLoad(MVT::i32, dl, Ld->getChain(), NewPtr, in expandf64Toi32()
5610 SDLoc dl(Op); in OptimizeVFPBrcond() local
5625 SDValue Mask = DAG.getConstant(0x7fffffff, dl, MVT::i32); in OptimizeVFPBrcond()
5628 LHS = DAG.getNode(ISD::AND, dl, MVT::i32, in OptimizeVFPBrcond()
5630 RHS = DAG.getNode(ISD::AND, dl, MVT::i32, in OptimizeVFPBrcond()
5632 SDValue Cmp = getARMCmp(LHS, RHS, CC, ARMcc, DAG, dl); in OptimizeVFPBrcond()
5634 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in OptimizeVFPBrcond()
5642 LHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, LHS2, Mask); in OptimizeVFPBrcond()
5643 RHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, RHS2, Mask); in OptimizeVFPBrcond()
5645 ARMcc = DAG.getConstant(CondCode, dl, MVT::i32); in OptimizeVFPBrcond()
5648 return DAG.getNode(ARMISD::BCC_i64, dl, VTList, Ops); in OptimizeVFPBrcond()
5658 SDLoc dl(Op); in LowerBRCOND() local
5684 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, CCR, in LowerBRCOND()
5697 SDLoc dl(Op); in LowerBR_CC() local
5701 DAG, LHS.getValueType(), LHS, RHS, CC, dl, LHS, RHS); in LowerBR_CC()
5706 RHS = DAG.getConstant(0, dl, LHS.getValueType()); in LowerBR_CC()
5738 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, CCR, in LowerBR_CC()
5744 SDValue Cmp = getARMCmp(LHS, RHS, CC, ARMcc, DAG, dl); in LowerBR_CC()
5746 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in LowerBR_CC()
5760 SDValue ARMcc = DAG.getConstant(CondCode, dl, MVT::i32); in LowerBR_CC()
5761 SDValue Cmp = getVFPCmp(LHS, RHS, DAG, dl); in LowerBR_CC()
5765 SDValue Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
5767 ARMcc = DAG.getConstant(CondCode2, dl, MVT::i32); in LowerBR_CC()
5769 Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
5778 SDLoc dl(Op); in LowerBR_JT() local
5783 Table = DAG.getNode(ARMISD::WrapperJT, dl, MVT::i32, JTI); in LowerBR_JT()
5784 Index = DAG.getNode(ISD::MUL, dl, PTy, Index, DAG.getConstant(4, dl, PTy)); in LowerBR_JT()
5785 SDValue Addr = DAG.getNode(ISD::ADD, dl, PTy, Table, Index); in LowerBR_JT()
5791 return DAG.getNode(ARMISD::BR2_JT, dl, MVT::Other, Chain, in LowerBR_JT()
5796 DAG.getLoad((EVT)MVT::i32, dl, Chain, Addr, in LowerBR_JT()
5799 Addr = DAG.getNode(ISD::ADD, dl, PTy, Table, Addr); in LowerBR_JT()
5800 return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI); in LowerBR_JT()
5803 DAG.getLoad(PTy, dl, Chain, Addr, in LowerBR_JT()
5806 return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI); in LowerBR_JT()
5812 SDLoc dl(Op); in LowerVectorFP_TO_INT() local
5836 Op = DAG.getNode(Op.getOpcode(), dl, NewTy, Op.getOperand(0)); in LowerVectorFP_TO_INT()
5837 return DAG.getNode(ISD::TRUNCATE, dl, VT, Op); in LowerVectorFP_TO_INT()
5918 SDLoc dl(Op); in LowerVectorINT_TO_FP() local
5956 Op = DAG.getNode(CastOpc, dl, DestVecType, Op.getOperand(0)); in LowerVectorINT_TO_FP()
5957 return DAG.getNode(Opc, dl, VT, Op); in LowerVectorINT_TO_FP()
5984 SDLoc dl(Op); in LowerFCOPYSIGN() local
5994 SDValue Mask = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v2i32, in LowerFCOPYSIGN()
5995 DAG.getTargetConstant(EncodedVal, dl, MVT::i32)); in LowerFCOPYSIGN()
5998 Mask = DAG.getNode(ARMISD::VSHLIMM, dl, OpVT, in LowerFCOPYSIGN()
5999 DAG.getNode(ISD::BITCAST, dl, OpVT, Mask), in LowerFCOPYSIGN()
6000 DAG.getConstant(32, dl, MVT::i32)); in LowerFCOPYSIGN()
6002 Tmp0 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp0); in LowerFCOPYSIGN()
6004 Tmp1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp1); in LowerFCOPYSIGN()
6006 Tmp1 = DAG.getNode(ARMISD::VSHLIMM, dl, OpVT, in LowerFCOPYSIGN()
6007 DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1), in LowerFCOPYSIGN()
6008 DAG.getConstant(32, dl, MVT::i32)); in LowerFCOPYSIGN()
6010 Tmp1 = DAG.getNode(ARMISD::VSHRuIMM, dl, MVT::v1i64, in LowerFCOPYSIGN()
6011 DAG.getNode(ISD::BITCAST, dl, MVT::v1i64, Tmp1), in LowerFCOPYSIGN()
6012 DAG.getConstant(32, dl, MVT::i32)); in LowerFCOPYSIGN()
6013 Tmp0 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp0); in LowerFCOPYSIGN()
6014 Tmp1 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1); in LowerFCOPYSIGN()
6017 dl, MVT::i32); in LowerFCOPYSIGN()
6018 AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v8i8, AllOnes); in LowerFCOPYSIGN()
6019 SDValue MaskNot = DAG.getNode(ISD::XOR, dl, OpVT, Mask, in LowerFCOPYSIGN()
6020 DAG.getNode(ISD::BITCAST, dl, OpVT, AllOnes)); in LowerFCOPYSIGN()
6022 SDValue Res = DAG.getNode(ISD::OR, dl, OpVT, in LowerFCOPYSIGN()
6023 DAG.getNode(ISD::AND, dl, OpVT, Tmp1, Mask), in LowerFCOPYSIGN()
6024 DAG.getNode(ISD::AND, dl, OpVT, Tmp0, MaskNot)); in LowerFCOPYSIGN()
6026 Res = DAG.getNode(ISD::BITCAST, dl, MVT::v2f32, Res); in LowerFCOPYSIGN()
6027 Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, Res, in LowerFCOPYSIGN()
6028 DAG.getConstant(0, dl, MVT::i32)); in LowerFCOPYSIGN()
6030 Res = DAG.getNode(ISD::BITCAST, dl, MVT::f64, Res); in LowerFCOPYSIGN()
6038 Tmp1 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
6040 Tmp1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp1); in LowerFCOPYSIGN()
6043 SDValue Mask1 = DAG.getConstant(0x80000000, dl, MVT::i32); in LowerFCOPYSIGN()
6044 SDValue Mask2 = DAG.getConstant(0x7fffffff, dl, MVT::i32); in LowerFCOPYSIGN()
6045 Tmp1 = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp1, Mask1); in LowerFCOPYSIGN()
6047 Tmp0 = DAG.getNode(ISD::AND, dl, MVT::i32, in LowerFCOPYSIGN()
6048 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); in LowerFCOPYSIGN()
6049 return DAG.getNode(ISD::BITCAST, dl, MVT::f32, in LowerFCOPYSIGN()
6050 DAG.getNode(ISD::OR, dl, MVT::i32, Tmp0, Tmp1)); in LowerFCOPYSIGN()
6054 Tmp0 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
6057 SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2); in LowerFCOPYSIGN()
6058 Hi = DAG.getNode(ISD::OR, dl, MVT::i32, Hi, Tmp1); in LowerFCOPYSIGN()
6059 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerFCOPYSIGN()
6071 SDLoc dl(Op); in LowerRETURNADDR() local
6075 SDValue Offset = DAG.getConstant(4, dl, MVT::i32); in LowerRETURNADDR()
6076 return DAG.getLoad(VT, dl, DAG.getEntryNode(), in LowerRETURNADDR()
6077 DAG.getNode(ISD::ADD, dl, VT, FrameAddr, Offset), in LowerRETURNADDR()
6083 return DAG.getCopyFromReg(DAG.getEntryNode(), dl, Reg, VT); in LowerRETURNADDR()
6094 SDLoc dl(Op); // FIXME probably not meaningful in LowerFRAMEADDR() local
6097 SDValue FrameAddr = DAG.getCopyFromReg(DAG.getEntryNode(), dl, FrameReg, VT); in LowerFRAMEADDR()
6099 FrameAddr = DAG.getLoad(VT, dl, DAG.getEntryNode(), FrameAddr, in LowerFRAMEADDR()
6177 SDLoc dl(Op); in CombineVMOVDRRCandidateWithVecOp() local
6182 SDValue BitCast = DAG.getNode(ISD::BITCAST, dl, VecVT, ExtractSrc); in CombineVMOVDRRCandidateWithVecOp()
6183 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DstVT, BitCast, in CombineVMOVDRRCandidateWithVecOp()
6184 DAG.getConstant(NewIndex.getZExtValue(), dl, MVT::i32)); in CombineVMOVDRRCandidateWithVecOp()
6195 SDLoc dl(N); in ExpandBITCAST() local
6224 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, in ExpandBITCAST()
6225 DAG.getConstant(0, dl, MVT::i32)); in ExpandBITCAST()
6226 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, in ExpandBITCAST()
6227 DAG.getConstant(1, dl, MVT::i32)); in ExpandBITCAST()
6228 return DAG.getNode(ISD::BITCAST, dl, DstVT, in ExpandBITCAST()
6229 DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi)); in ExpandBITCAST()
6237 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
6239 DAG.getNode(ARMISD::VREV64, dl, SrcVT, Op)); in ExpandBITCAST()
6241 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
6244 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1)); in ExpandBITCAST()
6256 static SDValue getZeroVector(EVT VT, SelectionDAG &DAG, const SDLoc &dl) { in getZeroVector() argument
6259 SDValue EncodedVal = DAG.getTargetConstant(0, dl, MVT::i32); in getZeroVector()
6261 SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, EncodedVal); in getZeroVector()
6262 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in getZeroVector()
6272 SDLoc dl(Op); in LowerShiftRightParts() local
6282 SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerShiftRightParts()
6283 DAG.getConstant(VTBits, dl, MVT::i32), ShAmt); in LowerShiftRightParts()
6284 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts()
6285 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftRightParts()
6286 DAG.getConstant(VTBits, dl, MVT::i32)); in LowerShiftRightParts()
6287 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt); in LowerShiftRightParts()
6288 SDValue LoSmallShift = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftRightParts()
6289 SDValue LoBigShift = DAG.getNode(Opc, dl, VT, ShOpHi, ExtraShAmt); in LowerShiftRightParts()
6290 SDValue CmpLo = getARMCmp(ExtraShAmt, DAG.getConstant(0, dl, MVT::i32), in LowerShiftRightParts()
6291 ISD::SETGE, ARMcc, DAG, dl); in LowerShiftRightParts()
6292 SDValue Lo = DAG.getNode(ARMISD::CMOV, dl, VT, LoSmallShift, LoBigShift, in LowerShiftRightParts()
6295 SDValue HiSmallShift = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts()
6297 ? DAG.getNode(Opc, dl, VT, ShOpHi, in LowerShiftRightParts()
6298 DAG.getConstant(VTBits - 1, dl, VT)) in LowerShiftRightParts()
6299 : DAG.getConstant(0, dl, VT); in LowerShiftRightParts()
6300 SDValue CmpHi = getARMCmp(ExtraShAmt, DAG.getConstant(0, dl, MVT::i32), in LowerShiftRightParts()
6301 ISD::SETGE, ARMcc, DAG, dl); in LowerShiftRightParts()
6302 SDValue Hi = DAG.getNode(ARMISD::CMOV, dl, VT, HiSmallShift, HiBigShift, in LowerShiftRightParts()
6306 return DAG.getMergeValues(Ops, dl); in LowerShiftRightParts()
6316 SDLoc dl(Op); in LowerShiftLeftParts() local
6324 SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerShiftLeftParts()
6325 DAG.getConstant(VTBits, dl, MVT::i32), ShAmt); in LowerShiftLeftParts()
6326 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, RevShAmt); in LowerShiftLeftParts()
6327 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts()
6328 SDValue HiSmallShift = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftLeftParts()
6330 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftLeftParts()
6331 DAG.getConstant(VTBits, dl, MVT::i32)); in LowerShiftLeftParts()
6332 SDValue HiBigShift = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ExtraShAmt); in LowerShiftLeftParts()
6333 SDValue CmpHi = getARMCmp(ExtraShAmt, DAG.getConstant(0, dl, MVT::i32), in LowerShiftLeftParts()
6334 ISD::SETGE, ARMcc, DAG, dl); in LowerShiftLeftParts()
6335 SDValue Hi = DAG.getNode(ARMISD::CMOV, dl, VT, HiSmallShift, HiBigShift, in LowerShiftLeftParts()
6338 SDValue CmpLo = getARMCmp(ExtraShAmt, DAG.getConstant(0, dl, MVT::i32), in LowerShiftLeftParts()
6339 ISD::SETGE, ARMcc, DAG, dl); in LowerShiftLeftParts()
6340 SDValue LoSmallShift = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); in LowerShiftLeftParts()
6341 SDValue Lo = DAG.getNode(ARMISD::CMOV, dl, VT, LoSmallShift, in LowerShiftLeftParts()
6342 DAG.getConstant(0, dl, VT), ARMcc, CCR, CmpLo); in LowerShiftLeftParts()
6345 return DAG.getMergeValues(Ops, dl); in LowerShiftLeftParts()
6354 SDLoc dl(Op); in LowerFLT_ROUNDS_() local
6357 DAG.getConstant(Intrinsic::arm_get_fpscr, dl, MVT::i32)}; in LowerFLT_ROUNDS_()
6360 DAG.getNode(ISD::INTRINSIC_W_CHAIN, dl, {MVT::i32, MVT::Other}, Ops); in LowerFLT_ROUNDS_()
6362 SDValue FltRounds = DAG.getNode(ISD::ADD, dl, MVT::i32, FPSCR, in LowerFLT_ROUNDS_()
6363 DAG.getConstant(1U << 22, dl, MVT::i32)); in LowerFLT_ROUNDS_()
6364 SDValue RMODE = DAG.getNode(ISD::SRL, dl, MVT::i32, FltRounds, in LowerFLT_ROUNDS_()
6365 DAG.getConstant(22, dl, MVT::i32)); in LowerFLT_ROUNDS_()
6366 SDValue And = DAG.getNode(ISD::AND, dl, MVT::i32, RMODE, in LowerFLT_ROUNDS_()
6367 DAG.getConstant(3, dl, MVT::i32)); in LowerFLT_ROUNDS_()
6368 return DAG.getMergeValues({And, Chain}, dl); in LowerFLT_ROUNDS_()
6415 SDLoc dl(N); in LowerCTTZ() local
6421 SDValue NX = DAG.getNode(ISD::SUB, dl, VT, getZeroVector(VT, DAG, dl), X); in LowerCTTZ()
6422 SDValue LSB = DAG.getNode(ISD::AND, dl, VT, X, NX); in LowerCTTZ()
6428 SDValue One = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
6429 DAG.getTargetConstant(1, dl, ElemTy)); in LowerCTTZ()
6430 SDValue Bits = DAG.getNode(ISD::SUB, dl, VT, LSB, One); in LowerCTTZ()
6431 return DAG.getNode(ISD::CTPOP, dl, VT, Bits); in LowerCTTZ()
6439 DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
6440 DAG.getTargetConstant(NumBits - 1, dl, ElemTy)); in LowerCTTZ()
6441 SDValue CTLZ = DAG.getNode(ISD::CTLZ, dl, VT, LSB); in LowerCTTZ()
6442 return DAG.getNode(ISD::SUB, dl, VT, WidthMinus1, CTLZ); in LowerCTTZ()
6451 SDValue FF = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
6452 DAG.getTargetConstant(0x1eff, dl, MVT::i32)); in LowerCTTZ()
6453 Bits = DAG.getNode(ISD::ADD, dl, VT, LSB, FF); in LowerCTTZ()
6455 SDValue One = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
6456 DAG.getTargetConstant(1, dl, ElemTy)); in LowerCTTZ()
6457 Bits = DAG.getNode(ISD::SUB, dl, VT, LSB, One); in LowerCTTZ()
6459 return DAG.getNode(ISD::CTPOP, dl, VT, Bits); in LowerCTTZ()
6465 SDValue rbit = DAG.getNode(ISD::BITREVERSE, dl, VT, N->getOperand(0)); in LowerCTTZ()
6466 return DAG.getNode(ISD::CTLZ, dl, VT, rbit); in LowerCTTZ()
6558 SDLoc dl(N); in LowerShift() local
6572 return DAG.getNode(ARMISD::VSHLIMM, dl, VT, N->getOperand(0), in LowerShift()
6573 DAG.getConstant(Cnt, dl, MVT::i32)); in LowerShift()
6574 return DAG.getNode(ARMISD::VSHLu, dl, VT, N->getOperand(0), in LowerShift()
6584 return DAG.getNode(VShiftOpc, dl, VT, N->getOperand(0), in LowerShift()
6585 DAG.getConstant(Cnt, dl, MVT::i32)); in LowerShift()
6592 ISD::SUB, dl, ShiftVT, getZeroVector(ShiftVT, DAG, dl), N->getOperand(1)); in LowerShift()
6595 return DAG.getNode(VShiftOpc, dl, VT, N->getOperand(0), NegatedCount); in LowerShift()
6601 SDLoc dl(N); in Expand64BitShift() local
6625 ShAmt = DAG.getZExtOrTrunc(ShAmt, dl, MVT::i32); in Expand64BitShift()
6631 ShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, in Expand64BitShift()
6632 DAG.getConstant(0, dl, MVT::i32), ShAmt); in Expand64BitShift()
6640 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift()
6641 DAG.getConstant(0, dl, MVT::i32)); in Expand64BitShift()
6643 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift()
6644 DAG.getConstant(1, dl, MVT::i32)); in Expand64BitShift()
6647 Lo = DAG.getNode(ShPartsOpc, dl, DAG.getVTList(MVT::i32, MVT::i32), Lo, Hi, in Expand64BitShift()
6651 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in Expand64BitShift()
6663 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift()
6664 DAG.getConstant(0, dl, MVT::i32)); in Expand64BitShift()
6665 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift()
6666 DAG.getConstant(1, dl, MVT::i32)); in Expand64BitShift()
6671 Hi = DAG.getNode(Opc, dl, DAG.getVTList(MVT::i32, MVT::Glue), Hi); in Expand64BitShift()
6674 Lo = DAG.getNode(ARMISD::RRX, dl, MVT::i32, Lo, Hi.getValue(1)); in Expand64BitShift()
6677 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in Expand64BitShift()
6691 SDLoc dl(Op); in LowerVSETCC() local
6717 SDValue CastOp0 = DAG.getNode(ISD::BITCAST, dl, SplitVT, Op0); in LowerVSETCC()
6718 SDValue CastOp1 = DAG.getNode(ISD::BITCAST, dl, SplitVT, Op1); in LowerVSETCC()
6719 SDValue Cmp = DAG.getNode(ISD::SETCC, dl, SplitVT, CastOp0, CastOp1, in LowerVSETCC()
6721 SDValue Reversed = DAG.getNode(ARMISD::VREV64, dl, SplitVT, Cmp); in LowerVSETCC()
6722 SDValue Merged = DAG.getNode(ISD::AND, dl, SplitVT, Cmp, Reversed); in LowerVSETCC()
6723 Merged = DAG.getNode(ISD::BITCAST, dl, CmpVT, Merged); in LowerVSETCC()
6725 Merged = DAG.getNOT(dl, Merged, CmpVT); in LowerVSETCC()
6726 Merged = DAG.getSExtOrTrunc(Merged, dl, VT); in LowerVSETCC()
6761 SDValue TmpOp0 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op1, Op0, in LowerVSETCC()
6762 DAG.getConstant(ARMCC::GT, dl, MVT::i32)); in LowerVSETCC()
6763 SDValue TmpOp1 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC()
6764 DAG.getConstant(ARMCC::GT, dl, MVT::i32)); in LowerVSETCC()
6765 SDValue Result = DAG.getNode(ISD::OR, dl, CmpVT, TmpOp0, TmpOp1); in LowerVSETCC()
6767 Result = DAG.getNOT(dl, Result, VT); in LowerVSETCC()
6773 SDValue TmpOp0 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op1, Op0, in LowerVSETCC()
6774 DAG.getConstant(ARMCC::GT, dl, MVT::i32)); in LowerVSETCC()
6775 SDValue TmpOp1 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC()
6776 DAG.getConstant(ARMCC::GE, dl, MVT::i32)); in LowerVSETCC()
6777 SDValue Result = DAG.getNode(ISD::OR, dl, CmpVT, TmpOp0, TmpOp1); in LowerVSETCC()
6779 Result = DAG.getNOT(dl, Result, VT); in LowerVSETCC()
6817 Op0 = DAG.getNode(ISD::BITCAST, dl, CmpVT, AndOp.getOperand(0)); in LowerVSETCC()
6818 Op1 = DAG.getNode(ISD::BITCAST, dl, CmpVT, AndOp.getOperand(1)); in LowerVSETCC()
6819 SDValue Result = DAG.getNode(ARMISD::VTST, dl, CmpVT, Op0, Op1); in LowerVSETCC()
6821 Result = DAG.getNOT(dl, Result, VT); in LowerVSETCC()
6845 Result = DAG.getNode(ARMISD::VCMPZ, dl, CmpVT, SingleOp, in LowerVSETCC()
6846 DAG.getConstant(Opc, dl, MVT::i32)); in LowerVSETCC()
6848 Result = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC()
6849 DAG.getConstant(Opc, dl, MVT::i32)); in LowerVSETCC()
6852 Result = DAG.getSExtOrTrunc(Result, dl, VT); in LowerVSETCC()
6855 Result = DAG.getNOT(dl, Result, VT); in LowerVSETCC()
6895 const SDLoc &dl, EVT &VT, EVT VectorVT, in isVMOVModifiedImm() argument
7038 return DAG.getTargetConstant(EncodedVal, dl, MVT::i32); in isVMOVModifiedImm()
7547 SDLoc dl(BV); in LowerBuildVectorOfFPTrunc() local
7583 SDValue N1 = DAG.getNode(ARMISD::VCVTN, dl, VT, DAG.getUNDEF(VT), Op0, in LowerBuildVectorOfFPTrunc()
7584 DAG.getConstant(0, dl, MVT::i32)); in LowerBuildVectorOfFPTrunc()
7585 return DAG.getNode(ARMISD::VCVTN, dl, VT, N1, Op1, in LowerBuildVectorOfFPTrunc()
7586 DAG.getConstant(1, dl, MVT::i32)); in LowerBuildVectorOfFPTrunc()
7600 SDLoc dl(BV); in LowerBuildVectorOfFPExt() local
7629 return DAG.getNode(ARMISD::VCVTL, dl, VT, Op0, in LowerBuildVectorOfFPExt()
7630 DAG.getConstant(Offset, dl, MVT::i32)); in LowerBuildVectorOfFPExt()
7637 const ARMSubtarget *ST, const SDLoc &dl) { in IsSingleInstrConstant() argument
7645 return DAG.getConstant(Val, dl, MVT::i32); in IsSingleInstrConstant()
7648 return DAG.getConstant(Val, dl, MVT::i32); in IsSingleInstrConstant()
7655 SDLoc dl(Op); in LowerBUILD_VECTOR_i1() local
7686 SDValue Ext = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, MVT::i32, FirstOp, in LowerBUILD_VECTOR_i1()
7688 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, Op.getValueType(), Ext); in LowerBUILD_VECTOR_i1()
7703 SDValue Base = DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, in LowerBUILD_VECTOR_i1()
7704 DAG.getConstant(Bits32, dl, MVT::i32)); in LowerBUILD_VECTOR_i1()
7709 Base = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Base, V, in LowerBUILD_VECTOR_i1()
7710 DAG.getConstant(i, dl, MVT::i32)); in LowerBUILD_VECTOR_i1()
7794 SDLoc dl(Op); in LowerBUILD_VECTOR() local
7819 SDValue Const = DAG.getConstant(SplatBits.getZExtValue(), dl, MVT::i32); in LowerBUILD_VECTOR()
7820 SDValue VDup = DAG.getNode(ARMISD::VDUP, dl, DupVT, Const); in LowerBUILD_VECTOR()
7821 return DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, VT, VDup); in LowerBUILD_VECTOR()
7830 SplatBitSize, DAG, dl, VmovVT, VT, VMOVModImm); in LowerBUILD_VECTOR()
7833 SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, Val); in LowerBUILD_VECTOR()
7834 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in LowerBUILD_VECTOR()
7840 NegatedImm, SplatUndef.getZExtValue(), SplatBitSize, DAG, dl, VmovVT, in LowerBUILD_VECTOR()
7843 SDValue Vmov = DAG.getNode(ARMISD::VMVNIMM, dl, VmovVT, Val); in LowerBUILD_VECTOR()
7844 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in LowerBUILD_VECTOR()
7851 SDValue Val = DAG.getTargetConstant(ImmVal, dl, MVT::i32); in LowerBUILD_VECTOR()
7852 return DAG.getNode(ARMISD::VMOVFPIMM, dl, VT, Val); in LowerBUILD_VECTOR()
7863 SDValue Const = DAG.getConstant(SplatBits.getZExtValue(), dl, MVT::i32); in LowerBUILD_VECTOR()
7864 SDValue VDup = DAG.getNode(ARMISD::VDUP, dl, DupVT, Const); in LowerBUILD_VECTOR()
7865 return DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, VT, VDup); in LowerBUILD_VECTOR()
7916 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value); in LowerBUILD_VECTOR()
7941 N = DAG.getNode(ARMISD::VDUPLANE, dl, VT, in LowerBUILD_VECTOR()
7942 DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, DAG.getUNDEF(VT), in LowerBUILD_VECTOR()
7943 Value, DAG.getConstant(index, dl, MVT::i32)), in LowerBUILD_VECTOR()
7944 DAG.getConstant(index, dl, MVT::i32)); in LowerBUILD_VECTOR()
7946 N = DAG.getNode(ARMISD::VDUPLANE, dl, VT, in LowerBUILD_VECTOR()
7949 N = DAG.getNode(ARMISD::VDUP, dl, VT, Value); in LowerBUILD_VECTOR()
7960 Ops.push_back(DAG.getConstant(I, dl, MVT::i32)); in LowerBUILD_VECTOR()
7961 N = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Ops); in LowerBUILD_VECTOR()
7972 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, IVT, in LowerBUILD_VECTOR()
7975 SDValue Val = DAG.getBuildVector(VecVT, dl, Ops); in LowerBUILD_VECTOR()
7978 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerBUILD_VECTOR()
7981 SDValue Val = IsSingleInstrConstant(Value, DAG, ST, dl); in LowerBUILD_VECTOR()
7983 return DAG.getNode(ARMISD::VDUP, dl, VT, Val); in LowerBUILD_VECTOR()
8014 DAG.getBuildVector(HVT, dl, makeArrayRef(&Ops[0], NumElts / 2)); in LowerBUILD_VECTOR()
8018 HVT, dl, makeArrayRef(&Ops[NumElts / 2], NumElts / 2)); in LowerBUILD_VECTOR()
8022 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, Lower, Upper); in LowerBUILD_VECTOR()
8035 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, EltVT, Op.getOperand(i))); in LowerBUILD_VECTOR()
8036 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerBUILD_VECTOR()
8037 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerBUILD_VECTOR()
8052 SDValue LaneIdx = DAG.getConstant(i, dl, MVT::i32); in LowerBUILD_VECTOR()
8053 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Vec, V, LaneIdx); in LowerBUILD_VECTOR()
8066 SDLoc dl(Op); in ReconstructShuffle() local
8160 DAG.getNode(ISD::CONCAT_VECTORS, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8176 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8177 DAG.getConstant(NumSrcElts, dl, MVT::i32)); in ReconstructShuffle()
8182 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8183 DAG.getConstant(0, dl, MVT::i32)); in ReconstructShuffle()
8187 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8188 DAG.getConstant(0, dl, MVT::i32)); in ReconstructShuffle()
8190 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8191 DAG.getConstant(NumSrcElts, dl, MVT::i32)); in ReconstructShuffle()
8193 Src.ShuffleVec = DAG.getNode(ARMISD::VEXT, dl, DestVT, VEXTSrc1, in ReconstructShuffle()
8195 DAG.getConstant(Src.MinElt, dl, MVT::i32)); in ReconstructShuffle()
8208 Src.ShuffleVec = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, ShuffleVT, Src.ShuffleVec); in ReconstructShuffle()
8256 SDValue Shuffle = buildLegalVectorShuffle(ShuffleVT, dl, ShuffleOps[0], in ReconstructShuffle()
8260 return DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, VT, Shuffle); in ReconstructShuffle()
8351 const SDLoc &dl) { in GeneratePerfectShuffle() argument
8363 OpLHS = GeneratePerfectShuffle(PerfectShuffleTable[LHSID], LHS, RHS, DAG, dl); in GeneratePerfectShuffle()
8364 OpRHS = GeneratePerfectShuffle(PerfectShuffleTable[RHSID], LHS, RHS, DAG, dl); in GeneratePerfectShuffle()
8373 return DAG.getNode(ARMISD::VREV64, dl, VT, OpLHS); in GeneratePerfectShuffle()
8377 return DAG.getNode(ARMISD::VREV32, dl, VT, OpLHS); in GeneratePerfectShuffle()
8380 return DAG.getNode(ARMISD::VREV16, dl, VT, OpLHS); in GeneratePerfectShuffle()
8385 return DAG.getNode(ARMISD::VDUPLANE, dl, VT, in GeneratePerfectShuffle()
8386 OpLHS, DAG.getConstant(OpNum-OP_VDUP0, dl, MVT::i32)); in GeneratePerfectShuffle()
8390 return DAG.getNode(ARMISD::VEXT, dl, VT, in GeneratePerfectShuffle()
8392 DAG.getConstant(OpNum - OP_VEXT1 + 1, dl, MVT::i32)); in GeneratePerfectShuffle()
8395 return DAG.getNode(ARMISD::VUZP, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
8399 return DAG.getNode(ARMISD::VZIP, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
8403 return DAG.getNode(ARMISD::VTRN, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
8462 static SDValue PromoteMVEPredVector(SDLoc dl, SDValue Pred, EVT VT, in PromoteMVEPredVector() argument
8468 DAG.getTargetConstant(ARM_AM::createVMOVModImm(0xe, 0xff), dl, MVT::i32); in PromoteMVEPredVector()
8469 AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v16i8, AllOnes); in PromoteMVEPredVector()
8472 DAG.getTargetConstant(ARM_AM::createVMOVModImm(0xe, 0x0), dl, MVT::i32); in PromoteMVEPredVector()
8473 AllZeroes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v16i8, AllZeroes); in PromoteMVEPredVector()
8484 RecastV1 = DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::v16i1, Pred); in PromoteMVEPredVector()
8490 DAG.getNode(ISD::VSELECT, dl, MVT::v16i8, RecastV1, AllOnes, AllZeroes); in PromoteMVEPredVector()
8494 return DAG.getNode(ISD::BITCAST, dl, NewVT, PredAsVector); in PromoteMVEPredVector()
8507 SDLoc dl(Op); in LowerVECTOR_SHUFFLE_i1() local
8509 SDValue cast = DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::i32, V1); in LowerVECTOR_SHUFFLE_i1()
8510 SDValue rbit = DAG.getNode(ISD::BITREVERSE, dl, MVT::i32, cast); in LowerVECTOR_SHUFFLE_i1()
8511 SDValue srl = DAG.getNode(ISD::SRL, dl, MVT::i32, rbit, in LowerVECTOR_SHUFFLE_i1()
8512 DAG.getConstant(16, dl, MVT::i32)); in LowerVECTOR_SHUFFLE_i1()
8513 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, srl); in LowerVECTOR_SHUFFLE_i1()
8524 SDValue PredAsVector = PromoteMVEPredVector(dl, V1, VT, DAG); in LowerVECTOR_SHUFFLE_i1()
8528 SDValue Shuffled = DAG.getVectorShuffle(NewVT, dl, PredAsVector, in LowerVECTOR_SHUFFLE_i1()
8535 SDValue BC = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Shuffled); in LowerVECTOR_SHUFFLE_i1()
8536 SDValue Cmp = DAG.getNode(ARMISD::VCMPZ, dl, MVT::v4i1, BC, in LowerVECTOR_SHUFFLE_i1()
8537 DAG.getConstant(ARMCC::NE, dl, MVT::i32)); in LowerVECTOR_SHUFFLE_i1()
8538 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::v2i1, Cmp); in LowerVECTOR_SHUFFLE_i1()
8540 return DAG.getNode(ARMISD::VCMPZ, dl, VT, Shuffled, in LowerVECTOR_SHUFFLE_i1()
8541 DAG.getConstant(ARMCC::NE, dl, MVT::i32)); in LowerVECTOR_SHUFFLE_i1()
8550 SDLoc dl(Op); in LowerVECTOR_SHUFFLEUsingMovs() local
8598 Parts[Part] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, BitCast, in LowerVECTOR_SHUFFLEUsingMovs()
8599 DAG.getConstant(Elt, dl, MVT::i32)); in LowerVECTOR_SHUFFLEUsingMovs()
8616 VT, dl, Op->getOperand(0), Op->getOperand(1), NewShuffleMask); in LowerVECTOR_SHUFFLEUsingMovs()
8621 Parts[Part] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, in LowerVECTOR_SHUFFLEUsingMovs()
8622 BitCast, DAG.getConstant(Part, dl, MVT::i32)); in LowerVECTOR_SHUFFLEUsingMovs()
8626 SDValue NewVec = DAG.getNode(ARMISD::BUILD_VECTOR, dl, MVT::v4f32, Parts); in LowerVECTOR_SHUFFLEUsingMovs()
8669 SDLoc dl(Op); in LowerVECTOR_SHUFFLEUsingOneOff() local
8674 ISD::EXTRACT_VECTOR_ELT, dl, SVT, in LowerVECTOR_SHUFFLEUsingOneOff()
8676 DAG.getVectorIdxConstant(ShuffleMask[OffElement] % NumElts, dl)); in LowerVECTOR_SHUFFLEUsingOneOff()
8677 return DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, VInput, Elt, in LowerVECTOR_SHUFFLEUsingOneOff()
8678 DAG.getVectorIdxConstant(OffElement % NumElts, dl)); in LowerVECTOR_SHUFFLEUsingOneOff()
8685 SDLoc dl(Op); in LowerVECTOR_SHUFFLE() local
8709 return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0)); in LowerVECTOR_SHUFFLE()
8723 return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0)); in LowerVECTOR_SHUFFLE()
8725 return DAG.getNode(ARMISD::VDUPLANE, dl, VT, V1, in LowerVECTOR_SHUFFLE()
8726 DAG.getConstant(Lane, dl, MVT::i32)); in LowerVECTOR_SHUFFLE()
8734 return DAG.getNode(ARMISD::VEXT, dl, VT, V1, V2, in LowerVECTOR_SHUFFLE()
8735 DAG.getConstant(Imm, dl, MVT::i32)); in LowerVECTOR_SHUFFLE()
8739 return DAG.getNode(ARMISD::VREV64, dl, VT, V1); in LowerVECTOR_SHUFFLE()
8741 return DAG.getNode(ARMISD::VREV32, dl, VT, V1); in LowerVECTOR_SHUFFLE()
8743 return DAG.getNode(ARMISD::VREV16, dl, VT, V1); in LowerVECTOR_SHUFFLE()
8746 return DAG.getNode(ARMISD::VEXT, dl, VT, V1, V1, in LowerVECTOR_SHUFFLE()
8747 DAG.getConstant(Imm, dl, MVT::i32)); in LowerVECTOR_SHUFFLE()
8762 return DAG.getNode(ShuffleOpc, dl, DAG.getVTList(VT, VT), V1, V2) in LowerVECTOR_SHUFFLE()
8768 return DAG.getNode(ARMISD::VMOVN, dl, VT, V2, V1, in LowerVECTOR_SHUFFLE()
8769 DAG.getConstant(0, dl, MVT::i32)); in LowerVECTOR_SHUFFLE()
8771 return DAG.getNode(ARMISD::VMOVN, dl, VT, V1, V2, in LowerVECTOR_SHUFFLE()
8772 DAG.getConstant(1, dl, MVT::i32)); in LowerVECTOR_SHUFFLE()
8774 return DAG.getNode(ARMISD::VMOVN, dl, VT, V1, V1, in LowerVECTOR_SHUFFLE()
8775 DAG.getConstant(1, dl, MVT::i32)); in LowerVECTOR_SHUFFLE()
8809 SDValue Res = DAG.getNode(ShuffleOpc, dl, DAG.getVTList(SubVT, SubVT), in LowerVECTOR_SHUFFLE()
8811 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, Res.getValue(0), in LowerVECTOR_SHUFFLE()
8841 return GeneratePerfectShuffle(PFEntry, V1, V2, DAG, dl); in LowerVECTOR_SHUFFLE()
8848 return GeneratePerfectShuffle(PFEntry, V1, V2, DAG, dl); in LowerVECTOR_SHUFFLE()
8859 V1 = DAG.getNode(ISD::BITCAST, dl, VecVT, V1); in LowerVECTOR_SHUFFLE()
8860 V2 = DAG.getNode(ISD::BITCAST, dl, VecVT, V2); in LowerVECTOR_SHUFFLE()
8866 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, in LowerVECTOR_SHUFFLE()
8869 dl, MVT::i32))); in LowerVECTOR_SHUFFLE()
8871 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerVECTOR_SHUFFLE()
8872 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerVECTOR_SHUFFLE()
8893 SDLoc dl(Op); in LowerINSERT_VECTOR_ELT_i1() local
8899 DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::i32, Op->getOperand(0)); in LowerINSERT_VECTOR_ELT_i1()
8904 SDValue Ext = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, MVT::i32, in LowerINSERT_VECTOR_ELT_i1()
8906 SDValue BFI = DAG.getNode(ARMISD::BFI, dl, MVT::i32, Conv, Ext, in LowerINSERT_VECTOR_ELT_i1()
8907 DAG.getConstant(~Mask, dl, MVT::i32)); in LowerINSERT_VECTOR_ELT_i1()
8908 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, Op.getValueType(), BFI); in LowerINSERT_VECTOR_ELT_i1()
8932 SDLoc dl(Op); in LowerINSERT_VECTOR_ELT() local
8943 SDValue IElt = DAG.getNode(ISD::BITCAST, dl, IEltVT, Elt); in LowerINSERT_VECTOR_ELT()
8944 SDValue IVecIn = DAG.getNode(ISD::BITCAST, dl, IVecVT, VecIn); in LowerINSERT_VECTOR_ELT()
8945 SDValue IVecOut = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, IVecVT, in LowerINSERT_VECTOR_ELT()
8947 return DAG.getNode(ISD::BITCAST, dl, VecVT, IVecOut); in LowerINSERT_VECTOR_ELT()
8956 SDLoc dl(Op); in LowerEXTRACT_VECTOR_ELT_i1() local
8962 DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::i32, Op->getOperand(0)); in LowerEXTRACT_VECTOR_ELT_i1()
8966 SDValue Shift = DAG.getNode(ISD::SRL, dl, MVT::i32, Conv, in LowerEXTRACT_VECTOR_ELT_i1()
8967 DAG.getConstant(Lane * LaneWidth, dl, MVT::i32)); in LowerEXTRACT_VECTOR_ELT_i1()
8985 SDLoc dl(Op); in LowerEXTRACT_VECTOR_ELT() local
8986 return DAG.getNode(ARMISD::VGETLANEu, dl, MVT::i32, Vec, Lane); in LowerEXTRACT_VECTOR_ELT()
8994 SDLoc dl(Op); in LowerCONCAT_VECTORS_i1() local
9008 SDValue NewV1 = PromoteMVEPredVector(dl, V1, Op1VT, DAG); in LowerCONCAT_VECTORS_i1()
9009 SDValue NewV2 = PromoteMVEPredVector(dl, V2, Op2VT, DAG); in LowerCONCAT_VECTORS_i1()
9023 SDValue ConVec = DAG.getNode(ISD::UNDEF, dl, ConcatVT); in LowerCONCAT_VECTORS_i1()
9024 auto ExtractInto = [&DAG, &dl](SDValue NewV, SDValue ConVec, unsigned &j) { in LowerCONCAT_VECTORS_i1()
9028 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, NewV, in LowerCONCAT_VECTORS_i1()
9029 DAG.getIntPtrConstant(i, dl)); in LowerCONCAT_VECTORS_i1()
9030 ConVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, ConcatVT, ConVec, Elt, in LowerCONCAT_VECTORS_i1()
9031 DAG.getConstant(j, dl, MVT::i32)); in LowerCONCAT_VECTORS_i1()
9043 SDValue BC = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, ConVec); in LowerCONCAT_VECTORS_i1()
9044 SDValue Cmp = DAG.getNode(ARMISD::VCMPZ, dl, MVT::v4i1, BC, in LowerCONCAT_VECTORS_i1()
9045 DAG.getConstant(ARMCC::NE, dl, MVT::i32)); in LowerCONCAT_VECTORS_i1()
9046 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::v2i1, Cmp); in LowerCONCAT_VECTORS_i1()
9048 return DAG.getNode(ARMISD::VCMPZ, dl, VT, ConVec, in LowerCONCAT_VECTORS_i1()
9049 DAG.getConstant(ARMCC::NE, dl, MVT::i32)); in LowerCONCAT_VECTORS_i1()
9075 SDLoc dl(Op); in LowerCONCAT_VECTORS() local
9080 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Val, in LowerCONCAT_VECTORS()
9081 DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op0), in LowerCONCAT_VECTORS()
9082 DAG.getIntPtrConstant(0, dl)); in LowerCONCAT_VECTORS()
9084 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Val, in LowerCONCAT_VECTORS()
9085 DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op1), in LowerCONCAT_VECTORS()
9086 DAG.getIntPtrConstant(1, dl)); in LowerCONCAT_VECTORS()
9087 return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Val); in LowerCONCAT_VECTORS()
9094 SDLoc dl(Op); in LowerEXTRACT_SUBVECTOR() local
9105 SDValue NewV1 = PromoteMVEPredVector(dl, V1, Op1VT, DAG); in LowerEXTRACT_SUBVECTOR()
9114 SDValue SubVec = DAG.getNode(ISD::UNDEF, dl, SubVT); in LowerEXTRACT_SUBVECTOR()
9116 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, NewV1, in LowerEXTRACT_SUBVECTOR()
9117 DAG.getIntPtrConstant(i, dl)); in LowerEXTRACT_SUBVECTOR()
9118 SubVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, SubVT, SubVec, Elt, in LowerEXTRACT_SUBVECTOR()
9119 DAG.getConstant(j, dl, MVT::i32)); in LowerEXTRACT_SUBVECTOR()
9120 SubVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, SubVT, SubVec, Elt, in LowerEXTRACT_SUBVECTOR()
9121 DAG.getConstant(j + 1, dl, MVT::i32)); in LowerEXTRACT_SUBVECTOR()
9123 SDValue Cmp = DAG.getNode(ARMISD::VCMPZ, dl, MVT::v4i1, SubVec, in LowerEXTRACT_SUBVECTOR()
9124 DAG.getConstant(ARMCC::NE, dl, MVT::i32)); in LowerEXTRACT_SUBVECTOR()
9125 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::v2i1, Cmp); in LowerEXTRACT_SUBVECTOR()
9129 SDValue SubVec = DAG.getNode(ISD::UNDEF, dl, SubVT); in LowerEXTRACT_SUBVECTOR()
9131 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, NewV1, in LowerEXTRACT_SUBVECTOR()
9132 DAG.getIntPtrConstant(i, dl)); in LowerEXTRACT_SUBVECTOR()
9133 SubVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, SubVT, SubVec, Elt, in LowerEXTRACT_SUBVECTOR()
9134 DAG.getConstant(j, dl, MVT::i32)); in LowerEXTRACT_SUBVECTOR()
9139 return DAG.getNode(ARMISD::VCMPZ, dl, VT, SubVec, in LowerEXTRACT_SUBVECTOR()
9140 DAG.getConstant(ARMCC::NE, dl, MVT::i32)); in LowerEXTRACT_SUBVECTOR()
9434 SDLoc dl(N); in SkipExtensionForVMULL() local
9440 Ops.push_back(DAG.getConstant(CInt.zextOrTrunc(32), dl, MVT::i32)); in SkipExtensionForVMULL()
9442 return DAG.getBuildVector(MVT::getVectorVT(TruncVT, NumElts), dl, Ops); in SkipExtensionForVMULL()
9542 static SDValue LowerSDIV_v4i8(SDValue X, SDValue Y, const SDLoc &dl, in LowerSDIV_v4i8() argument
9549 X = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
9550 Y = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, Y); in LowerSDIV_v4i8()
9551 X = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, X); in LowerSDIV_v4i8()
9552 Y = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, Y); in LowerSDIV_v4i8()
9555 Y = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i8()
9556 DAG.getConstant(Intrinsic::arm_neon_vrecpe, dl, MVT::i32), in LowerSDIV_v4i8()
9562 X = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, X, Y); in LowerSDIV_v4i8()
9563 X = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
9564 Y = DAG.getConstant(0xb000, dl, MVT::v4i32); in LowerSDIV_v4i8()
9565 X = DAG.getNode(ISD::ADD, dl, MVT::v4i32, X, Y); in LowerSDIV_v4i8()
9566 X = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, X); in LowerSDIV_v4i8()
9568 X = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
9569 X = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, X); in LowerSDIV_v4i8()
9573 static SDValue LowerSDIV_v4i16(SDValue N0, SDValue N1, const SDLoc &dl, in LowerSDIV_v4i16() argument
9581 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
9582 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, N1); in LowerSDIV_v4i16()
9583 N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); in LowerSDIV_v4i16()
9584 N1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); in LowerSDIV_v4i16()
9589 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
9590 DAG.getConstant(Intrinsic::arm_neon_vrecpe, dl, MVT::i32), in LowerSDIV_v4i16()
9592 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
9593 DAG.getConstant(Intrinsic::arm_neon_vrecps, dl, MVT::i32), in LowerSDIV_v4i16()
9595 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerSDIV_v4i16()
9600 N0 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N0, N2); in LowerSDIV_v4i16()
9601 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
9602 N1 = DAG.getConstant(0x89, dl, MVT::v4i32); in LowerSDIV_v4i16()
9603 N0 = DAG.getNode(ISD::ADD, dl, MVT::v4i32, N0, N1); in LowerSDIV_v4i16()
9604 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, N0); in LowerSDIV_v4i16()
9607 N0 = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
9608 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, N0); in LowerSDIV_v4i16()
9618 SDLoc dl(Op); in LowerSDIV() local
9624 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v8i16, N0); in LowerSDIV()
9625 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v8i16, N1); in LowerSDIV()
9627 N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerSDIV()
9628 DAG.getIntPtrConstant(4, dl)); in LowerSDIV()
9629 N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerSDIV()
9630 DAG.getIntPtrConstant(4, dl)); in LowerSDIV()
9631 N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerSDIV()
9632 DAG.getIntPtrConstant(0, dl)); in LowerSDIV()
9633 N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerSDIV()
9634 DAG.getIntPtrConstant(0, dl)); in LowerSDIV()
9636 N0 = LowerSDIV_v4i8(N0, N1, dl, DAG); // v4i16 in LowerSDIV()
9637 N2 = LowerSDIV_v4i8(N2, N3, dl, DAG); // v4i16 in LowerSDIV()
9639 N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2); in LowerSDIV()
9642 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v8i8, N0); in LowerSDIV()
9645 return LowerSDIV_v4i16(N0, N1, dl, DAG); in LowerSDIV()
9655 SDLoc dl(Op); in LowerUDIV() local
9661 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v8i16, N0); in LowerUDIV()
9662 N1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v8i16, N1); in LowerUDIV()
9664 N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerUDIV()
9665 DAG.getIntPtrConstant(4, dl)); in LowerUDIV()
9666 N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerUDIV()
9667 DAG.getIntPtrConstant(4, dl)); in LowerUDIV()
9668 N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerUDIV()
9669 DAG.getIntPtrConstant(0, dl)); in LowerUDIV()
9670 N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerUDIV()
9671 DAG.getIntPtrConstant(0, dl)); in LowerUDIV()
9673 N0 = LowerSDIV_v4i16(N0, N1, dl, DAG); // v4i16 in LowerUDIV()
9674 N2 = LowerSDIV_v4i16(N2, N3, dl, DAG); // v4i16 in LowerUDIV()
9676 N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2); in LowerUDIV()
9679 N0 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v8i8, in LowerUDIV()
9680 DAG.getConstant(Intrinsic::arm_neon_vqmovnsu, dl, in LowerUDIV()
9689 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v4i32, N0); in LowerUDIV()
9690 N1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v4i32, N1); in LowerUDIV()
9691 N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); in LowerUDIV()
9692 SDValue BN1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); in LowerUDIV()
9698 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
9699 DAG.getConstant(Intrinsic::arm_neon_vrecpe, dl, MVT::i32), in LowerUDIV()
9701 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
9702 DAG.getConstant(Intrinsic::arm_neon_vrecps, dl, MVT::i32), in LowerUDIV()
9704 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerUDIV()
9705 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
9706 DAG.getConstant(Intrinsic::arm_neon_vrecps, dl, MVT::i32), in LowerUDIV()
9708 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerUDIV()
9713 N0 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N0, N2); in LowerUDIV()
9714 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, N0); in LowerUDIV()
9715 N1 = DAG.getConstant(2, dl, MVT::v4i32); in LowerUDIV()
9716 N0 = DAG.getNode(ISD::ADD, dl, MVT::v4i32, N0, N1); in LowerUDIV()
9717 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, N0); in LowerUDIV()
9720 N0 = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, N0); in LowerUDIV()
9721 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, N0); in LowerUDIV()
9774 SDLoc dl(Op); in LowerFSINCOS() local
9821 CLI.setDebugLoc(dl) in LowerFSINCOS()
9831 DAG.getLoad(ArgVT, dl, CallResult.second, SRet, MachinePointerInfo()); in LowerFSINCOS()
9834 SDValue Add = DAG.getNode(ISD::ADD, dl, PtrVT, SRet, in LowerFSINCOS()
9835 DAG.getIntPtrConstant(ArgVT.getStoreSize(), dl)); in LowerFSINCOS()
9837 DAG.getLoad(ArgVT, dl, LoadSin.getValue(1), Add, MachinePointerInfo()); in LowerFSINCOS()
9840 return DAG.getNode(ISD::MERGE_VALUES, dl, Tys, in LowerFSINCOS()
9850 SDLoc dl(Op); in LowerWindowsDIVLibCall() local
9873 CLI.setDebugLoc(dl) in LowerWindowsDIVLibCall()
9928 SDLoc dl(Op); in LowerDIV_Windows() local
9930 SDValue DBZCHK = DAG.getNode(ARMISD::WIN__DBZCHK, dl, MVT::Other, in LowerDIV_Windows()
9957 SDLoc dl(Op); in ExpandDIV_Windows() local
9963 SDValue Lower = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Result); in ExpandDIV_Windows()
9964 SDValue Upper = DAG.getNode(ISD::SRL, dl, MVT::i64, Result, in ExpandDIV_Windows()
9965 DAG.getConstant(32, dl, TLI.getPointerTy(DL))); in ExpandDIV_Windows()
9966 Upper = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Upper); in ExpandDIV_Windows()
9968 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lower, Upper)); in ExpandDIV_Windows()
9992 SDLoc dl(Op); in LowerPredicateLoad() local
9994 ISD::EXTLOAD, dl, MVT::i32, LD->getChain(), LD->getBasePtr(), in LowerPredicateLoad()
9999 Val = DAG.getNode(ISD::SRL, dl, MVT::i32, in LowerPredicateLoad()
10000 DAG.getNode(ISD::BITREVERSE, dl, MVT::i32, Load), in LowerPredicateLoad()
10001 DAG.getConstant(32 - MemVT.getSizeInBits(), dl, MVT::i32)); in LowerPredicateLoad()
10002 SDValue Pred = DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::v16i1, Val); in LowerPredicateLoad()
10004 Pred = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MemVT, Pred, in LowerPredicateLoad()
10005 DAG.getConstant(0, dl, MVT::i32)); in LowerPredicateLoad()
10006 return DAG.getMergeValues({Pred, Load.getValue(1)}, dl); in LowerPredicateLoad()
10017 SDLoc dl(N); in LowerLOAD() local
10019 ARMISD::LDRD, dl, DAG.getVTList({MVT::i32, MVT::i32, MVT::Other}), in LowerLOAD()
10023 SDValue Pair = DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in LowerLOAD()
10040 SDLoc dl(Op); in LowerPredicateStore() local
10048 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, Build, in LowerPredicateStore()
10049 DAG.getConstant(Elt, dl, MVT::i32))); in LowerPredicateStore()
10053 Build = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v16i1, Ops); in LowerPredicateStore()
10055 SDValue GRP = DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::i32, Build); in LowerPredicateStore()
10057 GRP = DAG.getNode(ISD::SRL, dl, MVT::i32, in LowerPredicateStore()
10058 DAG.getNode(ISD::BITREVERSE, dl, MVT::i32, GRP), in LowerPredicateStore()
10059 DAG.getConstant(16, dl, MVT::i32)); in LowerPredicateStore()
10061 ST->getChain(), dl, GRP, ST->getBasePtr(), in LowerPredicateStore()
10075 SDLoc dl(N); in LowerSTORE() local
10078 ISD::EXTRACT_ELEMENT, dl, MVT::i32, ST->getValue(), in LowerSTORE()
10079 DAG.getTargetConstant(DAG.getDataLayout().isLittleEndian() ? 0 : 1, dl, in LowerSTORE()
10082 ISD::EXTRACT_ELEMENT, dl, MVT::i32, ST->getValue(), in LowerSTORE()
10083 DAG.getTargetConstant(DAG.getDataLayout().isLittleEndian() ? 1 : 0, dl, in LowerSTORE()
10086 return DAG.getMemIntrinsicNode(ARMISD::STRD, dl, DAG.getVTList(MVT::Other), in LowerSTORE()
10109 SDLoc dl(Op); in LowerMLOAD() local
10116 SDValue ZeroVec = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerMLOAD()
10117 DAG.getTargetConstant(0, dl, MVT::i32)); in LowerMLOAD()
10119 VT, dl, N->getChain(), N->getBasePtr(), N->getOffset(), Mask, ZeroVec, in LowerMLOAD()
10127 Combo = DAG.getNode(ISD::VSELECT, dl, VT, Mask, NewLoad, PassThru); in LowerMLOAD()
10128 return DAG.getMergeValues({Combo, NewLoad.getValue(1)}, dl); in LowerMLOAD()
10136 SDLoc dl(Op); in LowerVecReduce() local
10164 SDValue Rev = DAG.getNode(RevOpcode, dl, VT, Op0); in LowerVecReduce()
10165 Op0 = DAG.getNode(BaseOpcode, dl, VT, Op0, Rev); in LowerVecReduce()
10172 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
10173 DAG.getConstant(0 * NumElts / 4, dl, MVT::i32)); in LowerVecReduce()
10174 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
10175 DAG.getConstant(1 * NumElts / 4, dl, MVT::i32)); in LowerVecReduce()
10176 SDValue Ext2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
10177 DAG.getConstant(2 * NumElts / 4, dl, MVT::i32)); in LowerVecReduce()
10178 SDValue Ext3 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
10179 DAG.getConstant(3 * NumElts / 4, dl, MVT::i32)); in LowerVecReduce()
10180 SDValue Res0 = DAG.getNode(BaseOpcode, dl, EltVT, Ext0, Ext1, Op->getFlags()); in LowerVecReduce()
10181 SDValue Res1 = DAG.getNode(BaseOpcode, dl, EltVT, Ext2, Ext3, Op->getFlags()); in LowerVecReduce()
10182 Res = DAG.getNode(BaseOpcode, dl, EltVT, Res0, Res1, Op->getFlags()); in LowerVecReduce()
10184 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
10185 DAG.getConstant(0, dl, MVT::i32)); in LowerVecReduce()
10186 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
10187 DAG.getConstant(1, dl, MVT::i32)); in LowerVecReduce()
10188 Res = DAG.getNode(BaseOpcode, dl, EltVT, Ext0, Ext1, Op->getFlags()); in LowerVecReduce()
10193 Res = DAG.getNode(ISD::ANY_EXTEND, dl, Op->getValueType(0), Res); in LowerVecReduce()
10238 SDLoc dl(V.getNode()); in createGPRPairNode() local
10239 SDValue VLo = DAG.getAnyExtOrTrunc(V, dl, MVT::i32); in createGPRPairNode()
10241 DAG.getNode(ISD::SRL, dl, MVT::i64, V, DAG.getConstant(32, dl, MVT::i32)), in createGPRPairNode()
10242 dl, MVT::i32); in createGPRPairNode()
10247 DAG.getTargetConstant(ARM::GPRPairRegClassID, dl, MVT::i32); in createGPRPairNode()
10248 SDValue SubReg0 = DAG.getTargetConstant(ARM::gsub_0, dl, MVT::i32); in createGPRPairNode()
10249 SDValue SubReg1 = DAG.getTargetConstant(ARM::gsub_1, dl, MVT::i32); in createGPRPairNode()
10252 DAG.getMachineNode(TargetOpcode::REG_SEQUENCE, dl, MVT::Untyped, Ops), 0); in createGPRPairNode()
10284 SDLoc dl(Op); in LowerFSETCC() local
10296 DAG, LHS.getValueType(), LHS, RHS, CC, dl, LHS, RHS, Chain, IsSignaling); in LowerFSETCC()
10298 RHS = DAG.getConstant(0, dl, LHS.getValueType()); in LowerFSETCC()
10301 SDValue Result = DAG.getNode(ISD::SETCC, dl, VT, LHS, RHS, in LowerFSETCC()
10303 return DAG.getMergeValues({Result, Chain}, dl); in LowerFSETCC()
10314 SDValue True = DAG.getConstant(1, dl, VT); in LowerFSETCC()
10315 SDValue False = DAG.getConstant(0, dl, VT); in LowerFSETCC()
10316 SDValue ARMcc = DAG.getConstant(CondCode, dl, MVT::i32); in LowerFSETCC()
10318 SDValue Cmp = getVFPCmp(LHS, RHS, DAG, dl, IsSignaling); in LowerFSETCC()
10319 SDValue Result = getCMOV(dl, VT, False, True, ARMcc, CCR, Cmp, DAG); in LowerFSETCC()
10321 ARMcc = DAG.getConstant(CondCode2, dl, MVT::i32); in LowerFSETCC()
10322 Cmp = getVFPCmp(LHS, RHS, DAG, dl, IsSignaling); in LowerFSETCC()
10323 Result = getCMOV(dl, VT, Result, True, ARMcc, CCR, Cmp, DAG); in LowerFSETCC()
10325 return DAG.getMergeValues({Result, Chain}, dl); in LowerFSETCC()
10471 SDLoc dl(N); in ReplaceLongIntrinsic() local
10472 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ReplaceLongIntrinsic()
10474 DAG.getConstant(0, dl, MVT::i32)); in ReplaceLongIntrinsic()
10475 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ReplaceLongIntrinsic()
10477 DAG.getConstant(1, dl, MVT::i32)); in ReplaceLongIntrinsic()
10479 SDValue LongMul = DAG.getNode(Opc, dl, in ReplaceLongIntrinsic()
10483 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, in ReplaceLongIntrinsic()
10569 DebugLoc dl = MI.getDebugLoc(); in SetupEntryBlockForSjLj() local
10605 BuildMI(*MBB, MI, dl, TII->get(ARM::t2LDRpci), NewVReg1) in SetupEntryBlockForSjLj()
10611 BuildMI(*MBB, MI, dl, TII->get(ARM::t2ORRri), NewVReg2) in SetupEntryBlockForSjLj()
10617 BuildMI(*MBB, MI, dl, TII->get(ARM::tPICADD), NewVReg3) in SetupEntryBlockForSjLj()
10620 BuildMI(*MBB, MI, dl, TII->get(ARM::t2STRi12)) in SetupEntryBlockForSjLj()
10635 BuildMI(*MBB, MI, dl, TII->get(ARM::tLDRpci), NewVReg1) in SetupEntryBlockForSjLj()
10640 BuildMI(*MBB, MI, dl, TII->get(ARM::tPICADD), NewVReg2) in SetupEntryBlockForSjLj()
10645 BuildMI(*MBB, MI, dl, TII->get(ARM::tMOVi8), NewVReg3) in SetupEntryBlockForSjLj()
10650 BuildMI(*MBB, MI, dl, TII->get(ARM::tORR), NewVReg4) in SetupEntryBlockForSjLj()
10656 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5) in SetupEntryBlockForSjLj()
10659 BuildMI(*MBB, MI, dl, TII->get(ARM::tSTRi)) in SetupEntryBlockForSjLj()
10671 BuildMI(*MBB, MI, dl, TII->get(ARM::LDRi12), NewVReg1) in SetupEntryBlockForSjLj()
10677 BuildMI(*MBB, MI, dl, TII->get(ARM::PICADD), NewVReg2) in SetupEntryBlockForSjLj()
10681 BuildMI(*MBB, MI, dl, TII->get(ARM::STRi12)) in SetupEntryBlockForSjLj()
10693 DebugLoc dl = MI.getDebugLoc(); in EmitSjLjDispatchBlock() local
10761 BuildMI(TrapBB, dl, TII->get(trap_opcode)); in EmitSjLjDispatchBlock()
10781 MIB = BuildMI(DispatchBB, dl, TII->get(ARM::Int_eh_sjlj_dispatchsetup)); in EmitSjLjDispatchBlock()
10796 BuildMI(DispatchBB, dl, TII->get(ARM::t2LDRi12), NewVReg1) in EmitSjLjDispatchBlock()
10803 BuildMI(DispatchBB, dl, TII->get(ARM::t2CMPri)) in EmitSjLjDispatchBlock()
10809 BuildMI(DispatchBB, dl, TII->get(ARM::t2MOVi16), VReg1) in EmitSjLjDispatchBlock()
10816 BuildMI(DispatchBB, dl, TII->get(ARM::t2MOVTi16), VReg2) in EmitSjLjDispatchBlock()
10822 BuildMI(DispatchBB, dl, TII->get(ARM::t2CMPrr)) in EmitSjLjDispatchBlock()
10828 BuildMI(DispatchBB, dl, TII->get(ARM::t2Bcc)) in EmitSjLjDispatchBlock()
10834 BuildMI(DispContBB, dl, TII->get(ARM::t2LEApcrelJT), NewVReg3) in EmitSjLjDispatchBlock()
10839 BuildMI(DispContBB, dl, TII->get(ARM::t2ADDrs), NewVReg4) in EmitSjLjDispatchBlock()
10846 BuildMI(DispContBB, dl, TII->get(ARM::t2BR_JT)) in EmitSjLjDispatchBlock()
10852 BuildMI(DispatchBB, dl, TII->get(ARM::tLDRspi), NewVReg1) in EmitSjLjDispatchBlock()
10859 BuildMI(DispatchBB, dl, TII->get(ARM::tCMPi8)) in EmitSjLjDispatchBlock()
10873 BuildMI(DispatchBB, dl, TII->get(ARM::tLDRpci)) in EmitSjLjDispatchBlock()
10877 BuildMI(DispatchBB, dl, TII->get(ARM::tCMPr)) in EmitSjLjDispatchBlock()
10883 BuildMI(DispatchBB, dl, TII->get(ARM::tBcc)) in EmitSjLjDispatchBlock()
10889 BuildMI(DispContBB, dl, TII->get(ARM::tLSLri), NewVReg2) in EmitSjLjDispatchBlock()
10896 BuildMI(DispContBB, dl, TII->get(ARM::tLEApcrelJT), NewVReg3) in EmitSjLjDispatchBlock()
10901 BuildMI(DispContBB, dl, TII->get(ARM::tADDrr), NewVReg4) in EmitSjLjDispatchBlock()
10912 BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5) in EmitSjLjDispatchBlock()
10921 BuildMI(DispContBB, dl, TII->get(ARM::tADDrr), NewVReg6) in EmitSjLjDispatchBlock()
10928 BuildMI(DispContBB, dl, TII->get(ARM::tBR_JTr)) in EmitSjLjDispatchBlock()
10933 BuildMI(DispatchBB, dl, TII->get(ARM::LDRi12), NewVReg1) in EmitSjLjDispatchBlock()
10940 BuildMI(DispatchBB, dl, TII->get(ARM::CMPri)) in EmitSjLjDispatchBlock()
10946 BuildMI(DispatchBB, dl, TII->get(ARM::MOVi16), VReg1) in EmitSjLjDispatchBlock()
10953 BuildMI(DispatchBB, dl, TII->get(ARM::MOVTi16), VReg2) in EmitSjLjDispatchBlock()
10959 BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr)) in EmitSjLjDispatchBlock()
10973 BuildMI(DispatchBB, dl, TII->get(ARM::LDRcp)) in EmitSjLjDispatchBlock()
10978 BuildMI(DispatchBB, dl, TII->get(ARM::CMPrr)) in EmitSjLjDispatchBlock()
10984 BuildMI(DispatchBB, dl, TII->get(ARM::Bcc)) in EmitSjLjDispatchBlock()
10990 BuildMI(DispContBB, dl, TII->get(ARM::MOVsi), NewVReg3) in EmitSjLjDispatchBlock()
10996 BuildMI(DispContBB, dl, TII->get(ARM::LEApcrelJT), NewVReg4) in EmitSjLjDispatchBlock()
11004 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5) in EmitSjLjDispatchBlock()
11012 BuildMI(DispContBB, dl, TII->get(ARM::BR_JTadd)) in EmitSjLjDispatchBlock()
11017 BuildMI(DispContBB, dl, TII->get(ARM::BR_JTr)) in EmitSjLjDispatchBlock()
11143 const TargetInstrInfo *TII, const DebugLoc &dl, in emitPostLd() argument
11149 BuildMI(*BB, Pos, dl, TII->get(LdOpc), Data) in emitPostLd()
11156 BuildMI(*BB, Pos, dl, TII->get(LdOpc), Data) in emitPostLd()
11160 BuildMI(*BB, Pos, dl, TII->get(ARM::tADDi8), AddrOut) in emitPostLd()
11166 BuildMI(*BB, Pos, dl, TII->get(LdOpc), Data) in emitPostLd()
11172 BuildMI(*BB, Pos, dl, TII->get(LdOpc), Data) in emitPostLd()
11184 const TargetInstrInfo *TII, const DebugLoc &dl, in emitPostSt() argument
11190 BuildMI(*BB, Pos, dl, TII->get(StOpc), AddrOut) in emitPostSt()
11197 BuildMI(*BB, Pos, dl, TII->get(StOpc)) in emitPostSt()
11202 BuildMI(*BB, Pos, dl, TII->get(ARM::tADDi8), AddrOut) in emitPostSt()
11208 BuildMI(*BB, Pos, dl, TII->get(StOpc), AddrOut) in emitPostSt()
11214 BuildMI(*BB, Pos, dl, TII->get(StOpc), AddrOut) in emitPostSt()
11237 DebugLoc dl = MI.getDebugLoc(); in EmitStructByval() local
11288 emitPostLd(BB, MI, TII, dl, UnitSize, scratch, srcIn, srcOut, in EmitStructByval()
11290 emitPostSt(BB, MI, TII, dl, UnitSize, scratch, destIn, destOut, in EmitStructByval()
11303 emitPostLd(BB, MI, TII, dl, 1, scratch, srcIn, srcOut, in EmitStructByval()
11305 emitPostSt(BB, MI, TII, dl, 1, scratch, destIn, destOut, in EmitStructByval()
11350 BuildMI(BB, dl, TII->get(IsThumb ? ARM::t2MOVi16 : ARM::MOVi16), Vtmp) in EmitStructByval()
11355 BuildMI(BB, dl, TII->get(IsThumb ? ARM::t2MOVTi16 : ARM::MOVTi16), varEnd) in EmitStructByval()
11372 BuildMI(*BB, MI, dl, TII->get(ARM::tLDRpci)) in EmitStructByval()
11378 BuildMI(*BB, MI, dl, TII->get(ARM::LDRcp)) in EmitStructByval()
11400 BuildMI(*BB, BB->begin(), dl, TII->get(ARM::PHI), varPhi) in EmitStructByval()
11403 BuildMI(BB, dl, TII->get(ARM::PHI), srcPhi) in EmitStructByval()
11406 BuildMI(BB, dl, TII->get(ARM::PHI), destPhi) in EmitStructByval()
11413 emitPostLd(BB, BB->end(), TII, dl, UnitSize, scratch, srcPhi, srcLoop, in EmitStructByval()
11415 emitPostSt(BB, BB->end(), TII, dl, UnitSize, scratch, destPhi, destLoop, in EmitStructByval()
11420 BuildMI(*BB, BB->end(), dl, TII->get(ARM::tSUBi8), varLoop) in EmitStructByval()
11427 BuildMI(*BB, BB->end(), dl, in EmitStructByval()
11436 BuildMI(*BB, BB->end(), dl, in EmitStructByval()
11456 emitPostLd(BB, StartOfExit, TII, dl, 1, scratch, srcIn, srcOut, in EmitStructByval()
11458 emitPostSt(BB, StartOfExit, TII, dl, 1, scratch, destIn, destOut, in EmitStructByval()
11753 DebugLoc dl = MI.getDebugLoc(); in EmitInstrWithCustomInserter() local
11764 BuildMI(*BB, MI, dl, TII->get(ARM::tLDMIA_UPD)) in EmitInstrWithCustomInserter()
11832 BuildMI(BB, dl, TII->get(ARM::t2B)) in EmitInstrWithCustomInserter()
11840 genTPEntry(TpEntry, TpLoopBody, TpExit, OpSizeReg, TII, dl, MRI); in EmitInstrWithCustomInserter()
11844 genTPLoopBody(TpLoopBody, TpEntry, TpExit, TII, dl, MRI, OpSrcReg, in EmitInstrWithCustomInserter()
11892 BuildMI(*BB, MI, dl, TII->get(NewOpc)) in EmitInstrWithCustomInserter()
11913 MachineInstrBuilder MIB = BuildMI(*BB, MI, dl, TII->get(NewOpc)); in EmitInstrWithCustomInserter()
11957 BuildMI(BB, dl, TII->get(ARM::tBcc)) in EmitInstrWithCustomInserter()
11974 BuildMI(*BB, BB->begin(), dl, TII->get(ARM::PHI), MI.getOperand(0).getReg()) in EmitInstrWithCustomInserter()
11996 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPri : ARM::CMPri)) in EmitInstrWithCustomInserter()
12000 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPri : ARM::CMPri)) in EmitInstrWithCustomInserter()
12006 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPrr : ARM::CMPrr)) in EmitInstrWithCustomInserter()
12010 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPrr : ARM::CMPrr)) in EmitInstrWithCustomInserter()
12020 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2Bcc : ARM::Bcc)) in EmitInstrWithCustomInserter()
12023 BuildMI(BB, dl, TII->get(ARM::t2B)) in EmitInstrWithCustomInserter()
12027 BuildMI(BB, dl, TII->get(ARM::B)) .addMBB(exitMBB); in EmitInstrWithCustomInserter()
12088 BuildMI(BB, dl, TII->get(isThumb2 ? ARM::t2CMPri : ARM::CMPri)) in EmitInstrWithCustomInserter()
12094 BuildMI(BB, dl, in EmitInstrWithCustomInserter()
12101 BuildMI(*RSBBB, RSBBB->begin(), dl, in EmitInstrWithCustomInserter()
12110 BuildMI(*SinkBB, SinkBB->begin(), dl, in EmitInstrWithCustomInserter()
12306 SDLoc dl(N); in isConditionalZeroOrAllOnes() local
12315 OtherOp = DAG.getConstant(0, dl, VT); in isConditionalZeroOrAllOnes()
12318 OtherOp = DAG.getConstant(1, dl, VT); in isConditionalZeroOrAllOnes()
12320 OtherOp = DAG.getAllOnesConstant(dl, VT); in isConditionalZeroOrAllOnes()
12417 SDLoc dl(N); in AddCombineToVPADD() local
12422 Ops.push_back(DAG.getConstant(Intrinsic::arm_neon_vpadd, dl, in AddCombineToVPADD()
12427 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, Ops); in AddCombineToVPADD()
12457 SDLoc dl(N); in AddCombineVUZPToVPADDL() local
12467 Ops.push_back(DAG.getConstant(Opcode, dl, in AddCombineVUZPToVPADDL()
12476 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, Ops); in AddCombineVUZPToVPADDL()
12552 SDLoc dl(N); in AddCombineBUILD_VECTORToVPADDL() local
12556 Ops.push_back(DAG.getConstant(Intrinsic::arm_neon_vpaddls, dl, in AddCombineBUILD_VECTORToVPADDL()
12575 SDValue tmp = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, widenType, Ops); in AddCombineBUILD_VECTORToVPADDL()
12577 return DAG.getNode(ExtOp, dl, VT, tmp); in AddCombineBUILD_VECTORToVPADDL()
12624 SDLoc dl(AddcNode); in AddCombineTo64BitSMLAL16() local
12650 SDValue SMLAL = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32), in AddCombineTo64BitSMLAL16()
12974 SDLoc dl(N); in PerformSELECTCombine() local
13060 LHS = DCI.DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i32, LHS); in PerformSELECTCombine()
13064 DCI.DAG.getNode(Opcode, dl, MVT::i32, LHS, RHS->getOperand(0)); in PerformSELECTCombine()
13068 Reduction = DCI.DAG.getNode(ISD::TRUNCATE, dl, VectorScalarType, Reduction); in PerformSELECTCombine()
13342 SDLoc dl(N); in TryDistrubutionADDVecReduce() local
13363 SDValue Add0 = DAG.getNode(ISD::ADD, dl, VT, N0, N1.getOperand(0)); in TryDistrubutionADDVecReduce()
13364 return DAG.getNode(ISD::ADD, dl, VT, Add0, N1.getOperand(1)); in TryDistrubutionADDVecReduce()
13383 SDValue Add0 = DAG.getNode(ISD::ADD, dl, VT, N0.getOperand(1 - N0RedOp), in TryDistrubutionADDVecReduce()
13386 DAG.getNode(ISD::ADD, dl, VT, Add0, N0.getOperand(N0RedOp)); in TryDistrubutionADDVecReduce()
13387 return DAG.getNode(ISD::ADD, dl, VT, Add1, N1.getOperand(N1RedOp)); in TryDistrubutionADDVecReduce()
13462 return DAG.getNode(ISD::ADD, dl, VT, N1, N0); in TryDistrubutionADDVecReduce()
13473 SDValue Add0 = DAG.getNode(ISD::ADD, dl, VT, X, N1); in TryDistrubutionADDVecReduce()
13474 return DAG.getNode(ISD::ADD, dl, VT, Add0, N0); in TryDistrubutionADDVecReduce()
13494 SDLoc dl(N); in PerformADDVecReduce() local
13519 SDValue Inp = DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, in PerformADDVecReduce()
13521 NA = DAG.getNode(ISD::ADD, dl, MVT::i64, Inp, NA); in PerformADDVecReduce()
13525 Ops.push_back(DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, NA, in PerformADDVecReduce()
13526 DAG.getConstant(0, dl, MVT::i32))); in PerformADDVecReduce()
13527 Ops.push_back(DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, NA, in PerformADDVecReduce()
13528 DAG.getConstant(1, dl, MVT::i32))); in PerformADDVecReduce()
13533 DAG.getNode(OpcodeA, dl, DAG.getVTList({MVT::i32, MVT::i32}), Ops); in PerformADDVecReduce()
13534 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Red, in PerformADDVecReduce()
13772 SDLoc dl(N); in PerformSHLSimplify() local
13774 SDValue BinOp = DAG.getNode(N->getOpcode(), dl, MVT::i32, X, in PerformSHLSimplify()
13775 DAG.getConstant(C1Int, dl, MVT::i32)); in PerformSHLSimplify()
13777 SDValue Res = DAG.getNode(ISD::SHL, dl, MVT::i32, BinOp, SHL.getOperand(1)); in PerformSHLSimplify()
13862 SDLoc dl(N); in PerformSUBCombine() local
13863 SDValue Negate = DCI.DAG.getNode(ISD::SUB, dl, MVT::i32, in PerformSUBCombine()
13864 DCI.DAG.getConstant(0, dl, MVT::i32), in PerformSUBCombine()
13866 return DCI.DAG.getNode(ARMISD::VDUP, dl, N->getValueType(0), Negate); in PerformSUBCombine()
13961 SDLoc dl(N); in PerformMVEVMULLCombine() local
13964 SDValue New0a = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Op0); in PerformMVEVMULLCombine()
13965 SDValue New1a = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Op1); in PerformMVEVMULLCombine()
13966 return DAG.getNode(ARMISD::VMULLs, dl, VT, New0a, New1a); in PerformMVEVMULLCombine()
13971 SDValue New0a = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Op0); in PerformMVEVMULLCombine()
13972 SDValue New1a = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Op1); in PerformMVEVMULLCombine()
13973 return DAG.getNode(ARMISD::VMULLu, dl, VT, New0a, New1a); in PerformMVEVMULLCombine()
14175 SDLoc dl(N); in PerformANDCombine() local
14193 DAG, dl, VbicVT, VT, OtherModImm); in PerformANDCombine()
14196 DAG.getNode(ISD::BITCAST, dl, VbicVT, N->getOperand(0)); in PerformANDCombine()
14197 SDValue Vbic = DAG.getNode(ARMISD::VBICIMM, dl, VbicVT, Input, Val); in PerformANDCombine()
14198 return DAG.getNode(ISD::BITCAST, dl, VT, Vbic); in PerformANDCombine()
14264 SDLoc dl(OR); in PerformORCombineToSMULWBT() local
14275 SDValue Res = DAG.getNode(Opcode, dl, MVT::i32, OpS32, OpS16); in PerformORCombineToSMULWBT()
14468 SDLoc dl(N); in PerformORCombine() local
14489 SplatBitSize, DAG, dl, VorrVT, VT, OtherModImm); in PerformORCombine()
14492 DAG.getNode(ISD::BITCAST, dl, VorrVT, N->getOperand(0)); in PerformORCombine()
14493 SDValue Vorr = DAG.getNode(ARMISD::VORRIMM, dl, VorrVT, Input, Val); in PerformORCombine()
14494 return DAG.getNode(ISD::BITCAST, dl, VT, Vorr); in PerformORCombine()
14540 SDValue Result = DAG.getNode(ARMISD::VBSP, dl, CanonicalVT, in PerformORCombine()
14544 return DAG.getNode(ISD::BITCAST, dl, VT, Result); in PerformORCombine()
14708 SDLoc dl(N); in PerformBFICombine() local
14712 ISD::SRL, dl, VT, From1, in PerformBFICombine()
14713 DAG.getConstant(NewFromMask.countTrailingZeros(), dl, VT)); in PerformBFICombine()
14714 return DAG.getNode(ARMISD::BFI, dl, VT, CombineBFI.getOperand(0), From1, in PerformBFICombine()
14715 DAG.getConstant(~NewToMask, dl, VT)); in PerformBFICombine()
14731 SDLoc dl(N); in PerformBFICombine() local
14732 SDValue BFI1 = DAG.getNode(ARMISD::BFI, dl, VT, N0.getOperand(0), in PerformBFICombine()
14734 return DAG.getNode(ARMISD::BFI, dl, VT, BFI1, N0.getOperand(1), in PerformBFICombine()
15031 SDLoc dl(N); in PerformBUILD_VECTORCombine() local
15035 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::f64, N->getOperand(i)); in PerformBUILD_VECTORCombine()
15041 SDValue BV = DAG.getBuildVector(FloatVT, dl, Ops); in PerformBUILD_VECTORCombine()
15042 return DAG.getNode(ISD::BITCAST, dl, VT, BV); in PerformBUILD_VECTORCombine()
15114 SDLoc dl(N); in PerformARMBUILD_VECTORCombine() local
15128 SDValue LaneIdx = DAG.getConstant(Idx, dl, MVT::i32); in PerformARMBUILD_VECTORCombine()
15129 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VecVT, Vec, V, LaneIdx); in PerformARMBUILD_VECTORCombine()
15131 Vec = DAG.getNode(ISD::BITCAST, dl, VT, Vec); in PerformARMBUILD_VECTORCombine()
15141 SDLoc dl(N); in PerformPREDICATE_CASTCombine() local
15148 return DCI.DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, Op->getOperand(0)); in PerformPREDICATE_CASTCombine()
15155 DCI.DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, Op->getOperand(0)); in PerformPREDICATE_CASTCombine()
15156 SDValue C = DCI.DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, in PerformPREDICATE_CASTCombine()
15157 DCI.DAG.getConstant(65535, dl, MVT::i32)); in PerformPREDICATE_CASTCombine()
15158 return DCI.DAG.getNode(ISD::XOR, dl, VT, X, C); in PerformPREDICATE_CASTCombine()
15175 SDLoc dl(N); in PerformVECTOR_REG_CASTCombine() local
15179 return DAG.getNode(ISD::BITCAST, dl, VT, Op); in PerformVECTOR_REG_CASTCombine()
15190 return DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, VT, Op->getOperand(0)); in PerformVECTOR_REG_CASTCombine()
15206 SDLoc dl(N); in PerformVCMPCombine() local
15210 return DAG.getNode(ARMISD::VCMPZ, dl, VT, Op0, N->getOperand(2)); in PerformVCMPCombine()
15216 return DAG.getNode(ARMISD::VCMPZ, dl, VT, Op1, in PerformVCMPCombine()
15217 DAG.getConstant(SwappedCond, dl, MVT::i32)); in PerformVCMPCombine()
15220 return DAG.getNode(ARMISD::VCMP, dl, VT, Op1, Op0, in PerformVCMPCombine()
15221 DAG.getConstant(SwappedCond, dl, MVT::i32)); in PerformVCMPCombine()
15240 SDLoc dl(N); in PerformInsertEltCombine() local
15243 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, N->getOperand(0)); in PerformInsertEltCombine()
15244 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::f64, N->getOperand(1)); in PerformInsertEltCombine()
15248 SDValue InsElt = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, FloatVT, in PerformInsertEltCombine()
15250 return DAG.getNode(ISD::BITCAST, dl, VT, InsElt); in PerformInsertEltCombine()
15260 SDLoc dl(N); in PerformExtractEltToVMOVRRD() local
15309 ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, in PerformExtractEltToVMOVRRD()
15310 DCI.DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v2f64, Op0), in PerformExtractEltToVMOVRRD()
15311 DCI.DAG.getConstant(Ext.getConstantOperandVal(1) / 2, dl, MVT::i32)); in PerformExtractEltToVMOVRRD()
15313 DCI.DAG.getNode(ARMISD::VMOVRRD, dl, {MVT::i32, MVT::i32}, F64); in PerformExtractEltToVMOVRRD()
15324 SDLoc dl(N); in PerformExtractEltCombine() local
15330 return DCI.DAG.getNode(ARMISD::VMOVhr, dl, VT, X); in PerformExtractEltCombine()
15332 return DCI.DAG.getNode(ARMISD::VMOVrh, dl, VT, X); in PerformExtractEltCombine()
15334 return DCI.DAG.getNode(ISD::BITCAST, dl, VT, X); in PerformExtractEltCombine()
15373 return DCI.DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, Op0.getOperand(Vec), in PerformExtractEltCombine()
15374 DCI.DAG.getConstant(SubIdx, dl, MVT::i32)); in PerformExtractEltCombine()
15586 SDLoc dl(N); in TryCombineBaseUpdate() local
15848 Ops.push_back(DAG.getConstant(Alignment.value(), dl, MVT::i32)); in TryCombineBaseUpdate()
15854 StVal = DAG.getNode(ISD::BITCAST, dl, AlignedVecTy, StVal); in TryCombineBaseUpdate()
15858 SDValue UpdN = DAG.getMemIntrinsicNode(NewOpc, dl, SDTys, Ops, LoadVT, in TryCombineBaseUpdate()
15870 LdVal = DAG.getNode(ISD::BITCAST, dl, VecTy, LdVal); in TryCombineBaseUpdate()
16053 SDLoc dl(N); in PerformMVEVLDCombine() local
16149 SDValue UpdN = DAG.getMemIntrinsicNode(NewOpc, dl, SDTys, Ops, VecTy, in PerformMVEVLDCombine()
16296 SDLoc dl(N); in PerformVDUPCombine() local
16302 return DAG.getNode(ARMISD::VDUP, dl, N->getValueType(0), in PerformVDUPCombine()
16303 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op)); in PerformVDUPCombine()
16305 return DAG.getNode(ARMISD::VDUP, dl, N->getValueType(0), in PerformVDUPCombine()
16306 DAG.getNode(ARMISD::VMOVrh, dl, MVT::i32, Op)); in PerformVDUPCombine()
16655 SDLoc dl(StVal); in PerformSTORECombine() local
16659 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, IntVec); in PerformSTORECombine()
16660 SDValue ExtElt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, in PerformSTORECombine()
16662 dl = SDLoc(N); in PerformSTORECombine()
16663 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::i64, ExtElt); in PerformSTORECombine()
16668 return DAG.getStore(St->getChain(), dl, V, St->getBasePtr(), in PerformSTORECombine()
16723 SDLoc dl(N); in PerformVCVTCombine() local
16728 ISD::INTRINSIC_WO_CHAIN, dl, NumLanes == 2 ? MVT::v2i32 : MVT::v4i32, in PerformVCVTCombine()
16729 DAG.getConstant(IntrinsicOpcode, dl, MVT::i32), Op->getOperand(0), in PerformVCVTCombine()
16730 DAG.getConstant(C, dl, MVT::i32)); in PerformVCVTCombine()
16733 FixConv = DAG.getNode(ISD::TRUNCATE, dl, N->getValueType(0), FixConv); in PerformVCVTCombine()
16824 SDLoc dl(N); in PerformVDIVCombine() local
16829 dl, NumLanes == 2 ? MVT::v2i32 : MVT::v4i32, in PerformVDIVCombine()
16834 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, in PerformVDIVCombine()
16836 DAG.getConstant(IntrinsicOpcode, dl, MVT::i32), in PerformVDIVCombine()
16837 ConvInput, DAG.getConstant(C, dl, MVT::i32)); in PerformVDIVCombine()
16848 SDLoc dl(N); in PerformVECREDUCE_ADDCombine() local
16854 SDValue Red0 = DAG.getNode(ISD::VECREDUCE_ADD, dl, ResVT, N0.getOperand(0)); in PerformVECREDUCE_ADDCombine()
16855 SDValue Red1 = DAG.getNode(ISD::VECREDUCE_ADD, dl, ResVT, N0.getOperand(1)); in PerformVECREDUCE_ADDCombine()
16856 return DAG.getNode(ISD::ADD, dl, ResVT, Red0, Red1); in PerformVECREDUCE_ADDCombine()
16883 A = DAG.getNode(ExtendCode, dl, in PerformVECREDUCE_ADDCombine()
16988 DAG.getNode(IsUnsigned ? ARMISD::MVEZEXT : ARMISD::MVESEXT, dl, in PerformVECREDUCE_ADDCombine()
16991 DAG.getNode(IsUnsigned ? ARMISD::MVEZEXT : ARMISD::MVESEXT, dl, in PerformVECREDUCE_ADDCombine()
16994 SDValue MLA0 = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32), in PerformVECREDUCE_ADDCombine()
16997 DAG.getNode(IsUnsigned ? ARMISD::VMLALVAu : ARMISD::VMLALVAs, dl, in PerformVECREDUCE_ADDCombine()
17000 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, MLA1, MLA1.getValue(1)); in PerformVECREDUCE_ADDCombine()
17002 SDValue Node = DAG.getNode(Opcode, dl, {MVT::i32, MVT::i32}, Ops); in PerformVECREDUCE_ADDCombine()
17003 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Node, in PerformVECREDUCE_ADDCombine()
17010 return DAG.getNode(ARMISD::VMLAVs, dl, ResVT, A, B); in PerformVECREDUCE_ADDCombine()
17012 return DAG.getNode(ARMISD::VMLAVu, dl, ResVT, A, B); in PerformVECREDUCE_ADDCombine()
17020 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17021 DAG.getNode(ARMISD::VMLAVs, dl, MVT::i32, A, B)); in PerformVECREDUCE_ADDCombine()
17023 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17024 DAG.getNode(ARMISD::VMLAVu, dl, MVT::i32, A, B)); in PerformVECREDUCE_ADDCombine()
17028 return DAG.getNode(ARMISD::VMLAVps, dl, ResVT, A, B, Mask); in PerformVECREDUCE_ADDCombine()
17031 return DAG.getNode(ARMISD::VMLAVpu, dl, ResVT, A, B, Mask); in PerformVECREDUCE_ADDCombine()
17039 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17040 DAG.getNode(ARMISD::VMLAVps, dl, MVT::i32, A, B, Mask)); in PerformVECREDUCE_ADDCombine()
17042 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17043 DAG.getNode(ARMISD::VMLAVpu, dl, MVT::i32, A, B, Mask)); in PerformVECREDUCE_ADDCombine()
17046 return DAG.getNode(ARMISD::VADDVs, dl, ResVT, A); in PerformVECREDUCE_ADDCombine()
17048 return DAG.getNode(ARMISD::VADDVu, dl, ResVT, A); in PerformVECREDUCE_ADDCombine()
17054 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17055 DAG.getNode(ARMISD::VADDVs, dl, MVT::i32, A)); in PerformVECREDUCE_ADDCombine()
17057 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17058 DAG.getNode(ARMISD::VADDVu, dl, MVT::i32, A)); in PerformVECREDUCE_ADDCombine()
17061 return DAG.getNode(ARMISD::VADDVps, dl, ResVT, A, Mask); in PerformVECREDUCE_ADDCombine()
17063 return DAG.getNode(ARMISD::VADDVpu, dl, ResVT, A, Mask); in PerformVECREDUCE_ADDCombine()
17069 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17070 DAG.getNode(ARMISD::VADDVps, dl, MVT::i32, A, Mask)); in PerformVECREDUCE_ADDCombine()
17072 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
17073 DAG.getNode(ARMISD::VADDVpu, dl, MVT::i32, A, Mask)); in PerformVECREDUCE_ADDCombine()
17086 SDValue Ext = DAG.getNode(ISD::SIGN_EXTEND, dl, N0->getValueType(0), Mul); in PerformVECREDUCE_ADDCombine()
17088 Ext = DAG.getNode(ISD::VSELECT, dl, N0->getValueType(0), in PerformVECREDUCE_ADDCombine()
17090 return DAG.getNode(ISD::VECREDUCE_ADD, dl, ResVT, Ext); in PerformVECREDUCE_ADDCombine()
17305 SDLoc dl(N); in PerformIntrinsicCombine() local
17306 return DAG.getNode(VShiftOpc, dl, N->getValueType(0), in PerformIntrinsicCombine()
17307 N->getOperand(1), DAG.getConstant(Cnt, dl, MVT::i32)); in PerformIntrinsicCombine()
17323 SDLoc dl(N); in PerformIntrinsicCombine() local
17324 return DAG.getNode(VShiftOpc, dl, N->getValueType(0), in PerformIntrinsicCombine()
17326 DAG.getConstant(Cnt, dl, MVT::i32)); in PerformIntrinsicCombine()
17394 SDLoc dl(N); in PerformIntrinsicCombine() local
17395 SDValue val = DAG.getNode(Opc, dl, {MVT::i32, MVT::i32}, Ops); in PerformIntrinsicCombine()
17396 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, val.getValue(0), in PerformIntrinsicCombine()
17463 SDLoc dl(N); in PerformShiftCombine() local
17464 return DAG.getNode(ARMISD::VSHLIMM, dl, VT, N->getOperand(0), in PerformShiftCombine()
17465 DAG.getConstant(Cnt, dl, MVT::i32)); in PerformShiftCombine()
17474 SDLoc dl(N); in PerformShiftCombine() local
17475 return DAG.getNode(VShiftOpc, dl, VT, N->getOperand(0), in PerformShiftCombine()
17476 DAG.getConstant(Cnt, dl, MVT::i32)); in PerformShiftCombine()
17842 SDLoc dl(X); in PerformCMOVToBFICombine() local
17848 X = DAG.getNode(ISD::SRL, dl, VT, X, in PerformCMOVToBFICombine()
17849 DAG.getConstant(BitInX, dl, VT)); in PerformCMOVToBFICombine()
17858 V = DAG.getNode(ARMISD::BFI, dl, VT, V, X, in PerformCMOVToBFICombine()
17860 DAG.getConstant(~Mask, dl, VT)); in PerformCMOVToBFICombine()
17974 SDLoc dl(Int); in PerformHWLoopCombine() local
17992 SDValue Setup = DAG.getNode(ARMISD::WLSSETUP, dl, MVT::i32, Elements); in PerformHWLoopCombine()
17996 Res = DAG.getNode(ARMISD::WLS, dl, MVT::Other, Ops); in PerformHWLoopCombine()
18003 Res = DAG.getNode(ARMISD::WLS, dl, MVT::Other, Ops); in PerformHWLoopCombine()
18012 cast<ConstantSDNode>(Int.getOperand(3))->getZExtValue(), dl, MVT::i32); in PerformHWLoopCombine()
18014 SDValue LoopDec = DAG.getNode(ARMISD::LOOP_DEC, dl, in PerformHWLoopCombine()
18026 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, in PerformHWLoopCombine()
18030 return DAG.getNode(ARMISD::LE, dl, MVT::Other, EndArgs); in PerformHWLoopCombine()
18044 SDLoc dl(N); in PerformBRCONDCombine() local
18067 ARMISD::BRCOND, dl, VT, Chain, BB, LHS->getOperand(0)->getOperand(2), in PerformBRCONDCombine()
18084 SDLoc dl(N); in PerformCMOVCombine() local
18119 Res = DAG.getNode(ARMISD::CMOV, dl, VT, LHS, TrueVal, ARMcc, in PerformCMOVCombine()
18123 SDValue NewCmp = getARMCmp(LHS, RHS, ISD::SETNE, ARMcc, DAG, dl); in PerformCMOVCombine()
18124 Res = DAG.getNode(ARMISD::CMOV, dl, VT, LHS, FalseVal, ARMcc, in PerformCMOVCombine()
18137 return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, in PerformCMOVCombine()
18170 SDValue Sub = DAG.getNode(ISD::SUB, dl, VT, LHS, RHS); in PerformCMOVCombine()
18171 Res = DAG.getNode(ISD::SRL, dl, VT, DAG.getNode(ISD::CTLZ, dl, VT, Sub), in PerformCMOVCombine()
18172 DAG.getConstant(5, dl, MVT::i32)); in PerformCMOVCombine()
18183 SDValue Sub = DAG.getNode(ISD::SUB, dl, VT, LHS, RHS); in PerformCMOVCombine()
18185 SDValue Neg = DAG.getNode(ISD::USUBO, dl, VTs, FalseVal, Sub); in PerformCMOVCombine()
18189 DAG.getNode(ISD::SUB, dl, MVT::i32, in PerformCMOVCombine()
18190 DAG.getConstant(1, dl, MVT::i32), Neg.getValue(1)); in PerformCMOVCombine()
18191 Res = DAG.getNode(ISD::ADDCARRY, dl, VTs, Sub, Neg, Carry); in PerformCMOVCombine()
18198 DAG.getNode(ARMISD::SUBS, dl, DAG.getVTList(VT, MVT::i32), LHS, RHS); in PerformCMOVCombine()
18199 SDValue CPSRGlue = DAG.getCopyToReg(DAG.getEntryNode(), dl, ARM::CPSR, in PerformCMOVCombine()
18201 Res = DAG.getNode(ARMISD::CMOV, dl, VT, Sub, TrueVal, ARMcc, in PerformCMOVCombine()
18212 DAG.getNode(ARMISD::SUBS, dl, DAG.getVTList(VT, MVT::i32), LHS, RHS); in PerformCMOVCombine()
18213 SDValue CPSRGlue = DAG.getCopyToReg(DAG.getEntryNode(), dl, ARM::CPSR, in PerformCMOVCombine()
18215 Res = DAG.getNode(ARMISD::CMOV, dl, VT, Sub, FalseVal, in PerformCMOVCombine()
18216 DAG.getConstant(ARMCC::NE, dl, MVT::i32), in PerformCMOVCombine()
18244 TrueVal = DAG.getConstant(1, dl, VT); in PerformCMOVCombine()
18245 SDValue Subc = DAG.getNode(ISD::USUBO, dl, VTs, FalseVal, TrueVal); in PerformCMOVCombine()
18246 Res = DAG.getNode(ISD::SUBCARRY, dl, VTs, FalseVal, Subc, Subc.getValue(1)); in PerformCMOVCombine()
18249 Res = DAG.getNode(ISD::SHL, dl, VT, Res, in PerformCMOVCombine()
18250 DAG.getConstant(ShiftAmount, dl, MVT::i32)); in PerformCMOVCombine()
18257 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
18260 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
18263 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
20427 SDLoc dl(Op); in LowerDivRem() local
20441 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor); in LowerDivRem()
20442 SDValue Mul = DAG.getNode(ISD::MUL, dl, VT, Div, Divisor); in LowerDivRem()
20443 SDValue Rem = DAG.getNode(ISD::SUB, dl, VT, Dividend, Mul); in LowerDivRem()
20446 return DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(VT, VT), Values); in LowerDivRem()
20466 CLI.setDebugLoc(dl).setChain(InChain) in LowerDivRem()