Lines Matching refs:dl
568 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerFormalArguments() argument
576 return LowerCCCArguments(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals); in LowerFormalArguments()
588 SDLoc &dl = CLI.DL; in LowerCall() local
608 Outs, OutVals, Ins, dl, DAG, InVals); in LowerCall()
619 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCArguments() argument
655 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, RegVT); in LowerCCCArguments()
661 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerCCCArguments()
664 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerCCCArguments()
668 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerCCCArguments()
699 VA.getLocVT(), dl, Chain, FIN, in LowerCCCArguments()
715 SDValue Copy = DAG.getCopyToReg(DAG.getEntryNode(), dl, Reg, InVals[i]); in LowerCCCArguments()
716 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Copy, Chain); in LowerCCCArguments()
739 const SDLoc &dl, SelectionDAG &DAG) const { in LowerReturn() argument
765 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), in LowerReturn()
783 DAG.getCopyFromReg(Chain, dl, Reg, PtrVT); in LowerReturn()
786 Chain = DAG.getCopyToReg(Chain, dl, R12, Val, Flag); in LowerReturn()
800 return DAG.getNode(Opc, dl, MVT::Other, RetOps); in LowerReturn()
809 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCCCCallTo() argument
821 Chain = DAG.getCALLSEQ_START(Chain, NumBytes, 0, dl); in LowerCCCCallTo()
838 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
841 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
844 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
856 StackPtr = DAG.getCopyFromReg(Chain, dl, MSP430::SP, PtrVT); in LowerCCCCallTo()
859 DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, in LowerCCCCallTo()
860 DAG.getIntPtrConstant(VA.getLocMemOffset(), dl)); in LowerCCCCallTo()
866 SDValue SizeNode = DAG.getConstant(Flags.getByValSize(), dl, MVT::i16); in LowerCCCCallTo()
868 Chain, dl, PtrOff, Arg, SizeNode, Flags.getNonZeroByValAlign(), in LowerCCCCallTo()
873 MemOp = DAG.getStore(Chain, dl, Arg, PtrOff, MachinePointerInfo()); in LowerCCCCallTo()
883 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains); in LowerCCCCallTo()
890 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCCCCallTo()
899 Callee = DAG.getTargetGlobalAddress(G->getGlobal(), dl, MVT::i16); in LowerCCCCallTo()
918 Chain = DAG.getNode(MSP430ISD::CALL, dl, NodeTys, Ops); in LowerCCCCallTo()
922 Chain = DAG.getCALLSEQ_END(Chain, DAG.getConstant(NumBytes, dl, PtrVT, true), in LowerCCCCallTo()
923 DAG.getConstant(0, dl, PtrVT, true), InFlag, dl); in LowerCCCCallTo()
928 return LowerCallResult(Chain, InFlag, CallConv, isVarArg, Ins, dl, in LowerCCCCallTo()
937 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl, in LowerCallResult() argument
949 Chain = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(), in LowerCallResult()
963 SDLoc dl(N); in LowerShifts() local
981 Victim = DAG.getZeroExtendInReg(Victim, dl, MVT::i8); in LowerShifts()
982 Victim = DAG.getNode(ISD::BSWAP, dl, VT, Victim); in LowerShifts()
987 Victim = DAG.getNode(ISD::BSWAP, dl, VT, Victim); in LowerShifts()
989 ? DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, VT, Victim, in LowerShifts()
991 : DAG.getZeroExtendInReg(Victim, dl, MVT::i8); in LowerShifts()
1000 Victim = DAG.getNode(MSP430ISD::RRCL, dl, VT, Victim); in LowerShifts()
1006 dl, VT, Victim); in LowerShifts()
1024 SDLoc dl(Op); in LowerExternalSymbol() local
1029 return DAG.getNode(MSP430ISD::Wrapper, dl, PtrVT, Result); in LowerExternalSymbol()
1034 SDLoc dl(Op); in LowerBlockAddress() local
1039 return DAG.getNode(MSP430ISD::Wrapper, dl, PtrVT, Result); in LowerBlockAddress()
1043 ISD::CondCode CC, const SDLoc &dl, SelectionDAG &DAG) { in EmitCMP() argument
1073 RHS = DAG.getConstant(C->getSExtValue() + 1, dl, C->getValueType(0)); in EmitCMP()
1087 RHS = DAG.getConstant(C->getSExtValue() + 1, dl, C->getValueType(0)); in EmitCMP()
1101 RHS = DAG.getConstant(C->getSExtValue() + 1, dl, C->getValueType(0)); in EmitCMP()
1115 RHS = DAG.getConstant(C->getSExtValue() + 1, dl, C->getValueType(0)); in EmitCMP()
1123 TargetCC = DAG.getConstant(TCC, dl, MVT::i8); in EmitCMP()
1124 return DAG.getNode(MSP430ISD::CMP, dl, MVT::Glue, LHS, RHS); in EmitCMP()
1134 SDLoc dl (Op); in LowerBR_CC() local
1137 SDValue Flag = EmitCMP(LHS, RHS, TargetCC, CC, dl, DAG); in LowerBR_CC()
1139 return DAG.getNode(MSP430ISD::BR_CC, dl, Op.getValueType(), in LowerBR_CC()
1146 SDLoc dl (Op); in LowerSETCC() local
1164 SDValue Flag = EmitCMP(LHS, RHS, TargetCC, CC, dl, DAG); in LowerSETCC()
1200 SDValue One = DAG.getConstant(1, dl, VT); in LowerSETCC()
1202 SDValue SR = DAG.getCopyFromReg(DAG.getEntryNode(), dl, MSP430::SR, in LowerSETCC()
1206 SR = DAG.getNode(ISD::SRA, dl, MVT::i16, SR, One); in LowerSETCC()
1207 SR = DAG.getNode(ISD::AND, dl, MVT::i16, SR, One); in LowerSETCC()
1209 SR = DAG.getNode(ISD::XOR, dl, MVT::i16, SR, One); in LowerSETCC()
1212 SDValue Zero = DAG.getConstant(0, dl, VT); in LowerSETCC()
1214 return DAG.getNode(MSP430ISD::SELECT_CC, dl, Op.getValueType(), Ops); in LowerSETCC()
1225 SDLoc dl (Op); in LowerSELECT_CC() local
1228 SDValue Flag = EmitCMP(LHS, RHS, TargetCC, CC, dl, DAG); in LowerSELECT_CC()
1232 return DAG.getNode(MSP430ISD::SELECT_CC, dl, Op.getValueType(), Ops); in LowerSELECT_CC()
1239 SDLoc dl(Op); in LowerSIGN_EXTEND() local
1243 return DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, VT, in LowerSIGN_EXTEND()
1244 DAG.getNode(ISD::ANY_EXTEND, dl, VT, Val), in LowerSIGN_EXTEND()
1275 SDLoc dl(Op); in LowerRETURNADDR() local
1281 DAG.getConstant(PtrVT.getStoreSize(), dl, MVT::i16); in LowerRETURNADDR()
1282 return DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), in LowerRETURNADDR()
1283 DAG.getNode(ISD::ADD, dl, PtrVT, FrameAddr, Offset), in LowerRETURNADDR()
1289 return DAG.getLoad(PtrVT, dl, DAG.getEntryNode(), RetAddrFI, in LowerRETURNADDR()
1299 SDLoc dl(Op); // FIXME probably not meaningful in LowerFRAMEADDR() local
1301 SDValue FrameAddr = DAG.getCopyFromReg(DAG.getEntryNode(), dl, in LowerFRAMEADDR()
1304 FrameAddr = DAG.getLoad(VT, dl, DAG.getEntryNode(), FrameAddr, in LowerFRAMEADDR()
1430 DebugLoc dl = MI.getDebugLoc(); in EmitShiftInstr() local
1466 BuildMI(*BB, MI, dl, TII.get(MSP430::BIC16rc), MSP430::SR) in EmitShiftInstr()
1472 BuildMI(*BB, MI, dl, TII.get(RrcOpc), DstReg) in EmitShiftInstr()
1512 BuildMI(BB, dl, TII.get(MSP430::CMP8ri)) in EmitShiftInstr()
1514 BuildMI(BB, dl, TII.get(MSP430::JCC)) in EmitShiftInstr()
1523 BuildMI(LoopBB, dl, TII.get(MSP430::PHI), ShiftReg) in EmitShiftInstr()
1526 BuildMI(LoopBB, dl, TII.get(MSP430::PHI), ShiftAmtReg) in EmitShiftInstr()
1530 BuildMI(LoopBB, dl, TII.get(MSP430::BIC16rc), MSP430::SR) in EmitShiftInstr()
1533 BuildMI(LoopBB, dl, TII.get(Opc), ShiftReg2) in EmitShiftInstr()
1537 BuildMI(LoopBB, dl, TII.get(Opc), ShiftReg2) in EmitShiftInstr()
1539 BuildMI(LoopBB, dl, TII.get(MSP430::SUB8ri), ShiftAmtReg2) in EmitShiftInstr()
1541 BuildMI(LoopBB, dl, TII.get(MSP430::JCC)) in EmitShiftInstr()
1547 BuildMI(*RemBB, RemBB->begin(), dl, TII.get(MSP430::PHI), DstReg) in EmitShiftInstr()
1567 DebugLoc dl = MI.getDebugLoc(); in EmitInstrWithCustomInserter() local
1600 BuildMI(BB, dl, TII.get(MSP430::JCC)) in EmitInstrWithCustomInserter()
1616 BuildMI(*BB, BB->begin(), dl, TII.get(MSP430::PHI), MI.getOperand(0).getReg()) in EmitInstrWithCustomInserter()