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Searched refs:addLiveIn (Results 1 – 25 of 97) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsMachineFunction.cpp87 MF.getRegInfo().addLiveIn(Mips::T9_64); in initGlobalBaseReg()
88 MBB.addLiveIn(Mips::T9_64); in initGlobalBaseReg()
115 MF.getRegInfo().addLiveIn(Mips::T9); in initGlobalBaseReg()
116 MBB.addLiveIn(Mips::T9); in initGlobalBaseReg()
150 MF.getRegInfo().addLiveIn(Mips::V0); in initGlobalBaseReg()
151 MBB.addLiveIn(Mips::V0); in initGlobalBaseReg()
H A DMipsSEFrameLowering.cpp509 MBB.addLiveIn(ABI.GetEhDataReg(I)); in emitPrologue()
596 MBB.addLiveIn(Mips::COP013); in emitInterruptPrologueStub()
610 MBB.addLiveIn(Mips::COP014); in emitInterruptPrologueStub()
621 MBB.addLiveIn(Mips::COP012); in emitInterruptPrologueStub()
808 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
H A DMipsCallLowering.cpp109 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
110 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
427 MIRBuilder.getMBB().addLiveIn(ArgRegs[I]); in lowerFormalArguments()
H A DMips16FrameLowering.cpp131 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
/llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/
H A DSnippetRepetitor.cpp86 Loop.MBB->addLiveIn(LoopCounter); in Repeat()
88 Loop.MBB->addLiveIn(Reg); in Repeat()
90 Loop.MBB->addLiveIn(LiveIn); in Repeat()
H A DAssembler.cpp196 MF.getRegInfo().addLiveIn(Reg); in assembleToStream()
205 Entry.MBB->addLiveIn(Reg); in assembleToStream()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86IndirectThunks.cpp98 MF.front().addLiveIn(X86::R11); in populateThunk()
218 Entry->addLiveIn(ThunkReg); in populateThunk()
240 CallTarget->addLiveIn(ThunkReg); in populateThunk()
H A DX86CallLowering.cpp217 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
218 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
H A DX86FrameLowering.cpp1025 RoundMBB->addLiveIn(FinalReg); in emitStackProbeInlineWindowsCoreCLR64()
1042 LoopMBB->addLiveIn(JoinReg); in emitStackProbeInlineWindowsCoreCLR64()
1055 LoopMBB->addLiveIn(RoundedReg); in emitStackProbeInlineWindowsCoreCLR64()
1077 ContinueMBB->addLiveIn(SizeReg); in emitStackProbeInlineWindowsCoreCLR64()
1620 MBB.addLiveIn(Establisher); in emitPrologue()
1894 MBB.addLiveIn(Establisher); in emitPrologue()
2705 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
2741 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
2947 allocMBB->addLiveIn(LI); in adjustForSegmentedStacks()
2948 checkMBB->addLiveIn(LI); in adjustForSegmentedStacks()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp184 MF->getRegInfo().addLiveIn(GitPtrLo); in buildGitPtr()
185 MBB.addLiveIn(GitPtrLo); in buildGitPtr()
271 MRI.addLiveIn(FlatScratchInitReg); in emitEntryFunctionFlatScratchInit()
272 MBB.addLiveIn(FlatScratchInitReg); in emitEntryFunctionFlatScratchInit()
445 OtherBB.addLiveIn(ScratchRsrcReg); in emitEntryFunctionPrologue()
459 MRI.addLiveIn(PreloadedScratchRsrcReg); in emitEntryFunctionPrologue()
460 MBB.addLiveIn(PreloadedScratchRsrcReg); in emitEntryFunctionPrologue()
516 MRI.addLiveIn(PreloadedScratchWaveOffsetReg); in emitEntryFunctionPrologue()
883 MBB.addLiveIn(Reg); in emitPrologue()
1168 MBB.addLiveIn(Reg); in processFunctionBeforeFrameFinalized()
[all …]
H A DAMDGPUCallLowering.cpp147 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
447 MF.addLiveIn(PrivateSegmentBufferReg, &AMDGPU::SGPR_128RegClass); in allocateHSAUserSGPRs()
453 MF.addLiveIn(DispatchPtrReg, &AMDGPU::SGPR_64RegClass); in allocateHSAUserSGPRs()
459 MF.addLiveIn(QueuePtrReg, &AMDGPU::SGPR_64RegClass); in allocateHSAUserSGPRs()
468 MRI.addLiveIn(InputPtrReg, VReg); in allocateHSAUserSGPRs()
469 B.getMBB().addLiveIn(InputPtrReg); in allocateHSAUserSGPRs()
476 MF.addLiveIn(DispatchIDReg, &AMDGPU::SGPR_64RegClass); in allocateHSAUserSGPRs()
482 MF.addLiveIn(FlatScratchInitReg, &AMDGPU::SGPR_64RegClass); in allocateHSAUserSGPRs()
592 MF.addLiveIn(ImplicitBufferPtrReg, &AMDGPU::SGPR_64RegClass); in lowerFormalArguments()
599 MF.addLiveIn(FlatScratchInitReg, &AMDGPU::SGPR_64RegClass); in lowerFormalArguments()
H A DSILowerSGPRSpills.cpp191 EntryBB.addLiveIn(CSIReg.getReg()); in updateLiveness()
308 MBB.addLiveIn(SSpill.VGPR); in runOnMachineFunction()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/GISel/
H A DPPCCallLowering.cpp122 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
123 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZPostRewrite.cpp175 RestMBB->addLiveIn(R); in expandCondMove()
180 MoveMBB->addLiveIn(SrcReg); in expandCondMove()
182 MoveMBB->addLiveIn(R); in expandCondMove()
H A DSystemZFrameLowering.cpp321 MBB.addLiveIn(GPR64); in addSavedGPR()
371 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
376 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
659 MBBJ.addLiveIn(SystemZ::R11D); in emitPrologue()
1115 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
1120 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
1277 B.addLiveIn(Regs.getFramePointerRegister()); in emitPrologue()
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcFrameLowering.cpp237 MBB.addLiveIn(SP::O7); in emitEpilogue()
362 MBB.addLiveIn(reg - SP::I0_I1 + SP::O0_O1); in remapRegsForLeafProc()
368 MBB.addLiveIn(reg - SP::I0 + SP::O0); in remapRegsForLeafProc()
/llvm-project-15.0.7/llvm/lib/Target/MSP430/
H A DMSP430FrameLowering.cpp75 MBBJ.addLiveIn(MSP430::R4); in emitPrologue()
195 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
/llvm-project-15.0.7/llvm/lib/Target/M68k/GISel/
H A DM68kCallLowering.cpp130 MIRBuilder.getMRI()->addLiveIn(PhysReg); in assignValueToReg()
131 MIRBuilder.getMBB().addLiveIn(PhysReg); in assignValueToReg()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVRedundantCopyElimination.cpp154 MBB.addLiveIn(TargetReg); in optimizeBlock()
/llvm-project-15.0.7/llvm/lib/Target/XCore/
H A DXCoreFrameLowering.cpp263 MBB.addLiveIn(XCore::LR); in emitPrologue()
288 MBB.addLiveIn(SpillList[i].Reg); in emitPrologue()
436 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonCFGOptimizer.cpp228 LayoutSucc->addLiveIn(NewLI); in runOnMachineFunction()
/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRFrameLowering.cpp110 MBBJ.addLiveIn(AVR::R29R28); in emitPrologue()
259 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DMachineBasicBlock.h377 void addLiveIn(MCRegister PhysReg,
381 void addLiveIn(const RegisterMaskPair &RegMaskPair) {
396 Register addLiveIn(MCRegister PhysReg, const TargetRegisterClass *RC);
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DImplicitNullChecks.cpp789 MBB->addLiveIn(Reg); in rewriteNullChecks()
797 NC.getNotNullSucc()->addLiveIn(MO.getReg()); in rewriteNullChecks()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp211 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
212 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
514 Register X8VReg = MF.addLiveIn(AArch64::X8, &AArch64::GPR64RegClass); in handleMustTailForwardedRegisters()
520 MBB.addLiveIn(F.PReg); in handleMustTailForwardedRegisters()

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