| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXFMAMutate.cpp | 285 MachineOperand &UseMO = *UI; in processBlock() local 286 MachineInstr *UseMI = UseMO.getParent(); in processBlock() 293 UseMO.substVirtReg(KilledProdReg, KilledProdSubReg, *TRI); in processBlock()
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TailDuplicator.cpp | 216 for (MachineOperand &UseMO : in tailDuplicateAndUpdate() 218 MachineInstr *UseMI = UseMO.getParent(); in tailDuplicateAndUpdate() 224 DebugUses.push_back(&UseMO); in tailDuplicateAndUpdate() 229 SSAUpdate.RewriteUse(UseMO); in tailDuplicateAndUpdate() 231 for (auto *UseMO : DebugUses) { in tailDuplicateAndUpdate() local 232 MachineInstr *UseMI = UseMO->getParent(); in tailDuplicateAndUpdate() 233 UseMO->setReg( in tailDuplicateAndUpdate()
|
| H A D | PeepholeOptimizer.cpp | 503 for (MachineOperand &UseMO : MRI->use_nodbg_operands(SrcReg)) { in INITIALIZE_PASS_DEPENDENCY() 504 MachineInstr *UseMI = UseMO.getParent(); in INITIALIZE_PASS_DEPENDENCY() 514 if (UseSrcSubIdx && UseMO.getSubReg() != SubIdx) in INITIALIZE_PASS_DEPENDENCY() 541 Uses.push_back(&UseMO); in INITIALIZE_PASS_DEPENDENCY() 545 Uses.push_back(&UseMO); in INITIALIZE_PASS_DEPENDENCY() 549 ExtendedUses.push_back(&UseMO); in INITIALIZE_PASS_DEPENDENCY() 576 MachineOperand *UseMO = Uses[i]; in INITIALIZE_PASS_DEPENDENCY() local 577 MachineInstr *UseMI = UseMO->getParent(); in INITIALIZE_PASS_DEPENDENCY() 610 UseMO->setSubReg(0); in INITIALIZE_PASS_DEPENDENCY() 612 UseMO->setReg(NewVR); in INITIALIZE_PASS_DEPENDENCY()
|
| H A D | MachineCombiner.cpp | 287 MachineInstr *UseMO = RI->getParent(); in getLatency() local 289 if (UseMO && BlockTrace.isDepInTrace(*Root, *UseMO)) { in getLatency() 291 NewRoot, NewRoot->findRegisterDefOperandIdx(MO.getReg()), UseMO, in getLatency() 292 UseMO->findRegisterUseOperandIdx(MO.getReg())); in getLatency()
|
| H A D | LiveVariables.cpp | 694 for (auto &UseMO : MRI->use_nodbg_operands(Reg)) { in recomputeForSingleDefVirtReg() local 695 UseMO.setIsKill(false); in recomputeForSingleDefVirtReg() 696 MachineInstr &UseMI = *UseMO.getParent(); in recomputeForSingleDefVirtReg() 702 unsigned Idx = UseMI.getOperandNo(&UseMO); in recomputeForSingleDefVirtReg()
|
| H A D | MachineInstr.cpp | 1054 MachineOperand &UseMO = getOperand(UseIdx); in tieOperands() local 1056 assert(UseMO.isUse() && "UseIdx must be a use operand"); in tieOperands() 1058 assert(!UseMO.isTied() && "Use is already tied to another def"); in tieOperands() 1061 UseMO.TiedTo = DefIdx + 1; in tieOperands() 1069 UseMO.TiedTo = TiedMax; in tieOperands() 1094 const MachineOperand &UseMO = getOperand(i); in findTiedOperandIdx() local 1095 if (UseMO.isReg() && UseMO.isUse() && UseMO.TiedTo == OpIdx + 1) in findTiedOperandIdx()
|
| H A D | RegisterCoalescer.cpp | 935 for (MachineOperand &UseMO : in removeCopyByCommutingDef() 937 if (UseMO.isUndef()) in removeCopyByCommutingDef() 939 MachineInstr *UseMI = UseMO.getParent(); in removeCopyByCommutingDef() 943 UseMO.setReg(NewReg); in removeCopyByCommutingDef() 952 UseMO.setIsKill(false); in removeCopyByCommutingDef() 954 UseMO.substPhysReg(NewReg, *TRI); in removeCopyByCommutingDef() 956 UseMO.setReg(NewReg); in removeCopyByCommutingDef() 1572 for (MachineOperand &UseMO : in reMaterializeTrivialDef() 1577 UseMO.substPhysReg(DstReg, *TRI); in reMaterializeTrivialDef() 1579 UseMO.setReg(DstReg); in reMaterializeTrivialDef() [all …]
|
| H A D | TwoAddressInstructionPass.cpp | 1875 MachineOperand &UseMO = MI.getOperand(i); in eliminateRegSequence() local 1876 Register SrcReg = UseMO.getReg(); in eliminateRegSequence() 1879 if (UseMO.isUndef()) in eliminateRegSequence() 1884 bool isKill = UseMO.isKill(); in eliminateRegSequence() 1889 UseMO.setIsKill(false); in eliminateRegSequence() 1898 .add(UseMO); in eliminateRegSequence()
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86LoadValueInjectionLoadHardening.cpp | 396 MachineOperand &UseMO = Use.Addr->getOp(); in getGadgetGraph() local 397 MachineInstr &UseMI = *UseMO.getParent(); in getGadgetGraph() 398 assert(UseMO.isReg()); in getGadgetGraph() 408 if (instrUsesRegToAccessMemory(UseMI, UseMO.getReg()) || in getGadgetGraph() 410 instrUsesRegToBranch(UseMI, UseMO.getReg()))) { in getGadgetGraph()
|
| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 454 MachineOperand &UseMO)> in InsertInsnsWithoutSideEffectsBeforeUse() 456 MachineInstr &UseMI = *UseMO.getParent(); in InsertInsnsWithoutSideEffectsBeforeUse() 462 MachineOperand *PredBB = std::next(&UseMO); in InsertInsnsWithoutSideEffectsBeforeUse() 576 Observer.changingInstr(*UseMO.getParent()); in applyCombineExtendingLoads() 578 Observer.changedInstr(*UseMO.getParent()); in applyCombineExtendingLoads() 586 replaceRegOpWith(MRI, UseMO, NewDstReg); in applyCombineExtendingLoads() 601 Uses.push_back(&UseMO); in applyCombineExtendingLoads() 603 for (auto *UseMO : Uses) { in applyCombineExtendingLoads() local 604 MachineInstr *UseMI = UseMO->getParent(); in applyCombineExtendingLoads() 626 UseMO->getParent()->eraseFromParent(); in applyCombineExtendingLoads() [all …]
|
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIPeepholeSDWA.cpp | 270 for (MachineOperand &UseMO : MRI->use_nodbg_operands(Reg->getReg())) { in findSingleRegUse() 272 if (!isSameReg(UseMO, *Reg)) in findSingleRegUse() 277 ResMO = &UseMO; in findSingleRegUse() 278 } else if (ResMO->getParent() != UseMO.getParent()) { in findSingleRegUse()
|
| H A D | SIInstrInfo.h | 819 const MachineOperand &UseMO, in isInlineConstant() argument 821 assert(UseMO.getParent() == &MI); in isInlineConstant() 822 int OpIdx = MI.getOperandNo(&UseMO); in isInlineConstant()
|
| H A D | SIFoldOperands.cpp | 463 const MachineOperand &UseMO) { in isUseSafeToFold() argument 464 if (UseMO.isUndef() || TII->isSDWA(MI)) in isUseSafeToFold()
|
| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVInsertVSETVLI.cpp | 809 const MachineOperand &UseMO = MI.getOperand(UseOpIdx); in computeInfoForInstr() local 810 MachineInstr *UseMI = MRI->getVRegDef(UseMO.getReg()); in computeInfoForInstr()
|
| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 4309 const MachineOperand &UseMO = UseMI.getOperand(UseIdx); in getOperandLatency() local 4310 if (UseMO.isImplicit()) { in getOperandLatency() 4311 for (MCSuperRegIterator SR(UseMO.getReg(), &HRI); SR.isValid(); ++SR) { in getOperandLatency()
|