| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | CodeGenInstruction.cpp | 746 for (unsigned SubOp = 0; SubOp != NumSubOps; ++SubOp) { in CodeGenInstAlias() local
747 Record *SubRec = cast<DefInit>(MIOI->getArg(SubOp))->getDef(); in CodeGenInstAlias()
753 MIOI->getArgName(SubOp)->getAsUnquotedString(), SubRec); in CodeGenInstAlias()
754 ResultInstOperandIndex.push_back(std::make_pair(i, SubOp)); in CodeGenInstAlias()
765 for (unsigned SubOp = 0; SubOp != NumSubOps; ++SubOp) { in CodeGenInstAlias() local
768 Record *SubRec = cast<DefInit>(MIOI->getArg(SubOp))->getDef(); in CodeGenInstAlias()
772 ResultInstOperandIndex.push_back(std::make_pair(i, SubOp)); in CodeGenInstAlias()
777 (SubOp == 0 ? InstOpRec->getName() :SubRec->getName())); in CodeGenInstAlias()
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| /llvm-project-15.0.7/mlir/lib/Conversion/MemRefToLLVM/ |
| H A D | AllocLikeConversion.cpp | 18 Value bump = rewriter.create<LLVM::SubOp>(loc, alignment, one); in createAligned()
21 return rewriter.create<LLVM::SubOp>(loc, bumped, mod); in createAligned()
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| H A D | MemRefToLLVM.cpp | 1258 rewriter.create<LLVM::SubOp>(loc, resultRank, oneIndex); in convertSourceMemRefToDescriptor()
1301 Value decrement = rewriter.create<LLVM::SubOp>(loc, indexArg, oneIndex); in convertSourceMemRefToDescriptor()
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| /llvm-project-15.0.7/mlir/lib/Dialect/Complex/IR/ |
| H A D | ComplexOps.cpp | 115 if (auto sub = getLhs().getDefiningOp<SubOp>()) in fold()
120 if (auto sub = getRhs().getDefiningOp<SubOp>()) in fold()
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| /llvm-project-15.0.7/mlir/lib/Conversion/ComplexToLLVM/ |
| H A D | ComplexToLLVM.cpp | 273 struct SubOpConversion : public ConvertOpToLLVMPattern<complex::SubOp> {
274 using ConvertOpToLLVMPattern<complex::SubOp>::ConvertOpToLLVMPattern;
277 matchAndRewrite(complex::SubOp op, OpAdaptor adaptor, in matchAndRewrite()
281 unpackBinaryComplexOperands<complex::SubOp>(op, adaptor, rewriter); in matchAndRewrite()
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| /llvm-project-15.0.7/mlir/lib/Conversion/GPUToNVVM/ |
| H A D | LowerGpuOpsToNVVMOps.cpp | 98 Value numLeadInactiveLane = rewriter.create<LLVM::SubOp>( in matchAndRewrite()
110 rewriter.create<LLVM::SubOp>(loc, int32Type, adaptor.width(), one); in matchAndRewrite()
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| /llvm-project-15.0.7/llvm/lib/TableGen/ |
| H A D | SetTheory.cpp | 46 struct SubOp : public SetTheory::Operator { struct
258 addOperator("sub", std::make_unique<SubOp>()); in SetTheory()
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| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSelect.cpp | 1772 Instruction *AddOp = nullptr, *SubOp = nullptr; in foldAddSubSelect() local
1778 SubOp = TI; in foldAddSubSelect()
1784 SubOp = FI; in foldAddSubSelect()
1789 if (SubOp->getOperand(0) == AddOp->getOperand(0)) { in foldAddSubSelect()
1791 } else if (SubOp->getOperand(0) == AddOp->getOperand(1)) { in foldAddSubSelect()
1800 NegVal = Builder.CreateFNeg(SubOp->getOperand(1)); in foldAddSubSelect()
1803 Flags &= SubOp->getFastMathFlags(); in foldAddSubSelect()
1807 NegVal = Builder.CreateNeg(SubOp->getOperand(1)); in foldAddSubSelect()
1819 BinaryOperator::CreateFAdd(SubOp->getOperand(0), NewSel); in foldAddSubSelect()
1822 Flags &= SubOp->getFastMathFlags(); in foldAddSubSelect()
[all …]
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| /llvm-project-15.0.7/mlir/lib/Dialect/Tosa/Transforms/ |
| H A D | TosaMakeBroadcastable.cpp | 246 patterns.add<ConvertTosaOp<tosa::SubOp>>(ctx); in runOnOperation()
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| /llvm-project-15.0.7/mlir/lib/Conversion/ArithmeticToLLVM/ |
| H A D | ArithmeticToLLVM.cpp | 26 using SubIOpLowering = VectorConvertToLLVMPattern<arith::SubIOp, LLVM::SubOp>;
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| /llvm-project-15.0.7/mlir/include/mlir/Dialect/Complex/IR/ |
| H A D | ComplexOps.td | 520 // SubOp
523 def SubOp : ComplexArithmeticOp<"sub"> {
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 1099 unsigned SubOp = AMDGPU::V_SUB_CO_U32_e32; in SelectDS1Addr1Offset() local
1101 SubOp = AMDGPU::V_SUB_U32_e64; in SelectDS1Addr1Offset()
1107 CurDAG->getMachineNode(SubOp, DL, MVT::i32, Opnds); in SelectDS1Addr1Offset()
1209 unsigned SubOp = AMDGPU::V_SUB_CO_U32_e32; in SelectDSReadWrite2() local
1211 SubOp = AMDGPU::V_SUB_U32_e64; in SelectDSReadWrite2()
1217 SubOp, DL, MVT::getIntegerVT(Size * 8), Opnds); in SelectDSReadWrite2()
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| /llvm-project-15.0.7/mlir/lib/Conversion/AsyncToLLVM/ |
| H A D | AsyncToLLVM.cpp | 358 rewriter.create<LLVM::SubOp>(op->getLoc(), coroSize, makeConstant(1)); in matchAndRewrite()
360 rewriter.create<LLVM::SubOp>(op->getLoc(), makeConstant(0), coroAlign); in matchAndRewrite()
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| /llvm-project-15.0.7/mlir/lib/Dialect/SparseTensor/Utils/ |
| H A D | Merger.cpp | 994 if (isa<complex::SubOp>(def)) in buildTensorExp()
1175 return rewriter.create<complex::SubOp>(loc, v0, v1); in buildExp()
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| /llvm-project-15.0.7/mlir/python/mlir/dialects/linalg/opdsl/lang/ |
| H A D | emitter.py | 431 return complex.SubOp(lhs, rhs).result
|
| /llvm-project-15.0.7/flang/lib/Optimizer/CodeGen/ |
| H A D | CodeGen.cpp | 1501 mlir::Value extent = rewriter.create<mlir::LLVM::SubOp>(loc, type, ub, lb); in computeTripletExtent()
1624 auto ao = rewriter.create<mlir::LLVM::SubOp>(loc, i64Ty, off, adj); in matchAndRewrite()
1869 rewriter.create<mlir::LLVM::SubOp>(loc, idxTy, sliceLb, sliceOrigin); in sliceBox()
2179 auto idx = rewriter.create<mlir::LLVM::SubOp>(loc, idxTy, index, lb); in doRewrite()
2185 auto adj = rewriter.create<mlir::LLVM::SubOp>(loc, idxTy, sliceLb, lb); in doRewrite()
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| /llvm-project-15.0.7/mlir/lib/Conversion/SPIRVToLLVM/ |
| H A D | SPIRVToLLVM.cpp | 468 rewriter.create<LLVM::SubOp>(loc, dstType, size, countPlusOffset); in matchAndRewrite()
1450 DirectConversionPattern<spirv::ISubOp, LLVM::SubOp>, in populateSPIRVToLLVMConversionPatterns()
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| /llvm-project-15.0.7/mlir/lib/Conversion/TosaToLinalg/ |
| H A D | TosaToLinalg.cpp | 72 if (isa<tosa::SubOp>(op) && elementTy.isa<FloatType>()) in createLinalgBodyCalculationForElementwiseOp()
75 if (isa<tosa::SubOp>(op) && elementTy.isa<IntegerType>()) in createLinalgBodyCalculationForElementwiseOp()
2227 PointwiseConverter<tosa::SubOp>, in populateTosaToLinalgConversionPatterns()
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| /llvm-project-15.0.7/mlir/lib/Dialect/Tosa/IR/ |
| H A D | TosaOps.cpp | 966 NARY_SHAPE_INFER(tosa::SubOp) in NARY_SHAPE_INFER()
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| /llvm-project-15.0.7/mlir/lib/Target/LLVMIR/Dialect/OpenMP/ |
| H A D | OpenMPToLLVMIRTranslation.cpp | 1047 .Case([&](LLVM::SubOp) { return llvm::AtomicRMWInst::BinOp::Sub; }) in convertBinOpToAtomic() argument
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| /llvm-project-15.0.7/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 1935 SDValue SubOp = Node->getOperand(i); in LowerCONCAT_VECTORS() local
1936 EVT VVT = SubOp.getNode()->getValueType(0); in LowerCONCAT_VECTORS()
1940 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, SubOp, in LowerCONCAT_VECTORS()
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| /llvm-project-15.0.7/mlir/lib/Dialect/Linalg/IR/ |
| H A D | LinalgOps.cpp | 344 return builder.create<complex::SubOp>(arg0.getLoc(), arg0, arg1); in buildBinaryFn()
|
| /llvm-project-15.0.7/mlir/lib/Conversion/ComplexToStandard/ |
| H A D | ComplexToStandard.cpp | 1042 BinaryComplexOpConversion<complex::SubOp, arith::SubFOp>, in populateComplexToStandardConversionPatterns()
|
| /llvm-project-15.0.7/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 4190 unsigned SubOp; in expandDivRem() local
4195 SubOp = Mips::DSUB; in expandDivRem()
4199 SubOp = Mips::SUB; in expandDivRem()
4235 TOut.emitRRR(SubOp, RdReg, ZeroReg, RsReg, IDLoc, STI); in expandDivRem()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 3008 SDValue SubOp = Op.getOperand(i); in SimplifyDemandedVectorElts() local
3011 if (SimplifyDemandedVectorElts(SubOp, SubElts, SubUndef, SubZero, TLO, in SimplifyDemandedVectorElts()
3023 SDValue SubOp = Op.getOperand(i); in SimplifyDemandedVectorElts() local
3026 SubOp, SubElts, TLO.DAG, Depth + 1); in SimplifyDemandedVectorElts()
3027 DemandedSubOps.push_back(NewSubOp ? NewSubOp : SubOp); in SimplifyDemandedVectorElts()
|