| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | convert-rr-to-ri-instrs-kill-flag.mir | 13 ; CHECK: STFS killed $f1, 100, $x5 31 ; CHECK: STFS killed $f1, 100, killed $x5 48 ; CHECK: STFS killed $f1, 100, $x5 84 ; CHECK: STFS killed $f1, 100, killed $x5 101 ; CHECK: STFS killed $f1, 100, $x5 120 ; CHECK: STFS killed $f1, 100, killed $x5 140 ; CHECK: STFS killed $f1, 100, killed $x5 180 ; CHECK: STFS killed $f1, 100, killed $x5
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| H A D | convert-rr-to-ri-instr-add.mir | 4 # ADDI8 + STFSX can be converted to ADDI8 + STFS even ADDI8 can not be erased. 13 ; CHECK: STFS killed $f1, 100, $x5 32 ; CHECK: STFS killed $f1, 100, $x5
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| H A D | fusion-load-store.ll | 168 ; CHECK: SU([[SU0]]): STFS renamable $f[[REG:[0-9]+]], 12 169 ; CHECK: SU([[SU1]]): STFS renamable $f[[REG]], 4 170 ; CHECK: SU([[SU2]]): STFS renamable $f[[REG]], 8 171 ; CHECK: SU([[SU3]]): STFS renamable $f[[REG]], 16
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| H A D | aix-cc-abi.ll | 916 ; 32BIT-NEXT: STFS renamable $f1, 0, %stack.[[SLOT:[0-9]+]] :: (store (s32) into %stack.[[SLOT]]) 934 ; 64BIT-NEXT: STFS renamable $f1, 0, %stack.[[SLOT:[0-9]+]] :: (store (s32) into %stack.[[SLOT]]) 1111 ; 32BIT-DAG: STFS renamable $f1, 56, $r1 :: (store (s32)) 1152 ; 64BIT-DAG: STFS renamable $f1, 112, $x1 :: (store (s32)) 1282 ; 32BIT-DAG: STFS renamable $f2, 60, $r1 :: (store (s32)) 1325 ; 64BIT-DAG: STFS renamable $f2, 112, $x1 :: (store (s32))
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| H A D | convert-rr-to-ri-instrs.mir | 5812 ; CHECK: STFS %1, 400, %0 5819 ; CHECK: STFS %1, -401, %0
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| /llvm-project-15.0.7/lld/ELF/Arch/ |
| H A D | PPCInsns.def | 22 PCREL_OPT(STFS, PSTFS, OPC_AND_RST);
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| H A D | PPC64.cpp | 88 STFS = 0xd0000000, enumerator
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 162 PPC::STW, PPC::STD, PPC::STFD, PPC::STFS, PPC::SPILL_CR, PPC::SPILL_CRBIT, \ 170 PPC::STW, PPC::STD, PPC::STFD, PPC::STFS, PPC::SPILL_CR, PPC::SPILL_CRBIT, \ 178 PPC::STW, PPC::STD, PPC::STFD, PPC::STFS, PPC::SPILL_CR, PPC::SPILL_CRBIT, \
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| H A D | PPCPreEmitPeephole.cpp | 86 case PPC::STFS: in hasPCRelativeForm()
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| H A D | PPCFastISel.cpp | 646 Opc = Subtarget->hasSPE() ? PPC::SPESTW : PPC::STFS; in PPCEmitStore() 662 bool Is32VSXStore = IsVSSRC && Opc == PPC::STFS; in PPCEmitStore() 712 case PPC::STFS: Opc = IsVSSRC ? PPC::STXSSPX : PPC::STFSX; break; in PPCEmitStore()
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| H A D | PPCInstrInfo.cpp | 2950 LowerOpcode = PPC::STFS; in expandVSXMemPseudo() 4161 case PPC::STFSX: III.ImmOpcode = PPC::STFS; break; in instrHasImmForm() 4289 III.ImmOpcode = PPC::STFS; in instrHasImmForm()
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| H A D | PPCRegisterInfo.cpp | 109 ImmToIdxMap[PPC::STFS] = PPC::STFSX; ImmToIdxMap[PPC::STFD] = PPC::STFDX; in PPCRegisterInfo()
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| H A D | P10InstrResources.td | 1813 STFS,
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| H A D | PPCISelDAGToDAG.cpp | 7331 case PPC::STFS: in PeepholePPC64()
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| H A D | PPCInstrInfo.td | 1953 def STFS : DForm_1<52, (outs), (ins f4rc:$rS, memri:$dst),
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