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Searched refs:SETO (Results 1 – 25 of 32) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/LoongArch/
H A DLoongArchFloat32InstrInfo.td162 def : PatFPSetcc<SETO, FCMP_COR_S, FPR32>;
187 def : PatFPSelectcc<SETO, FCMP_COR_S, FSEL_S, FPR32>;
H A DLoongArchFloat64InstrInfo.td166 def : PatFPSetcc<SETO, FCMP_COR_D, FPR64>;
187 def : PatFPSelectcc<SETO, FCMP_COR_D, FSEL_D, FPR64>;
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h1433 SETO, // 0 1 1 1 True if ordered (no nans) enumerator
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYInstrInfoF2.td360 defm : BRCond_Bin_F2<SETO, "f2FCMPUO", BF32, MVCV32, 1>;
436 def : Pat<(brcond (i32 (setcc FPR32Op:$rs1, fpimm, SETO)), bb:$imm16),
438 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm, SETO)),
440 def : Pat<(select (i32 (setcc FPR32Op:$rs1, fpimm, SETO)), FPR32Op:$rx, FPR32Op:$false),
H A DCSKYInstrInfoF1.td340 defm : BRCond_Bin<SETO, "FCMPUO", BF32, MVCV32>;
382 def : Pat<(brcond (i32 (setcc sFPR32Op:$rs1, fpimm, SETO)), bb:$imm16),
384 def : Pat<(i32 (setcc sFPR32Op:$rs1, fpimm, SETO)),
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEISelDAGToDAG.cpp80 case ISD::SETO: in fpCondCode2Fcc()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DAnalysis.cpp196 case FCmpInst::FCMP_ORD: return ISD::SETO; in getFCmpCondCode()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp453 case ISD::SETO: return "seto"; in getOperationName()
H A DTargetLowering.cpp352 case ISD::SETO: in softenSetCCOperands()
4837 if (Cond == ISD::SETO || Cond == ISD::SETUO) in SimplifySetCC()
4887 ISD::CondCode NewCond = UOF == 0 ? ISD::SETO : ISD::SETUO; in SimplifySetCC()
7667 IsInverted ? ISD::SETO : ISD::SETUO); in expandIS_FPCLASS()
9761 case ISD::SETO: in LegalizeSetCCCondCode()
9774 CC2 = ((unsigned)CCCode & 0x8U) ? ISD::SETUO : ISD::SETO; in LegalizeSetCCCondCode()
9799 CC2 = ((unsigned)CCCode & 0x8U) ? ISD::SETUO : ISD::SETO; in LegalizeSetCCCondCode()
9818 if (CCCode != ISD::SETO && CCCode != ISD::SETUO) { in LegalizeSetCCCondCode()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructions.td331 def COND_O : PatFrags<(ops), [(OtherVT SETO)]>;
H A DSIWholeQuadMode.cpp848 case ISD::SETO: in lowerKillF32()
H A DR600ISelLowering.cpp86 setCondCodeAction({ISD::SETO, ISD::SETUO, ISD::SETLT, ISD::SETLE, ISD::SETOLT, in R600TargetLowering()
H A DSIISelLowering.cpp9644 if (LCC == ISD::SETO) { in performAndCombine()
9682 if ((LCC == ISD::SETO || LCC == ISD::SETUO) && Mask && in performAndCombine()
9686 unsigned NewMask = LCC == ISD::SETO ? in performAndCombine()
H A DAMDGPUISelLowering.cpp1318 case ISD::SETO: in combineFMinMaxLegacy()
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp863 case ISD::SETO: in IntCondCCodeToICC()
/llvm-project-15.0.7/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td748 def SETO : CondCode<"FCMP_ORD">;
1358 (setcc node:$lhs, node:$rhs, SETO)>;
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp119 for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE, in WebAssemblyTargetLowering()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp2222 case ISD::SETO##X: return SystemZ::CCMASK_CMP_##X; \ in CCMaskForCondCode()
2236 case ISD::SETO: return SystemZ::CCMASK_CMP_O; in CCMaskForCondCode()
3041 case ISD::SETO: { in lowerVectorSETCC()
/llvm-project-15.0.7/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp555 case ISD::SETO: in getPTXCmpMode()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp4142 case ISD::SETO: return PPC::PRED_NU; in getPredicateForSetCC()
4170 case ISD::SETO: Invert = true; return 3; // !Bit #3 = SETO in getCRIdxForSetCC()
H A DPPCInstrP10.td1898 defm : P10ReverseSetBool<(i1 (SetCC Ty:$s1, Ty:$s2, SETO)),
H A DPPCISelLowering.cpp647 setCondCodeAction(ISD::SETO, MVT::f32, Expand); in PPCTargetLowering()
648 setCondCodeAction(ISD::SETO, MVT::f64, Expand); in PPCTargetLowering()
974 setCondCodeAction(ISD::SETO, MVT::v4f32, Expand); in PPCTargetLowering()
1027 setCondCodeAction(ISD::SETO, MVT::v2f64, Expand); in PPCTargetLowering()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsMSAInstrInfo.td138 def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>;
139 def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>;
H A DMipsSEISelLowering.cpp1835 Op->getOperand(2), ISD::SETO); in lowerINTRINSIC_WO_CHAIN()
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1497 case ISD::SETO: return SPCC::FCC_O; in FPCondCCodeToFCC()

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