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Searched refs:RegsToPass (Results 1 – 25 of 28) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp295 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCall() local
324 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
352 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
353 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
354 RegsToPass[i].second, Glue); in LowerCall()
377 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
378 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
379 RegsToPass[i].second.getValueType())); in LowerCall()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMips16ISelLowering.h48 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
H A DMips16ISelLowering.cpp410 std::deque< std::pair<unsigned, SDValue> > &RegsToPass, in getOpndList()
489 RegsToPass.push_front(std::make_pair(V0Reg, Callee)); in getOpndList()
497 RegsToPass.push_front(std::make_pair((unsigned)Mips::T9, Callee)); in getOpndList()
502 MipsTargetLowering::getOpndList(Ops, RegsToPass, IsPICCall, GlobalOrExternal, in getOpndList()
H A DMipsSEISelLowering.h69 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
H A DMipsISelLowering.h491 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
581 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
H A DMipsISelLowering.cpp3039 std::deque<std::pair<unsigned, SDValue>> &RegsToPass, in getOpndList() argument
3065 for (auto &R : RegsToPass) { in getOpndList()
3072 for (auto &R : RegsToPass) in getOpndList()
3262 std::deque<std::pair<unsigned, SDValue>> RegsToPass; in LowerCall() local
3315 RegsToPass.push_back(std::make_pair(LocRegLo, Lo)); in LowerCall()
3316 RegsToPass.push_back(std::make_pair(LocRegHigh, Hi)); in LowerCall()
3355 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
3466 getOpndList(Ops, RegsToPass, IsPIC, GlobalOrExternal, InternalLinkage, in LowerCall()
4401 std::deque<std::pair<unsigned, SDValue>> &RegsToPass, in passByValArg() argument
4428 RegsToPass.push_back(std::make_pair(ArgReg, LoadVal)); in passByValArg()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp657 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCCCCallTo() local
691 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo()
719 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) { in LowerCCCCallTo()
720 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first, in LowerCCCCallTo()
721 RegsToPass[I].second, InFlag); in LowerCCCCallTo()
752 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) in LowerCCCCallTo()
753 Ops.push_back(DAG.getRegister(RegsToPass[I].first, in LowerCCCCallTo()
754 RegsToPass[I].second.getValueType())); in LowerCCCCallTo()
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp856 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall_32() local
989 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall_32()
1014 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall_32()
1015 Register Reg = RegsToPass[i].first; in LowerCall_32()
1041 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall_32()
1042 Register Reg = RegsToPass[i].first; in LowerCall_32()
1223 SmallVector<std::pair<Register, SDValue>, 8> RegsToPass; in LowerCall_64() local
1329 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall_64()
1331 RegsToPass[i].first, RegsToPass[i].second, InGlue); in LowerCall_64()
1351 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall_64()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp823 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCCCCallTo() local
851 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo()
889 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCCCCallTo()
890 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCCCCallTo()
891 RegsToPass[i].second, InFlag); in LowerCCCCallTo()
911 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCCCCallTo()
912 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCCCCallTo()
913 RegsToPass[i].second.getValueType())); in LowerCCCCallTo()
/llvm-project-15.0.7/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp415 SmallVector<std::pair<unsigned, SDValue>, MaxArgs> RegsToPass; in LowerCall() local
443 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
453 for (auto &Reg : RegsToPass) { in LowerCall()
479 for (auto &Reg : RegsToPass) in LowerCall()
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp559 SmallVector<std::pair<Register, SDValue>, 8> RegsToPass; in LowerCall() local
577 RegsToPass.push_back(std::make_pair(RegLo, Lo)); in LowerCall()
591 RegsToPass.push_back(std::make_pair(RegHigh, Hi)); in LowerCall()
604 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); in LowerCall()
630 for (auto &Reg : RegsToPass) { in LowerCall()
675 for (auto &Reg : RegsToPass) in LowerCall()
/llvm-project-15.0.7/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1135 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass; in LowerCCCCallTo() local
1161 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCCCCallTo()
1184 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCCCCallTo()
1185 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCCCCallTo()
1186 RegsToPass[i].second, InFlag); in LowerCCCCallTo()
1209 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCCCCallTo()
1210 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCCCCallTo()
1211 RegsToPass[i].second.getValueType())); in LowerCCCCallTo()
/llvm-project-15.0.7/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp957 SmallVector<std::pair<Register, SDValue>> RegsToPass; in LowerCall() local
969 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); in LowerCall()
978 for (auto &Reg : RegsToPass) { in LowerCall()
999 for (auto &Reg : RegsToPass) in LowerCall()
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEISelLowering.cpp620 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local
673 RegsToPass.push_back(std::make_pair(VE::SX12, Callee)); in LowerCall()
713 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
740 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
741 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[i].first, in LowerCall()
742 RegsToPass[i].second, InGlue); in LowerCall()
749 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
750 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
751 RegsToPass[i].second.getValueType())); in LowerCall()
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp581 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local
631 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
654 RegsToPass.push_back(std::make_pair(unsigned(F.PReg), Val)); in LowerCall()
721 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
722 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[i].first, in LowerCall()
723 RegsToPass[i].second, InFlag); in LowerCall()
782 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
783 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
784 RegsToPass[i].second.getValueType())); in LowerCall()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp5536 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in buildCallOperands()
5537 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in buildCallOperands()
5821 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall_32SVR4() local
5923 RegsToPass[i].second, InFlag); in LowerCall_32SVR4()
6155 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall_64SVR4() local
6537 RegsToPass[i].second, InFlag); in LowerCall_64SVR4()
7266 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall_AIX() local
7473 RegsToPass.push_back(std::make_pair( in LowerCall_AIX()
7483 RegsToPass.push_back(std::make_pair( in LowerCall_AIX()
7493 RegsToPass.push_back(std::make_pair( in LowerCall_AIX()
[all …]
H A DPPCISelLowering.h1325 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass,
/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1362 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local
1401 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
1437 for (auto Reg : RegsToPass) { in LowerCall()
1450 for (auto Reg : RegsToPass) { in LowerCall()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.h358 SmallVectorImpl<std::pair<unsigned, SDValue>> &RegsToPass,
H A DSIISelLowering.cpp2755 SmallVectorImpl<std::pair<unsigned, SDValue>> &RegsToPass, in passSpecialInputs() argument
2840 RegsToPass.emplace_back(OutgoingArg->getRegister(), InputReg); in passSpecialInputs()
2931 RegsToPass.emplace_back(OutgoingArg->getRegister(), InputReg); in passSpecialInputs()
3119 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass; in LowerCall() local
3129 passSpecialInputs(CLI, CCInfo, *Info, RegsToPass, MemOpChains, Chain); in LowerCall()
3162 RegsToPass.emplace_back(AMDGPU::SGPR0_SGPR1_SGPR2_SGPR3, ScratchRSrcReg); in LowerCall()
3199 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
3272 for (auto &RegToPass : RegsToPass) { in LowerCall()
3312 for (auto &RegToPass : RegsToPass) { in LowerCall()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp457 SmallVector<std::pair<unsigned, SDValue>, 16> RegsToPass; in LowerCall() local
521 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
546 for (const auto &R : RegsToPass) { in LowerCall()
562 for (const auto &R : RegsToPass) { in LowerCall()
590 for (const auto &R : RegsToPass) in LowerCall()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelLowering.h776 SDValue &Arg, RegsToPassVector &RegsToPass,
H A DARMISelLowering.cpp2284 RegsToPassVector &RegsToPass, in PassF64ArgInRegs() argument
2446 RegsToPassVector RegsToPass; in LowerCall() local
2517 PassF64ArgInRegs(dl, DAG, Chain, Op0, RegsToPass, VA, ArgLocs[++i], in LowerCall()
2547 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
2572 RegsToPass.push_back(std::make_pair(j, Load)); in LowerCall()
2618 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
2619 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
2620 RegsToPass[i].second, InFlag); in LowerCall()
2794 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
2795 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp1714 SmallVector<std::pair<unsigned, SDValue>, 9> RegsToPass; in LowerCall() local
1766 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); in LowerCall()
1794 RegsToPass.push_back(std::make_pair(SystemZ::R3D, ShadowArgValue)); in LowerCall()
1821 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) { in LowerCall()
1822 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first, in LowerCall()
1823 RegsToPass[I].second, Glue); in LowerCall()
1834 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) in LowerCall()
1835 Ops.push_back(DAG.getRegister(RegsToPass[I].first, in LowerCall()
1836 RegsToPass[I].second.getValueType())); in LowerCall()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp11223 SmallVector<std::pair<Register, SDValue>, 8> RegsToPass; in LowerCall() local
11241 RegsToPass.push_back(std::make_pair(RegLo, Lo)); in LowerCall()
11255 RegsToPass.push_back(std::make_pair(RegHigh, Hi)); in LowerCall()
11320 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); in LowerCall()
11346 for (auto &Reg : RegsToPass) { in LowerCall()
11354 validateCCReservedRegs(RegsToPass, MF); in LowerCall()
11389 for (auto &Reg : RegsToPass) in LowerCall()

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