Lines Matching refs:RegsToPass
2284 RegsToPassVector &RegsToPass, in PassF64ArgInRegs() argument
2293 RegsToPass.push_back(std::make_pair(VA.getLocReg(), fmrrd.getValue(id))); in PassF64ArgInRegs()
2296 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), fmrrd.getValue(1-id))); in PassF64ArgInRegs()
2446 RegsToPassVector RegsToPass; in LowerCall() local
2517 PassF64ArgInRegs(dl, DAG, Chain, Op0, RegsToPass, VA, ArgLocs[++i], in LowerCall()
2522 PassF64ArgInRegs(dl, DAG, Chain, Op1, RegsToPass, VA, ArgLocs[++i], in LowerCall()
2533 PassF64ArgInRegs(dl, DAG, Chain, Arg, RegsToPass, VA, ArgLocs[++i], in LowerCall()
2547 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
2572 RegsToPass.push_back(std::make_pair(j, Load)); in LowerCall()
2618 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { in LowerCall()
2619 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, in LowerCall()
2620 RegsToPass[i].second, InFlag); in LowerCall()
2794 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) in LowerCall()
2795 Ops.push_back(DAG.getRegister(RegsToPass[i].first, in LowerCall()
2796 RegsToPass[i].second.getValueType())); in LowerCall()