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/llvm-project-15.0.7/llvm/utils/TableGen/
H A DPredicateExpander.cpp131 for (const Record *Rec : Opcodes) { in expandCheckOpcode() local
137 expandCheckOpcode(OS, Rec); in expandCheckOpcode()
169 for (const Record *Rec : Sequence) { in expandPredicateSequence() local
174 expandPredicate(OS, Rec); in expandPredicateSequence()
234 expandPredicate(SS, Rec); in expandReturnStatement()
261 for (const Record *Rec : Cases) { in expandOpcodeSwitchStatement() local
262 expandOpcodeSwitchCase(SS, Rec); in expandOpcodeSwitchStatement()
299 if (Rec->isSubClassOf("MCTrue")) { in expandPredicate()
305 if (Rec->isSubClassOf("MCFalse")) { in expandPredicate()
363 if (Rec->isSubClassOf("CheckAll")) in expandPredicate()
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H A DPseudoLoweringEmitter.cpp94 PrintError(Rec, "In pseudo instruction '" + Rec->getName() + in addDagOperandMapping()
142 PrintError(Rec, "In pseudo instruction '" + Rec->getName() + in evaluateExpansion()
144 PrintFatalNote(Rec->getValue("ResultInst"), in evaluateExpansion()
149 PrintError(Rec, "In pseudo instruction '" + Rec->getName() + in evaluateExpansion()
152 PrintFatalNote(Rec->getValue("ResultInst"), in evaluateExpansion()
159 PrintError(Rec, "In pseudo instruction '" + Rec->getName() + in evaluateExpansion()
162 PrintFatalNote(Rec->getValue("ResultInst"), in evaluateExpansion()
167 PrintError(Rec, "In pseudo instruction '" + Rec->getName() + in evaluateExpansion()
170 PrintFatalNote(Rec->getValue("ResultInst"), in evaluateExpansion()
192 CodeGenInstruction SourceInsn(Rec); in evaluateExpansion()
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H A DCodeGenInstruction.cpp75 Record *Rec = Arg->getDef(); in CGIOperandList() local
87 } else if (Rec->isSubClassOf("Operand")) { in CGIOperandList()
107 if (Rec->isSubClassOf("PredicateOp")) in CGIOperandList()
234 Record *Rec) { in ParseConstraint() argument
252 Rec->getLoc(), "Operand '" + Name + "' of '" + Rec->getName() + in ParseConstraint()
264 "' in '" + Rec->getName() + "'"); in ParseConstraint()
272 Rec->getName() + "': '" + CStr + "'"); in ParseConstraint()
307 Rec->getLoc(), "Operand '" + SrcOpName + "' of '" + Rec->getName() + in ParseConstraint()
319 Rec->getLoc(), "Operand '" + DestOpName + "' of '" + Rec->getName() + in ParseConstraint()
664 Record *Rec = getRecord(); in getMINumOperands() local
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H A DCompressInstEmitter.cpp225 PrintFatalError(Rec->getLoc(), in addDagOperandMapping()
239 PrintFatalError(Rec->getLoc(), in addDagOperandMapping()
252 Rec->getLoc(), in addDagOperandMapping()
334 PrintFatalError(Rec->getLoc(), in createDagOperandMapping()
388 PrintFatalError(Rec->getLoc(), in createInstOperandMapping()
437 DagInit *DestDag = Rec->getValueAsDag("Output"); in evaluateCompressPat()
447 Rec->getLoc(), in evaluateCompressPat()
527 unsigned &Entry = PredicateMap[Rec]; in getPredicates()
531 if (!Rec->isValueUnset(Name)) { in getPredicates()
532 Predicates.push_back(Rec); in getPredicates()
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H A DX86RecognizableInstr.cpp42 return Rec->isSubClassOf("RegisterClass") || in isRegisterOperand()
47 return Rec->isSubClassOf("Operand") && in isMemoryOperand()
52 return Rec->isSubClassOf("Operand") && in isImmediateOperand()
110 const Record *Rec = insn.TheDef; in RecognizableInstrBase() local
113 OpMap = byteFromRec(Rec, "OpMapBits"); in RecognizableInstrBase()
114 Opcode = byteFromRec(Rec, "Opcode"); in RecognizableInstrBase()
115 Form = byteFromRec(Rec, "FormBits"); in RecognizableInstrBase()
116 Encoding = byteFromRec(Rec, "OpEncBits"); in RecognizableInstrBase()
117 OpSize = byteFromRec(Rec, "OpSizeBits"); in RecognizableInstrBase()
118 AdSize = byteFromRec(Rec, "AdSizeBits"); in RecognizableInstrBase()
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H A DX86FoldTablesEmitter.cpp198 return OpIn.Rec->getName() == "RST" || OpIn.Rec->getName() == "RSTi"; in hasRSTRegClass()
205 return OpIn.Rec->getName() == "ptr_rc_tailcall"; in hasPtrTailcallRegClass()
334 Record *MemOpRec = MemInst->Operands[i].Rec; in operator ()()
416 Record *RegOpRec = RegInstr->Operands[FoldedInd].Rec; in addEntryWithFlags()
417 Record *MemOpRec = MemInstr->Operands[FoldedInd].Rec; in addEntryWithFlags()
472 Record *RegOpRec = RegInstr->Operands[i].Rec; in updateTables()
473 Record *MemOpRec = MemInstr->Operands[i].Rec; in updateTables()
525 const Record *Rec = Inst->TheDef; in run() local
526 if (!Rec->isSubClassOf("X86Inst") || Rec->getValueAsBit("isAsmParserOnly")) in run()
544 if (hasMemoryFormat(Rec)) in run()
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H A DInfoByHwMode.cpp105 ValueTypeByHwMode llvm::getValueTypeByHwMode(Record *Rec, in getValueTypeByHwMode() argument
108 if (!Rec->isSubClassOf("ValueType")) in getValueTypeByHwMode()
109 Rec->dump(); in getValueTypeByHwMode()
111 assert(Rec->isSubClassOf("ValueType") && in getValueTypeByHwMode()
113 if (Rec->isSubClassOf("HwModeSelect")) in getValueTypeByHwMode()
114 return ValueTypeByHwMode(Rec, CGH); in getValueTypeByHwMode()
115 return ValueTypeByHwMode(Rec, llvm::getValueType(Rec)); in getValueTypeByHwMode()
H A DAsmMatcherEmitter.cpp1159 Record *Rec = OI.Rec; in getOperandClass() local
1172 PrintFatalError(Rec->getLoc(), in getOperandClass()
1185 PrintFatalError(Rec->getLoc(), "RegisterOperand `" + Rec->getName() + in getOperandClass()
1198 if (!Rec->isSubClassOf("Operand")) in getOperandClass()
1199 PrintFatalError(Rec->getLoc(), "Operand `" + Rec->getName() + in getOperandClass()
1237 RegisterSets.insert(RegisterSet(&Rec, &Rec + 1)); in buildRegisterClasses()
1357 for (Record *Rec : AsmOperands) { in buildOperandClasses()
1363 for (Record *Rec : AsmOperands) { in buildOperandClasses()
1649 for (Record *Rec : AllTokenAliases) { in buildInfo()
1653 PrintFatalError(Rec->getLoc(), in buildInfo()
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H A DDirectiveEmitter.cpp50 BaseRecord Rec{R}; in GenerateEnumClass() local
51 OS << " " << Prefix << Rec.getFormattedName() << ",\n"; in GenerateEnumClass()
66 BaseRecord Rec{R}; in GenerateEnumClass() local
69 << "::" << Prefix << Rec.getFormattedName() << ";\n"; in GenerateEnumClass()
256 BaseRecord Rec{R}; in GenerateGetName() local
259 if (Rec.getAlternativeName().empty()) in GenerateGetName()
260 OS << Rec.getName(); in GenerateGetName()
262 OS << Rec.getAlternativeName(); in GenerateGetName()
292 BaseRecord Rec{R}; in GenerateGetKind() local
294 OS << " .Case(\"" << Rec.getName() << "\"," << Prefix in GenerateGetKind()
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H A DTableGen.cpp220 for (Record *Rec : Records.getAllDerivedDefinitions(Class)) in LLVMTableGenMain()
221 OS << Rec->getName() << ", "; in LLVMTableGenMain()
229 for (Record *Rec : Records.getAllDerivedDefinitions("Set")) { in LLVMTableGenMain()
230 OS << Rec->getName() << " = ["; in LLVMTableGenMain()
231 const std::vector<Record*> *Elts = Sets.expand(Rec); in LLVMTableGenMain()
H A DPredicateExpander.h86 void expandPredicate(raw_ostream &OS, const Record *Rec);
87 void expandReturnStatement(raw_ostream &OS, const Record *Rec);
88 void expandOpcodeSwitchCase(raw_ostream &OS, const Record *Rec);
91 void expandStatement(raw_ostream &OS, const Record *Rec);
H A DInstrInfoEmitter.cpp152 OperandList.back().Rec = OpR; in GetOperandInfo()
157 Record *OpR = OperandList[j].Rec; in GetOperandInfo()
179 if (Op.Rec->isSubClassOf("PredicateOp")) in GetOperandInfo()
184 if (Op.Rec->isSubClassOf("OptionalDefOperand")) in GetOperandInfo()
189 if (Op.Rec->isSubClassOf("BranchTargetOperand")) in GetOperandInfo()
407 OperandRecords.push_back(Op.Rec); in emitOperandTypeMappings()
597 auto *OpR = Op.Rec; in emitLogicalOperandTypeMappings()
684 for (const Record *Rec : TIIPredicates) { in emitMCIIHelperMethods() local
706 for (const Record *Rec : TIIPredicates) { in emitMCIIHelperMethods() local
867 for (const Record *Rec : TIIPredicates) { in emitTIIHelperMethods() local
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H A DX86RecognizableInstr.h221 const Record* Rec;
357 bool isRegisterOperand(const Record *Rec);
358 bool isMemoryOperand(const Record *Rec);
359 bool isImmediateOperand(const Record *Rec);
/llvm-project-15.0.7/llvm/lib/DebugInfo/PDB/Native/
H A DTpiHashing.cpp27 static uint32_t getHashForUdt(const TagRecord &Rec, in getHashForUdt() argument
29 ClassOptions Opts = Rec.getOptions(); in getHashForUdt()
36 return hashStringV1(Rec.getName()); in getHashForUdt()
38 return hashStringV1(Rec.getUniqueName()); in getHashForUdt()
48 return getHashForUdt(Deserialized, Rec.data()); in getHashForUdt()
106 switch (Rec.kind()) { in hashTypeRecord()
110 return getHashForUdt<ClassRecord>(Rec); in hashTypeRecord()
112 return getHashForUdt<UnionRecord>(Rec); in hashTypeRecord()
114 return getHashForUdt<EnumRecord>(Rec); in hashTypeRecord()
117 return getSourceLineHash<UdtSourceLineRecord>(Rec); in hashTypeRecord()
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H A DTpiStreamBuilder.cpp184 for (auto Rec : TypeRecBuffers) { in commit() local
185 assert(!Rec.empty() && "Attempting to write an empty type record shifts " in commit()
187 assert(((Rec.size() & 3) == 0) && in commit()
190 if (auto EC = Writer.writeBytes(Rec)) in commit()
/llvm-project-15.0.7/llvm/lib/TableGen/
H A DDetailedRecordsBackend.cpp50 void printDefms(Record *Rec, raw_ostream &OS);
53 void printFields(Record *Rec, raw_ostream &OS);
105 auto *const Rec = RecPair.second.get(); in printRecords() local
106 std::string Name = Rec->getNameInitAsString(); in printRecords()
109 printDefms(Rec, OS); in printRecords()
110 printSuperclasses(Rec, OS); in printRecords()
111 printFields(Rec, OS); in printRecords()
125 const auto &LocList = Rec->getLoc(); in printDefms()
139 ArrayRef<Init *> Args = Rec->getTemplateArgs(); in printTemplateArgs()
168 if (Rec->hasDirectSuperClass(ClassRec)) in printSuperclasses()
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H A DError.cpp71 void PrintFatalNote(const Record *Rec, const Twine &Msg) { in PrintFatalNote() argument
72 PrintNote(Rec->getLoc(), Msg); in PrintFatalNote()
113 void PrintError(const Record *Rec, const Twine &Msg) { in PrintError() argument
114 PrintMessage(Rec->getLoc(), SourceMgr::DK_Error, Msg); in PrintError()
141 void PrintFatalError(const Record *Rec, const Twine &Msg) { in PrintFatalError() argument
142 PrintError(Rec->getLoc(), Msg); in PrintFatalError()
H A DTGParser.cpp39 Record *Rec; member
135 return QualifyName(Rec, MC, StringInit::get(Rec.getRecords(), "NAME"), in QualifiedNameOfImplicitName()
232 Record *SC = SubClass.Rec; in AddSubClass()
293 if (Entry.Rec) in AddSubClass()
446 auto Rec = std::make_unique<Record>(*E.Rec); in resolve() local
480 checkConcrete(*Rec); in addDefOne()
627 Result.Rec = &MC->Rec; in ParseSubClassReference()
3021 if (Entry.Rec) in ApplyLetStack()
3840 if (Rec) in dump()
3841 Rec->dump(); in dump()
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H A DTGParser.h42 std::unique_ptr<Record> Rec; member
49 RecordsEntry(std::unique_ptr<Record> Rec) : Rec(std::move(Rec)) {} in RecordsEntry()
121 Record Rec; // Placeholder for template args and Name. member
127 Rec(Name, Loc, Records) {} in MultiClass()
204 bool AddSubClass(Record *Rec, SubClassReference &SubClass);
217 bool addDefOne(std::unique_ptr<Record> Rec);
/llvm-project-15.0.7/clang/lib/ARCMigrate/
H A DTransRetainReleaseDealloc.cpp183 Expr *Rec = E->getInstanceReceiver(); in isReturnedAfterAutorelease() local
184 if (!Rec) in isReturnedAfterAutorelease()
187 Decl *RefD = getReferencedDecl(Rec); in isReturnedAfterAutorelease()
204 Expr *Rec = E->getInstanceReceiver(); in isPlusOneAssignBeforeOrAfterAutorelease() local
205 if (!Rec) in isPlusOneAssignBeforeOrAfterAutorelease()
208 Decl *RefD = getReferencedDecl(Rec); in isPlusOneAssignBeforeOrAfterAutorelease()
326 Expr *&Rec, SourceRange &RecRange) { in checkForGCDOrXPC()
378 Rec = Init->IgnoreParenImpCasts(); in checkForGCDOrXPC()
379 if (FullExpr *FE = dyn_cast<FullExpr>(Rec)) in checkForGCDOrXPC()
380 Rec = FE->getSubExpr()->IgnoreParenImpCasts(); in checkForGCDOrXPC()
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/llvm-project-15.0.7/clang/utils/TableGen/
H A DClangOpcodesEmitter.cpp66 std::function<void(size_t, const Twine &)> Rec; in Enumerate() local
67 Rec = [&TypePath, Types, &Rec, &F](size_t I, const Twine &ID) { in Enumerate()
76 Rec(I + 1, ID + Type->getName()); in Enumerate()
83 Rec(0, N); in Enumerate()
268 std::function<void(size_t, const Twine &)> Rec; in EmitGroup() local
270 Rec = [this, &Rec, &OS, Types, &Args, R, &TS, N](size_t I, const Twine &ID) { in EmitGroup()
301 Rec(I + 1, ID + Case->getName()); in EmitGroup()
313 Rec(0, N); in EmitGroup()
/llvm-project-15.0.7/llvm/tools/llvm-pdbutil/
H A DTypeReferenceTracker.cpp132 Optional<CVType> Rec = (Ids && RefKind == TiRefKind::IndexRef) in markReferencedTypes() local
135 if (!Rec) in markReferencedTypes()
140 discoverTypeIndices(*Rec, DepList); in markReferencedTypes()
141 addReferencedTypes(Rec->content(), DepList); in markReferencedTypes()
148 switch (Rec->kind()) { in markReferencedTypes()
/llvm-project-15.0.7/llvm/unittests/XRay/
H A DFDRProducerConsumerTest.cpp86 Rec = MakeRecord<T>(); in RoundTripTest()
94 std::unique_ptr<Record> Rec; member in llvm::xray::__anon9735863b0111::RoundTripTest
109 Rec = MakeRecord<T>(); in RoundTripTestV5()
117 std::unique_ptr<Record> Rec; member in llvm::xray::__anon9735863b0111::RoundTripTestV5
129 auto &R = this->Rec; in TYPED_TEST_P()
170 auto &R = this->Rec; in TYPED_TEST_P()
/llvm-project-15.0.7/llvm/include/llvm/TableGen/
H A DError.h27 [[noreturn]] void PrintFatalNote(const Record *Rec, const Twine &Msg);
37 void PrintError(const Record *Rec, const Twine &Msg);
42 [[noreturn]] void PrintFatalError(const Record *Rec, const Twine &Msg);
/llvm-project-15.0.7/clang/lib/Edit/
H A DRewriteObjCFoundationAPI.cpp45 if (Rec->getMethodFamily() == OMF_alloc) in checkForLiteralCreation()
159 const Expr *Rec = Msg->getInstanceReceiver(); in canRewriteToSubscriptSyntax() local
160 if (!Rec) in canRewriteToSubscriptSyntax()
184 const Expr *Rec = Msg->getInstanceReceiver(); in rewriteToSubscriptGetCommon() local
185 if (!Rec) in rewriteToSubscriptGetCommon()
189 SourceRange RecRange = Rec->getSourceRange(); in rewriteToSubscriptGetCommon()
198 maybePutParensOnReceiver(Rec, commit); in rewriteToSubscriptGetCommon()
233 if (!Rec) in rewriteToArraySubscriptSet()
252 maybePutParensOnReceiver(Rec, commit); in rewriteToArraySubscriptSet()
267 if (!Rec) in rewriteToDictionarySubscriptSet()
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