1 //===- TableGen.cpp - Top-Level TableGen implementation for LLVM ----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the main function for LLVM's TableGen.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #include "TableGenBackends.h" // Declares all backends.
14 #include "llvm/Support/CommandLine.h"
15 #include "llvm/Support/InitLLVM.h"
16 #include "llvm/TableGen/Main.h"
17 #include "llvm/TableGen/Record.h"
18 #include "llvm/TableGen/SetTheory.h"
19
20 using namespace llvm;
21
22 enum ActionType {
23 PrintRecords,
24 PrintDetailedRecords,
25 NullBackend,
26 DumpJSON,
27 GenEmitter,
28 GenRegisterInfo,
29 GenInstrInfo,
30 GenInstrDocs,
31 GenAsmWriter,
32 GenAsmMatcher,
33 GenDisassembler,
34 GenPseudoLowering,
35 GenCompressInst,
36 GenCallingConv,
37 GenDAGISel,
38 GenDFAPacketizer,
39 GenFastISel,
40 GenSubtarget,
41 GenIntrinsicEnums,
42 GenIntrinsicImpl,
43 PrintEnums,
44 PrintSets,
45 GenOptParserDefs,
46 GenOptRST,
47 GenCTags,
48 GenAttributes,
49 GenSearchableTables,
50 GenGlobalISel,
51 GenGICombiner,
52 GenX86EVEX2VEXTables,
53 GenX86FoldTables,
54 GenX86MnemonicTables,
55 GenRegisterBank,
56 GenExegesis,
57 GenAutomata,
58 GenDirectivesEnumDecl,
59 GenDirectivesEnumImpl,
60 GenDXILOperation,
61 };
62
63 namespace llvm {
64 cl::opt<bool> EmitLongStrLiterals(
65 "long-string-literals",
66 cl::desc("when emitting large string tables, prefer string literals over "
67 "comma-separated char literals. This can be a readability and "
68 "compile-time performance win, but upsets some compilers"),
69 cl::Hidden, cl::init(true));
70 } // end namespace llvm
71
72 namespace {
73 cl::opt<ActionType> Action(
74 cl::desc("Action to perform:"),
75 cl::values(
76 clEnumValN(PrintRecords, "print-records",
77 "Print all records to stdout (default)"),
78 clEnumValN(PrintDetailedRecords, "print-detailed-records",
79 "Print full details of all records to stdout"),
80 clEnumValN(NullBackend, "null-backend",
81 "Do nothing after parsing (useful for timing)"),
82 clEnumValN(DumpJSON, "dump-json",
83 "Dump all records as machine-readable JSON"),
84 clEnumValN(GenEmitter, "gen-emitter", "Generate machine code emitter"),
85 clEnumValN(GenRegisterInfo, "gen-register-info",
86 "Generate registers and register classes info"),
87 clEnumValN(GenInstrInfo, "gen-instr-info",
88 "Generate instruction descriptions"),
89 clEnumValN(GenInstrDocs, "gen-instr-docs",
90 "Generate instruction documentation"),
91 clEnumValN(GenCallingConv, "gen-callingconv",
92 "Generate calling convention descriptions"),
93 clEnumValN(GenAsmWriter, "gen-asm-writer", "Generate assembly writer"),
94 clEnumValN(GenDisassembler, "gen-disassembler",
95 "Generate disassembler"),
96 clEnumValN(GenPseudoLowering, "gen-pseudo-lowering",
97 "Generate pseudo instruction lowering"),
98 clEnumValN(GenCompressInst, "gen-compress-inst-emitter",
99 "Generate RISCV compressed instructions."),
100 clEnumValN(GenAsmMatcher, "gen-asm-matcher",
101 "Generate assembly instruction matcher"),
102 clEnumValN(GenDAGISel, "gen-dag-isel",
103 "Generate a DAG instruction selector"),
104 clEnumValN(GenDFAPacketizer, "gen-dfa-packetizer",
105 "Generate DFA Packetizer for VLIW targets"),
106 clEnumValN(GenFastISel, "gen-fast-isel",
107 "Generate a \"fast\" instruction selector"),
108 clEnumValN(GenSubtarget, "gen-subtarget",
109 "Generate subtarget enumerations"),
110 clEnumValN(GenIntrinsicEnums, "gen-intrinsic-enums",
111 "Generate intrinsic enums"),
112 clEnumValN(GenIntrinsicImpl, "gen-intrinsic-impl",
113 "Generate intrinsic information"),
114 clEnumValN(PrintEnums, "print-enums", "Print enum values for a class"),
115 clEnumValN(PrintSets, "print-sets",
116 "Print expanded sets for testing DAG exprs"),
117 clEnumValN(GenOptParserDefs, "gen-opt-parser-defs",
118 "Generate option definitions"),
119 clEnumValN(GenOptRST, "gen-opt-rst", "Generate option RST"),
120 clEnumValN(GenCTags, "gen-ctags", "Generate ctags-compatible index"),
121 clEnumValN(GenAttributes, "gen-attrs", "Generate attributes"),
122 clEnumValN(GenSearchableTables, "gen-searchable-tables",
123 "Generate generic binary-searchable table"),
124 clEnumValN(GenGlobalISel, "gen-global-isel",
125 "Generate GlobalISel selector"),
126 clEnumValN(GenGICombiner, "gen-global-isel-combiner",
127 "Generate GlobalISel combiner"),
128 clEnumValN(GenX86EVEX2VEXTables, "gen-x86-EVEX2VEX-tables",
129 "Generate X86 EVEX to VEX compress tables"),
130 clEnumValN(GenX86FoldTables, "gen-x86-fold-tables",
131 "Generate X86 fold tables"),
132 clEnumValN(GenX86MnemonicTables, "gen-x86-mnemonic-tables",
133 "Generate X86 mnemonic tables"),
134 clEnumValN(GenRegisterBank, "gen-register-bank",
135 "Generate registers bank descriptions"),
136 clEnumValN(GenExegesis, "gen-exegesis",
137 "Generate llvm-exegesis tables"),
138 clEnumValN(GenAutomata, "gen-automata", "Generate generic automata"),
139 clEnumValN(GenDirectivesEnumDecl, "gen-directive-decl",
140 "Generate directive related declaration code (header file)"),
141 clEnumValN(GenDirectivesEnumImpl, "gen-directive-impl",
142 "Generate directive related implementation code"),
143 clEnumValN(GenDXILOperation, "gen-dxil-operation",
144 "Generate DXIL operation information")));
145
146 cl::OptionCategory PrintEnumsCat("Options for -print-enums");
147 cl::opt<std::string> Class("class", cl::desc("Print Enum list for this class"),
148 cl::value_desc("class name"),
149 cl::cat(PrintEnumsCat));
150
LLVMTableGenMain(raw_ostream & OS,RecordKeeper & Records)151 bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) {
152 switch (Action) {
153 case PrintRecords:
154 OS << Records; // No argument, dump all contents
155 break;
156 case PrintDetailedRecords:
157 EmitDetailedRecords(Records, OS);
158 break;
159 case NullBackend: // No backend at all.
160 break;
161 case DumpJSON:
162 EmitJSON(Records, OS);
163 break;
164 case GenEmitter:
165 EmitCodeEmitter(Records, OS);
166 break;
167 case GenRegisterInfo:
168 EmitRegisterInfo(Records, OS);
169 break;
170 case GenInstrInfo:
171 EmitInstrInfo(Records, OS);
172 break;
173 case GenInstrDocs:
174 EmitInstrDocs(Records, OS);
175 break;
176 case GenCallingConv:
177 EmitCallingConv(Records, OS);
178 break;
179 case GenAsmWriter:
180 EmitAsmWriter(Records, OS);
181 break;
182 case GenAsmMatcher:
183 EmitAsmMatcher(Records, OS);
184 break;
185 case GenDisassembler:
186 EmitDisassembler(Records, OS);
187 break;
188 case GenPseudoLowering:
189 EmitPseudoLowering(Records, OS);
190 break;
191 case GenCompressInst:
192 EmitCompressInst(Records, OS);
193 break;
194 case GenDAGISel:
195 EmitDAGISel(Records, OS);
196 break;
197 case GenDFAPacketizer:
198 EmitDFAPacketizer(Records, OS);
199 break;
200 case GenFastISel:
201 EmitFastISel(Records, OS);
202 break;
203 case GenSubtarget:
204 EmitSubtarget(Records, OS);
205 break;
206 case GenIntrinsicEnums:
207 EmitIntrinsicEnums(Records, OS);
208 break;
209 case GenIntrinsicImpl:
210 EmitIntrinsicImpl(Records, OS);
211 break;
212 case GenOptParserDefs:
213 EmitOptParser(Records, OS);
214 break;
215 case GenOptRST:
216 EmitOptRST(Records, OS);
217 break;
218 case PrintEnums:
219 {
220 for (Record *Rec : Records.getAllDerivedDefinitions(Class))
221 OS << Rec->getName() << ", ";
222 OS << "\n";
223 break;
224 }
225 case PrintSets:
226 {
227 SetTheory Sets;
228 Sets.addFieldExpander("Set", "Elements");
229 for (Record *Rec : Records.getAllDerivedDefinitions("Set")) {
230 OS << Rec->getName() << " = [";
231 const std::vector<Record*> *Elts = Sets.expand(Rec);
232 assert(Elts && "Couldn't expand Set instance");
233 for (Record *Elt : *Elts)
234 OS << ' ' << Elt->getName();
235 OS << " ]\n";
236 }
237 break;
238 }
239 case GenCTags:
240 EmitCTags(Records, OS);
241 break;
242 case GenAttributes:
243 EmitAttributes(Records, OS);
244 break;
245 case GenSearchableTables:
246 EmitSearchableTables(Records, OS);
247 break;
248 case GenGlobalISel:
249 EmitGlobalISel(Records, OS);
250 break;
251 case GenGICombiner:
252 EmitGICombiner(Records, OS);
253 break;
254 case GenRegisterBank:
255 EmitRegisterBank(Records, OS);
256 break;
257 case GenX86EVEX2VEXTables:
258 EmitX86EVEX2VEXTables(Records, OS);
259 break;
260 case GenX86MnemonicTables:
261 EmitX86MnemonicTables(Records, OS);
262 break;
263 case GenX86FoldTables:
264 EmitX86FoldTables(Records, OS);
265 break;
266 case GenExegesis:
267 EmitExegesis(Records, OS);
268 break;
269 case GenAutomata:
270 EmitAutomata(Records, OS);
271 break;
272 case GenDirectivesEnumDecl:
273 EmitDirectivesDecl(Records, OS);
274 break;
275 case GenDirectivesEnumImpl:
276 EmitDirectivesImpl(Records, OS);
277 break;
278 case GenDXILOperation:
279 EmitDXILOperation(Records, OS);
280 break;
281 }
282
283 return false;
284 }
285 }
286
main(int argc,char ** argv)287 int main(int argc, char **argv) {
288 InitLLVM X(argc, argv);
289 cl::ParseCommandLineOptions(argc, argv);
290
291 return TableGenMain(argv[0], &LLVMTableGenMain);
292 }
293
294 #ifndef __has_feature
295 #define __has_feature(x) 0
296 #endif
297
298 #if __has_feature(address_sanitizer) || \
299 (defined(__SANITIZE_ADDRESS__) && defined(__GNUC__)) || \
300 __has_feature(leak_sanitizer)
301
302 #include <sanitizer/lsan_interface.h>
303 // Disable LeakSanitizer for this binary as it has too many leaks that are not
304 // very interesting to fix. See compiler-rt/include/sanitizer/lsan_interface.h .
__lsan_is_turned_off()305 LLVM_ATTRIBUTE_USED int __lsan_is_turned_off() { return 1; }
306
307 #endif
308