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Searched refs:RHSC (Results 1 – 25 of 37) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCISelDAGToDAG.cpp106 int32_t RHSC = RHS->getSExtValue(); in SelectAddrModeS9() local
108 RHSC = -RHSC; in SelectAddrModeS9()
111 if (!isInt<9>(RHSC)) in SelectAddrModeS9()
119 Offset = CurDAG->getTargetConstant(RHSC, SDLoc(Addr), MVT::i32); in SelectAddrModeS9()
135 int32_t RHSC = RHS->getSExtValue(); in SelectAddrModeFar() local
137 RHSC = -RHSC; in SelectAddrModeFar()
139 Offset = CurDAG->getTargetConstant(RHSC, SDLoc(Addr), MVT::i32); in SelectAddrModeFar()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp691 RHSC = -RHSC; in SelectAddrModeImm12()
721 RHSC = RHSC & ~1; in SelectLdStSOReg()
725 RHSC = - RHSC; in SelectLdStSOReg()
942 RHSC = -RHSC; in SelectAddrMode3()
1012 RHSC = -RHSC; in IsAddressingMode5()
1256 RHSC = -RHSC; in SelectTAddrModeImm7()
1311 RHSC = -RHSC; in SelectT2AddrModeImm12()
1345 RHSC = -RHSC; in SelectT2AddrModeImm8()
1368 RHSC = -RHSC; in SelectT2AddrModeImm8()
1417 RHSC = -RHSC; in SelectT2AddrModeImm7()
[all …]
H A DARMISelLowering.cpp4692 unsigned C = RHSC->getZExtValue(); in getARMCmp()
18065 (RHSC && RHSC->getZExtValue() == 0)) { in PerformBRCONDCombine()
18136 (RHSC && RHSC->getZExtValue() == 0)) { in PerformCMOVCombine()
19496 if (RHSC < 0 && RHSC > -256) { in getARMIndexedAddressParts()
19510 if (RHSC < 0 && RHSC > -0x1000) { in getARMIndexedAddressParts()
19553 if (RHSC < 0 && RHSC > -0x100) { // 8 bits. in getT2IndexedAddressParts()
19558 } else if (RHSC > 0 && RHSC < 0x100) { // 8 bit, no zero. in getT2IndexedAddressParts()
19586 if (RHSC < 0 && RHSC > -Limit * Scale && RHSC % Scale == 0) { in getMVEIndexedAddressParts()
19591 } else if (RHSC > 0 && RHSC < Limit * Scale && RHSC % Scale == 0) { in getMVEIndexedAddressParts()
19606 if (IsInRange(RHSC, 0x80, 1)) in getMVEIndexedAddressParts()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp85 int RHSC = (int)RHS->getZExtValue(); in SelectAddr() local
89 RHSC = -RHSC; in SelectAddr()
100 Disp = CurDAG->getTargetConstant(RHSC, dl, MVT::i16); in SelectAddr()
110 if (isUInt<6>(RHSC) && (VT == MVT::i8 || VT == MVT::i16)) { in SelectAddr()
112 Disp = CurDAG->getTargetConstant(RHSC, dl, MVT::i8); in SelectAddr()
H A DAVRISelLowering.cpp965 int RHSC = RHS->getSExtValue(); in getPreIndexedAddressParts() local
967 RHSC = -RHSC; in getPreIndexedAddressParts()
969 if ((VT == MVT::i16 && RHSC != -2) || (VT == MVT::i8 && RHSC != -1)) { in getPreIndexedAddressParts()
974 Offset = DAG.getConstant(RHSC, DL, MVT::i8); in getPreIndexedAddressParts()
1016 int RHSC = RHS->getSExtValue(); in getPostIndexedAddressParts() local
1018 RHSC = -RHSC; in getPostIndexedAddressParts()
1019 if ((VT == MVT::i16 && RHSC != 2) || (VT == MVT::i8 && RHSC != 1)) { in getPostIndexedAddressParts()
1024 Offset = DAG.getConstant(RHSC, DL, MVT::i8); in getPostIndexedAddressParts()
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dstrncmp-1.ll80 ; CHECK-NEXT: [[RHSC:%.*]] = load i8, i8* [[STR2:%.*]], align 1
81 ; CHECK-NEXT: [[RHSV:%.*]] = zext i8 [[RHSC]] to i32
H A Dbcmp-1.ll40 ; CHECK-NEXT: [[RHSC:%.*]] = load i8, i8* [[MEM2:%.*]], align 1
41 ; CHECK-NEXT: [[RHSV:%.*]] = zext i8 [[RHSC]] to i32
H A Dmemcmp-1.ll40 ; CHECK-NEXT: [[RHSC:%.*]] = load i8, i8* %mem2, align 1
41 ; CHECK-NEXT: [[RHSV:%.*]] = zext i8 [[RHSC]] to i32
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp818 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) in IntCondCCodeToICC() local
819 if (RHSC->getZExtValue() == 0xFFFFFFFF) { in IntCondCCodeToICC()
828 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) in IntCondCCodeToICC() local
829 if (RHSC->getZExtValue() == 0) in IntCondCCodeToICC()
836 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) in IntCondCCodeToICC() local
837 if (RHSC->getZExtValue() == 0xFFFFFFFF) { in IntCondCCodeToICC()
846 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) in IntCondCCodeToICC() local
847 if (RHSC->getZExtValue() == 0) in IntCondCCodeToICC()
/llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/
H A DInstCombineCompares.cpp3528 Constant *RHSC = dyn_cast<Constant>(Op1); in foldICmpInstWithConstantNotInt() local
3530 if (!RHSC || !LHSI) in foldICmpInstWithConstantNotInt()
3536 if (RHSC->isNullValue() && in foldICmpInstWithConstantNotInt()
3552 if (RHSC->isNullValue() && in foldICmpInstWithConstantNotInt()
4355 if (RHSC->isNotMinSignedValue()) in foldICmpBinOp()
6544 ? ConstantExpr::getFPToUI(RHSC, IntTy) in foldFCmpIntToFPConst()
6545 : ConstantExpr::getFPToSI(RHSC, IntTy); in foldFCmpIntToFPConst()
6548 ? ConstantExpr::getUIToFP(RHSInt, RHSC->getType()) == RHSC in foldFCmpIntToFPConst()
6549 : ConstantExpr::getSIToFP(RHSInt, RHSC->getType()) == RHSC; in foldFCmpIntToFPConst()
6643 if (!match(RHSC, m_AnyZeroFP())) in foldFCmpReciprocalAndZero()
[all …]
H A DInstCombineAndOrXor.cpp2530 const APInt *LHSC = nullptr, *RHSC = nullptr; in foldAndOrOfICmps() local
2532 match(RHS1, m_APInt(RHSC)); in foldAndOrOfICmps()
2622 if (!LHSC || !RHSC) in foldAndOrOfICmps()
2638 SmallC = RHSC; in foldAndOrOfICmps()
2643 BigC = RHSC; in foldAndOrOfICmps()
2668 isSignBitCheck(PredR, *RHSC, TrueIfSignedR) && in foldAndOrOfICmps()
3704 const APInt *RHSC; in visitXor() local
3705 if (match(Op1, m_APInt(RHSC))) { in visitXor()
3709 if (RHSC->isSignMask() && match(Op0, m_Sub(m_APInt(C), m_Value(X)))) in visitXor()
3713 if (RHSC->isSignMask() && match(Op0, m_Add(m_Value(X), m_APInt(C)))) in visitXor()
[all …]
H A DInstCombineInternal.h666 Constant *RHSC);
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp964 int64_t RHSC = RHS->getSExtValue(); in SelectAddrModeIndexedBitWidth() local
968 if ((RHSC & (Size - 1)) == 0 && RHSC >= -(Range << Scale) && in SelectAddrModeIndexedBitWidth()
969 RHSC < (Range << Scale)) { in SelectAddrModeIndexedBitWidth()
980 uint64_t RHSC = RHS->getZExtValue(); in SelectAddrModeIndexedBitWidth() local
984 if ((RHSC & (Size - 1)) == 0 && RHSC < (Range << Scale)) { in SelectAddrModeIndexedBitWidth()
1035 int64_t RHSC = (int64_t)RHS->getZExtValue(); in SelectAddrModeIndexed() local
1037 if ((RHSC & (Size - 1)) == 0 && RHSC >= 0 && RHSC < (0x1000 << Scale)) { in SelectAddrModeIndexed()
1074 int64_t RHSC = RHS->getSExtValue(); in SelectAddrModeUnscaled() local
1076 if ((RHSC & (Size - 1)) == 0 && RHSC >= 0 && in SelectAddrModeUnscaled()
1077 RHSC < (0x1000 << Log2_32(Size))) in SelectAddrModeUnscaled()
[all …]
/llvm-project-15.0.7/llvm/lib/MC/
H A DMCExpr.cpp129 if (const MCConstantExpr *RHSC = dyn_cast<MCConstantExpr>(BE.getRHS())) { in print() local
130 if (RHSC->getValue() < 0) { in print()
131 OS << RHSC->getValue(); in print()
/llvm-project-15.0.7/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp1154 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) { in LowerSETCC() local
1155 if (RHSC->isZero() && LHS.hasOneUse() && in LowerSETCC()
1356 uint64_t RHSC = RHS->getZExtValue(); in getPostIndexedAddressParts() local
1357 if ((VT == MVT::i16 && RHSC != 2) || in getPostIndexedAddressParts()
1358 (VT == MVT::i8 && RHSC != 1)) in getPostIndexedAddressParts()
1362 Offset = DAG.getConstant(RHSC, SDLoc(N), VT); in getPostIndexedAddressParts()
/llvm-project-15.0.7/llvm/lib/Analysis/
H A DScalarEvolution.cpp3328 if (RHSC->getValue()->isOne()) in getURemExpr()
3332 if (RHSC->getAPInt().isPowerOf2()) { in getURemExpr()
3369 if (RHSC->getValue()->isOne()) in getUDivExpr()
3374 if (!RHSC->getValue()->isZero()) { in getUDivExpr()
3379 unsigned LZ = RHSC->getAPInt().countLeadingZeros(); in getUDivExpr()
3383 if (!RHSC->getAPInt().isPowerOf2()) in getUDivExpr()
3392 const APInt &DivInt = RHSC->getAPInt(); in getUDivExpr()
3443 const SCEV *Div = getUDivExpr(Op, RHSC); in getUDivExpr()
5110 if (RHSC->getValue().isSignMask()) in MatchBinaryOp()
14619 if (Predicate == CmpInst::ICMP_EQ && RHSC && in applyLoopGuards()
[all …]
H A DBasicAliasAnalysis.cpp360 if (ConstantInt *RHSC = dyn_cast<ConstantInt>(BOp->getOperand(1))) { in GetLinearExpression() local
361 APInt RHS = Val.evaluateWith(RHSC->getValue()); in GetLinearExpression()
386 if (!MaskedValueIsZero(BOp->getOperand(0), RHSC->getValue(), DL, 0, AC, in GetLinearExpression()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp6386 int64_t RHSC; in selectAddrModeUnscaled() local
6390 RHSC = RHSOp1.getCImm()->getSExtValue(); in selectAddrModeUnscaled()
6393 if ((RHSC & (Size - 1)) == 0 && RHSC >= 0 && RHSC < (0x1000 << Log2_32(Size))) in selectAddrModeUnscaled()
6395 if (RHSC >= -256 && RHSC < 256) { in selectAddrModeUnscaled()
6399 [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC); }, in selectAddrModeUnscaled()
6473 int64_t RHSC = (int64_t)RHSDef->getOperand(1).getCImm()->getZExtValue(); in selectAddrModeIndexed() local
6475 if ((RHSC & (Size - 1)) == 0 && RHSC >= 0 && RHSC < (0x1000 << Scale)) { in selectAddrModeIndexed()
6479 [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC >> Scale); }, in selectAddrModeIndexed()
6484 [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC >> Scale); }, in selectAddrModeIndexed()
/llvm-project-15.0.7/llvm/lib/Target/NVPTX/
H A DNVPTXAsmPrinter.cpp2115 if (const MCConstantExpr *RHSC = dyn_cast<MCConstantExpr>(BE.getRHS())) { in printMCExpr() local
2116 if (RHSC->getValue() < 0) { in printMCExpr()
2117 OS << RHSC->getValue(); in printMCExpr()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DBasicTTIImpl.h1422 if (auto *RHSC = dyn_cast<ConstantInt>(Args[1])) { in getIntrinsicInstrCost() local
1424 if (getTLI()->isBeneficialToExpandPowI(RHSC->getSExtValue(), in getIntrinsicInstrCost()
1428 APInt Exponent = RHSC->getValue().abs(); in getIntrinsicInstrCost()
1434 if (RHSC->getSExtValue() < 0) in getIntrinsicInstrCost()
/llvm-project-15.0.7/llvm/lib/Transforms/IPO/
H A DIROutliner.cpp174 const ConstantInt *RHSC = dyn_cast<ConstantInt>(RHS); in getSortedConstantKeys() local
175 assert(RHSC && "Not a constant integer in return value?"); in getSortedConstantKeys()
178 return LHSC->getLimitedValue() < RHSC->getLimitedValue(); in getSortedConstantKeys()
/llvm-project-15.0.7/llvm/lib/IR/
H A DConstantFold.cpp245 if (ConstantInt *RHSC = dyn_cast<ConstantInt>(RHS)) in ExtractConstantBytes() local
246 if (RHSC->isMinusOne()) in ExtractConstantBytes()
247 return RHSC; in ExtractConstantBytes()
/llvm-project-15.0.7/llvm/lib/Transforms/Utils/
H A DSimplifyCFG.cpp563 const APInt *RHSC; in matchInstruction() local
610 m_And(m_Value(RHSVal), m_APInt(RHSC)))) { in matchInstruction()
611 APInt Mask = ~*RHSC; in matchInstruction()
633 m_Or(m_Value(RHSVal), m_APInt(RHSC)))) { in matchInstruction()
634 APInt Mask = *RHSC; in matchInstruction()
664 if (match(I->getOperand(0), m_Add(m_Value(RHSVal), m_APInt(RHSC)))) { in matchInstruction()
665 Span = Span.subtract(*RHSC); in matchInstruction()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86FastISel.cpp1380 static unsigned X86ChooseCmpImmediateOpcode(EVT VT, const ConstantInt *RHSC) { in X86ChooseCmpImmediateOpcode() argument
1381 int64_t Val = RHSC->getSExtValue(); in X86ChooseCmpImmediateOpcode()
1485 const auto *RHSC = dyn_cast<ConstantFP>(RHS); in X86SelectCmp() local
1486 if (RHSC && RHSC->isNullValue()) in X86SelectCmp()
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp1527 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) { in TranslateM68kCC() local
1528 if (SetCCOpcode == ISD::SETGT && RHSC->isAllOnesValue()) { in TranslateM68kCC()
1533 if (SetCCOpcode == ISD::SETLT && RHSC->isNullValue()) { in TranslateM68kCC()
1537 if (SetCCOpcode == ISD::SETLT && RHSC->getZExtValue() == 1) { in TranslateM68kCC()

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