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Searched refs:RHS0 (Results 1 – 8 of 8) sorted by relevance

/llvm-project-15.0.7/mlir/test/Integration/Dialect/Async/CPU/
H A Dmicrobench-linalg-async-parallel-for.mlir98 %RHS0 = memref.cast %RHS1024 : memref<1024x1024xf32> to memref<?x?xf32>
105 call @linalg_generic(%LHS0, %RHS0, %DST0)
114 func.call @linalg_generic(%LHS0, %RHS0, %DST0)
H A Dmicrobench-scf-async-parallel-for.mlir120 %RHS0 = memref.cast %RHS1024 : memref<1024x1024xf32> to memref<?x?xf32>
127 call @scf_parallel(%LHS0, %RHS0, %DST0)
136 func.call @scf_parallel(%LHS0, %RHS0, %DST0)
/llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/
H A DInstCombineAndOrXor.cpp1214 if (LHS0 == RHS1 && RHS0 == LHS1) { in foldLogicOfFCmps()
1217 std::swap(RHS0, RHS1); in foldLogicOfFCmps()
1234 if (LHS0 == RHS0 && LHS1 == RHS1) { in foldLogicOfFCmps()
1254 if (LHS0->getType() != RHS0->getType()) in foldLogicOfFCmps()
2537 if (LHS0 == RHS1 && LHS1 == RHS0) { in foldAndOrOfICmps()
2541 if (LHS0 == RHS0 && LHS1 == RHS1) { in foldAndOrOfICmps()
2615 LHS0->getType() == RHS0->getType()) { in foldAndOrOfICmps()
2636 if (match(RHS0, m_Trunc(m_Value(V))) && in foldAndOrOfICmps()
3190 if (LHS0 == RHS1 && LHS1 == RHS0) { in foldXorOfICmps()
3194 if (LHS0 == RHS0 && LHS1 == RHS1) { in foldXorOfICmps()
[all …]
/llvm-project-15.0.7/llvm/lib/Transforms/Scalar/
H A DGuardWidening.cpp509 ConstantInt *RHS0, *RHS1; in widenCondCommon() local
512 if (match(Cond0, m_ICmp(Pred0, m_Value(LHS), m_ConstantInt(RHS0))) && in widenCondCommon()
518 ConstantRange::makeExactICmpRegion(Pred0, RHS0->getValue()); in widenCondCommon()
/llvm-project-15.0.7/mlir/test/Interfaces/TilingInterface/
H A Dtile-and-fuse-using-interface.mlir106 // CHECK-SAME: %[[RHS0:[a-zA-Z0-9]+]]: tensor<?x?xf32>,
111 // CHECK-DAG: %[[D1:.+]] = tensor.dim %[[RHS0]], %[[C1]]
118 // CHECK-DAG: %[[RHS0_TILE:.+]] = tensor.extract_slice %[[RHS0]][0, 0]
/llvm-project-15.0.7/llvm/lib/Analysis/
H A DInstructionSimplify.cpp1947 Value *RHS0 = RHS->getOperand(0), *RHS1 = RHS->getOperand(1); in simplifyAndOrOfFCmps() local
1948 if (LHS0->getType() != RHS0->getType()) in simplifyAndOrOfFCmps()
1962 if ((isKnownNeverNaN(LHS0, TLI) && (LHS1 == RHS0 || LHS1 == RHS1)) || in simplifyAndOrOfFCmps()
1963 (isKnownNeverNaN(LHS1, TLI) && (LHS0 == RHS0 || LHS0 == RHS1))) in simplifyAndOrOfFCmps()
1974 if ((isKnownNeverNaN(RHS0, TLI) && (RHS1 == LHS0 || RHS1 == LHS1)) || in simplifyAndOrOfFCmps()
1975 (isKnownNeverNaN(RHS1, TLI) && (RHS0 == LHS0 || RHS0 == LHS1))) in simplifyAndOrOfFCmps()
/llvm-project-15.0.7/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp732 SDValue RHS0 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, RHS_0, in getAVRCmp() local
747 Cmp = getAVRCmp(LHS0, RHS0, DAG, DL); in getAVRCmp()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp47027 SDValue RHS0 = RHS.getOperand(0); in combineVectorHADDSUB() local
47030 (RHS0 == RHS1 || RHS0.isUndef() || RHS1.isUndef())) { in combineVectorHADDSUB()
47034 RHS0.isUndef() ? RHS1 : RHS0); in combineVectorHADDSUB()