Searched refs:OutVal (Results 1 – 6 of 6) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/CodeGen/LiveDebugValues/ |
| H A D | InstrRefBasedImpl.cpp | 2376 const DbgValue &OutVal = *OutValIt->second; in pickVPHILoc() local
2378 if (OutVal.Kind == DbgValue::Const || OutVal.Kind == DbgValue::NoVal) in pickVPHILoc()
2382 Properties.push_back(&OutVal.Properties); in pickVPHILoc()
2389 if (OutVal.Kind == DbgValue::Def || in pickVPHILoc()
2390 (OutVal.Kind == DbgValue::VPHI && OutVal.BlockNo != MBB.getNumber() && in pickVPHILoc()
2391 OutVal.ID != ValueIDNum::EmptyValue)) { in pickVPHILoc()
2392 ValueIDNum ValToLookFor = OutVal.ID; in pickVPHILoc()
2399 assert(OutVal.Kind == DbgValue::VPHI); in pickVPHILoc()
2402 if (OutVal.BlockNo != MBB.getNumber()) in pickVPHILoc()
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| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 379 SDValue OutVal = OutVals[i]; in LowerReturn() local
386 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
389 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
392 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn()
405 OutVal = SDValue(DAG.getMachineNode(TargetOpcode::INSERT_SUBREG, DL, in LowerReturn()
406 MVT::i64, Undef, OutVal, Sub_f32), in LowerReturn()
414 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVal, Flag); in LowerReturn()
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 364 SDValue OutVal = OutVals[i]; in LowerReturn_64() local
370 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
373 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
376 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
385 OutVal = DAG.getNode(ISD::SHL, DL, MVT::i64, OutVal, in LowerReturn_64()
392 OutVal = DAG.getNode(ISD::OR, DL, MVT::i64, OutVal, NV); in LowerReturn_64()
398 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), OutVal, Flag); in LowerReturn_64()
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| /llvm-project-15.0.7/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 1598 SDValue OutVal = N->getOperand(3); in PerformDAGCombine() local
1600 if (OutVal.hasOneUse()) { in PerformDAGCombine()
1601 unsigned BitWidth = OutVal.getValueSizeInBits(); in PerformDAGCombine()
1607 if (TLI.ShrinkDemandedConstant(OutVal, DemandedMask, TLO) || in PerformDAGCombine()
1608 TLI.SimplifyDemandedBits(OutVal, DemandedMask, Known, TLO)) in PerformDAGCombine()
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| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 1050 SDValue &OutVal = OutVals[I]; in LowerCall() local
1070 Chain, DL, FINode, OutVal, SizeNode, Out.Flags.getNonZeroByValAlign(), in LowerCall()
1073 OutVal = FINode; in LowerCall()
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| /llvm-project-15.0.7/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2726 SDValue OutVal = OutVals[i]; in LowerReturn() local
2733 } else if (OutVal.getValueSizeInBits() < 16) { in LowerReturn()
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