Searched refs:NegOp1 (Results 1 – 4 of 4) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineNegator.cpp | 328 Value *NegOp1 = negate(I->getOperand(1), Depth + 1); in visitImpl() local
329 if (!NegOp1) // Early return. in visitImpl()
335 return Builder.CreateSelect(I->getOperand(0), NegOp1, NegOp2, in visitImpl()
344 Value *NegOp1 = negate(I->getOperand(1), Depth + 1); in visitImpl() local
345 if (!NegOp1) in visitImpl()
347 return Builder.CreateShuffleVector(NegOp0, NegOp1, Shuf->getShuffleMask(), in visitImpl()
450 if (Value *NegOp1 = negate(Ops[1], Depth + 1)) { in visitImpl() local
451 NegatedOp = NegOp1; in visitImpl()
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| H A D | InstCombineAddSub.cpp | 1875 if (Value *NegOp1 = Negator::Negate(IsNegation, Op1, *this)) in visitSub() local
1876 return BinaryOperator::CreateAdd(NegOp1, Op0); in visitSub()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7339 SDValue NegOp1 = Neg.getOperand(1); in matchRotateSub() local
7368 if ((Pos == NegOp1) || in matchRotateSub()
7369 (NegOp1.getOpcode() == ISD::TRUNCATE && Pos == NegOp1.getOperand(0))) in matchRotateSub()
7381 else if (Pos.getOpcode() == ISD::ADD && Pos.getOperand(0) == NegOp1) { in matchRotateSub()
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| H A D | TargetLowering.cpp | 7255 SDValue NegOp1 = DAG.getNode(ISD::SUB, DL, ShVT, Zero, Op1); in expandROT() local
7258 SDValue HsAmt = DAG.getNode(ISD::AND, DL, ShVT, NegOp1, BitWidthMinusOneC); in expandROT()
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