History log of /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp (Results 1 – 25 of 29)
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Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2
# 9606c690 15-Feb-2022 Simon Pilgrim <[email protected]>

[InstCombine] Fold sub(Y,and(lshr(X,C),1)) --> add(ashr(shl(X,(BW-1)-C),BW-1),Y) (PR53610)

As noted on PR53610, we can fold a 'bit splat' negation of a shifted bitmask pattern into a pair of shifts.

[InstCombine] Fold sub(Y,and(lshr(X,C),1)) --> add(ashr(shl(X,(BW-1)-C),BW-1),Y) (PR53610)

As noted on PR53610, we can fold a 'bit splat' negation of a shifted bitmask pattern into a pair of shifts.

https://alive2.llvm.org/ce/z/eGrsoN

Differential Revision: https://reviews.llvm.org/D119715

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Revision tags: llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1
# 0d3add21 23-Nov-2021 Zarko Todorovski <[email protected]>

[llvm][NFC] Inclusive language: Reword replace uses of sanity in llvm/lib/Transform comments and asserts

Reworded some comments and asserts to avoid usage of `sanity check/test`

Reviewed By: dblaik

[llvm][NFC] Inclusive language: Reword replace uses of sanity in llvm/lib/Transform comments and asserts

Reworded some comments and asserts to avoid usage of `sanity check/test`

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D114372

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# e8535fa7 28-Oct-2021 Sanjay Patel <[email protected]>

[InstCombine] allow Negator to fold multi-use select with constant arms

The motivating test is reduced from:
https://llvm.org/PR52261

Note that the more general problem of folding any binop into a

[InstCombine] allow Negator to fold multi-use select with constant arms

The motivating test is reduced from:
https://llvm.org/PR52261

Note that the more general problem of folding any binop into a multi-use
select of constants is still there. We need to ease the restriction in
InstCombinerImpl::FoldOpIntoSelect() to catch those. But these examples
never reach that code because Negator exclusively handles negation
patterns within visitSub().

Differential Revision: https://reviews.llvm.org/D112657

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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3, llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1, llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2
# 302313a2 09-Feb-2021 Kazu Hirata <[email protected]>

[Transforms] Use range-based for loops (NFC)


Revision tags: llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1
# 29f8628d 05-Jan-2021 Juneyoung Lee <[email protected]>

[Constant] Add containsPoisonElement

This patch

- Adds containsPoisonElement that checks existence of poison in constant vector elements,
- Renames containsUndefElement to containsUndefOrPoisonElem

[Constant] Add containsPoisonElement

This patch

- Adds containsPoisonElement that checks existence of poison in constant vector elements,
- Renames containsUndefElement to containsUndefOrPoisonElement to clarify its behavior & updates its uses properly

With this patch, isGuaranteedNotToBeUndefOrPoison's tests w.r.t constant vectors are added because its analysis is improved.

Thanks!

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D94053

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# b3021a72 24-Dec-2020 Roman Lebedev <[email protected]>

[IR][InstCombine] Add m_ImmConstant(), that matches on non-ConstantExpr constants, and use it

A pattern to ignore ConstantExpr's is quite common, since they frequently
lead into infinite combine loo

[IR][InstCombine] Add m_ImmConstant(), that matches on non-ConstantExpr constants, and use it

A pattern to ignore ConstantExpr's is quite common, since they frequently
lead into infinite combine loops, so let's make writing it easier.

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Revision tags: llvmorg-11.0.1, llvmorg-11.0.1-rc2, llvmorg-11.0.1-rc1
# e465f9c3 03-Nov-2020 Roman Lebedev <[email protected]>

[InstCombine] Negator: - (C - %x) --> %x - C (PR47997)

This relaxes one-use restriction on that `sub` fold,
since apparently the addition of Negator broke
preexisting `C-(C2-X) --> X+(C-C2)` (with C

[InstCombine] Negator: - (C - %x) --> %x - C (PR47997)

This relaxes one-use restriction on that `sub` fold,
since apparently the addition of Negator broke
preexisting `C-(C2-X) --> X+(C-C2)` (with C=0) fold.

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# fed0f890 07-Oct-2020 Roman Lebedev <[email protected]>

InstCombine: Negator: don't rely on complexity sorting already being performed (PR47752)

In some cases, we can negate instruction if only one of it's operands
negates. Previously, we assumed that co

InstCombine: Negator: don't rely on complexity sorting already being performed (PR47752)

In some cases, we can negate instruction if only one of it's operands
negates. Previously, we assumed that constants would have been
canonicalized to RHS already, but that isn't guaranteed to happen,
because of InstCombine worklist visitation order,
as the added test (previously-hanging) shows.

So if we only need to negate a single operand,
we should ensure ourselves that we try constant operand first.
Do that by re-doing the complexity sorting ourselves,
when we actually care about it.

Fixes https://bugs.llvm.org/show_bug.cgi?id=47752

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Revision tags: llvmorg-11.0.0, llvmorg-11.0.0-rc6, llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4, llvmorg-11.0.0-rc3
# f6decfa3 23-Aug-2020 Roman Lebedev <[email protected]>

[InstCombine] Negator: freeze is freely negatible if it's operand is negatible


Revision tags: llvmorg-11.0.0-rc2
# 47aec80e 06-Aug-2020 Roman Lebedev <[email protected]>

[NFC][InstCombine] Negator: add a comment about negating exact arithmentic shift


# f3056dcc 05-Aug-2020 Roman Lebedev <[email protected]>

[InstCombine] Negator: -(cond ? x : -x) --> cond ? -x : x

We were errneously only doing that for old-style abs/nabs,
but we have no such legality check on the condition of the select.

https://ris

[InstCombine] Negator: -(cond ? x : -x) --> cond ? -x : x

We were errneously only doing that for old-style abs/nabs,
but we have no such legality check on the condition of the select.

https://rise4fun.com/Alive/xBHS

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# a05ec856 05-Aug-2020 Roman Lebedev <[email protected]>

[NFC][InstCombine] Negator: include all the needed headers, IWYU


# 3a3c9519 05-Aug-2020 Roman Lebedev <[email protected]>

[InstCombine] Negator: 0 - (X + Y) --> (-X) - Y iff a single operand negated

This was the most obvious regression in
f5df5cd5586ae9cfb2d9e53704dfc76f47aff149.f5df5cd5586ae9cfb2d9e53704dfc76f47aff

[InstCombine] Negator: 0 - (X + Y) --> (-X) - Y iff a single operand negated

This was the most obvious regression in
f5df5cd5586ae9cfb2d9e53704dfc76f47aff149.f5df5cd5586ae9cfb2d9e53704dfc76f47aff149

We really don't want to do this if the original/outermost subtraction
isn't a negation, and therefore doesn't go away - just sinking negation
isn't a win. We are actually appear to be missing folds so hoist it.

https://rise4fun.com/Alive/tiVe

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# f5df5cd5 05-Aug-2020 Roman Lebedev <[email protected]>

Recommit "[InstCombine] Negator: -(X << C) --> X * (-1 << C)"

This reverts commit ac70b37a00dc02bd8923e0a4602d26be4581c570
which reverted commit 8aeb2fe13a4100b4c2e78d6ef75119304100cb1f
because co

Recommit "[InstCombine] Negator: -(X << C) --> X * (-1 << C)"

This reverts commit ac70b37a00dc02bd8923e0a4602d26be4581c570
which reverted commit 8aeb2fe13a4100b4c2e78d6ef75119304100cb1f
because codegen tests got broken and i needed time to investigate.

This shows some regressions in tests, but they are all around GEP's,
so i'm not really sure how important those are.

https://rise4fun.com/Alive/1Gn

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# ac70b37a 05-Aug-2020 Roman Lebedev <[email protected]>

Revert "[InstCombine] Negator: -(X << C) --> X * (-1 << C)"

Breaks codegen tests, will recommit later.

This reverts commit 8aeb2fe13a4100b4c2e78d6ef75119304100cb1f.


# 8aeb2fe1 04-Aug-2020 Roman Lebedev <[email protected]>

[InstCombine] Negator: -(X << C) --> X * (-1 << C)

This shows some regressions in tests, but they are all around GEP's,
so i'm not really sure how important those are.

https://rise4fun.com/Alive/

[InstCombine] Negator: -(X << C) --> X * (-1 << C)

This shows some regressions in tests, but they are all around GEP's,
so i'm not really sure how important those are.

https://rise4fun.com/Alive/1Gn

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Revision tags: llvmorg-11.0.0-rc1, llvmorg-12-init, llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2
# 2a6c8715 03-Jun-2020 Sebastian Neubauer <[email protected]>

[InstCombine] Move target-specific inst combining

For a long time, the InstCombine pass handled target specific
intrinsics. Having target specific code in general passes was noted as
an area for imp

[InstCombine] Move target-specific inst combining

For a long time, the InstCombine pass handled target specific
intrinsics. Having target specific code in general passes was noted as
an area for improvement for a long time.

D81728 moves most target specific code out of the InstCombine pass.
Applying the target specific combinations in an extra pass would
probably result in inferior optimizations compared to the current
fixed-point iteration, therefore the InstCombine pass resorts to newly
introduced functions in the TargetTransformInfo when it encounters
unknown intrinsics.
The patch should not have any effect on generated code (under the
assumption that code never uses intrinsics from a foreign target).

This introduces three new functions:
TargetTransformInfo::instCombineIntrinsic
TargetTransformInfo::simplifyDemandedUseBitsIntrinsic
TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic

A few target specific parts are left in the InstCombine folder, where
it makes sense to share code. The largest left-over part in
InstCombineCalls.cpp is the code shared between arm and aarch64.

This allows to move about 3000 lines out from InstCombine to the targets.

Differential Revision: https://reviews.llvm.org/D81728

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# 84b4f5a6 17-Jun-2020 Roman Lebedev <[email protected]>

[InstCombine] Negator: while there, add detection for cycles during negation

I don't have any testcases showing it happening,
and i haven't succeeded in creating one,
but i'm also not positive it ca

[InstCombine] Negator: while there, add detection for cycles during negation

I don't have any testcases showing it happening,
and i haven't succeeded in creating one,
but i'm also not positive it can't ever happen,
and i recall having something that looked like
that in the very beginning of Negator creation.

But since we now already have a negation cache,
we can now detect such cases practically for free.

Let's do so instead of "relying" on stack overflow :D

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# e3d8cb1e 17-Jun-2020 Roman Lebedev <[email protected]>

[InstCombine] Negator: cache negation results (PR46362)

It is possible that we can try to negate the same value multiple times.
For example, PHI nodes may happen to have multiple incoming values
(al

[InstCombine] Negator: cache negation results (PR46362)

It is possible that we can try to negate the same value multiple times.
For example, PHI nodes may happen to have multiple incoming values
(all of which must be the same value) for the same incoming basic block.
It may happen that we try to negate such a PHI node, and succeed,
and that might result in having now-different incoming values..

To avoid that, and in general to reduce the amount of duplicated
work we might be doing, let's introduce a cache where
we'll track results of negating each value.

The added test was previously failing -verify after -instcombine.

Fixes https://bugs.llvm.org/show_bug.cgi?id=46362

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# c4166f3d 17-Jun-2020 Roman Lebedev <[email protected]>

[NFC][InstCombine] Negator: add thin negate() wrapped before visit()


# 2b851473 17-Jun-2020 Roman Lebedev <[email protected]>

[NFC][InstCombine] Negator: do not include unneeded "llvm/IR/DerivedTypes.h" header


# cd921acc 21-May-2020 Roman Lebedev <[email protected]>

[NFC] InstCombineNegator: use auto where type is obvious from the cast


# 55430f53 20-May-2020 Roman Lebedev <[email protected]>

[InstCombine] `insertelement` is negatible if both sources are negatible

----------------------------------------
define <2 x i4> @negate_insertelement(<2 x i4> %src, i4 %a, i32 %x, <2 x i4> %b) {
%

[InstCombine] `insertelement` is negatible if both sources are negatible

----------------------------------------
define <2 x i4> @negate_insertelement(<2 x i4> %src, i4 %a, i32 %x, <2 x i4> %b) {
%0:
%t0 = sub <2 x i4> { 0, 0 }, %src
%t1 = sub i4 0, %a
%t2 = insertelement <2 x i4> %t0, i4 %t1, i32 %x
%t3 = sub <2 x i4> %b, %t2
ret <2 x i4> %t3
}
=>
define <2 x i4> @negate_insertelement(<2 x i4> %src, i4 %a, i32 %x, <2 x i4> %b) {
%0:
%t2.neg = insertelement <2 x i4> %src, i4 %a, i32 %x
%t3 = add <2 x i4> %t2.neg, %b
ret <2 x i4> %t3
}
Transformation seems to be correct!

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# ebed96fd 20-May-2020 Roman Lebedev <[email protected]>

[InstCombine] Negator: `extractelement` is negatible if src is negatible

----------------------------------------
define i4 @negate_extractelement(<2 x i4> %x, i32 %y, i4 %z) {
%0:
%t0 = sub <2 x

[InstCombine] Negator: `extractelement` is negatible if src is negatible

----------------------------------------
define i4 @negate_extractelement(<2 x i4> %x, i32 %y, i4 %z) {
%0:
%t0 = sub <2 x i4> { 0, 0 }, %x
call void @use_v2i4(<2 x i4> %t0)
%t1 = extractelement <2 x i4> %t0, i32 %y
%t2 = sub i4 %z, %t1
ret i4 %t2
}
=>
define i4 @negate_extractelement(<2 x i4> %x, i32 %y, i4 %z) {
%0:
%t0 = sub <2 x i4> { 0, 0 }, %x
call void @use_v2i4(<2 x i4> %t0)
%t1.neg = extractelement <2 x i4> %x, i32 %y
%t2 = add i4 %t1.neg, %z
ret i4 %t2
}
Transformation seems to be correct!

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Revision tags: llvmorg-10.0.1-rc1
# a0004358 28-Apr-2020 Roman Lebedev <[email protected]>

[InstCombine] Negator: 'or' with no common bits set is just 'add'

In `InstCombiner::visitAdd()`, we have
```
// A+B --> A|B iff A and B have no bits set in common.
if (haveNoCommonBitsSet(LHS, R

[InstCombine] Negator: 'or' with no common bits set is just 'add'

In `InstCombiner::visitAdd()`, we have
```
// A+B --> A|B iff A and B have no bits set in common.
if (haveNoCommonBitsSet(LHS, RHS, DL, &AC, &I, &DT))
return BinaryOperator::CreateOr(LHS, RHS);
```
so we should handle such `or`'s here, too.

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