| /llvm-project-15.0.7/llvm/test/tools/llvm-readobj/ELF/ |
| H A D | mips-options-sec.test | 14 # CHECK-NEXT: Co-Proc Mask2: 0x1EFFEEDD
22 # CHECK-NEXT: Co-Proc Mask2: 0x0
42 # NAME-ERR-FOUND-NEXT: Co-Proc Mask2: 0x1EFFEEDD
50 # NAME-ERR-FOUND-NEXT: Co-Proc Mask2: 0x0
135 # KIND-NEXT: Co-Proc Mask2: 0x0
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| H A D | mips-reginfo.test | 12 # OPTIONS-NEXT: Co-Proc Mask2: 0x1EFFEEDD
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| /llvm-project-15.0.7/lld/test/ELF/ |
| H A D | mips-reginfo.s | 23 # CHECK-NEXT: Co-Proc Mask2: 0x0
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| H A D | mips-options.s | 40 # CHECK-NEXT: Co-Proc Mask2: 0x0
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| /llvm-project-15.0.7/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlanTransforms.cpp | 242 VPValue *Mask2 = getPredicatedMask(Region2); in mergeReplicateRegions() local
243 if (!Mask1 || Mask1 != Mask2) in mergeReplicateRegions()
250 assert(Mask1 && Mask2 && "both region must have conditions"); in mergeReplicateRegions()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 106 Register Mask2 = I->getOperand(4).getReg(); in expandAtomicCmpSwapSubword() local
159 .addReg(Mask2); in expandAtomicCmpSwapSubword()
414 Register Mask2 = I->getOperand(4).getReg(); in expandAtomicBinOpSubword() local
534 .addReg(OldVal).addReg(Mask2); in expandAtomicBinOpSubword()
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| H A D | MipsISelLowering.cpp | 1671 Register Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() local
1803 BuildMI(BB, DL, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask); in emitAtomicBinaryPartword()
1817 .addReg(Mask2) in emitAtomicBinaryPartword()
1920 Register Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() local
1990 BuildMI(BB, DL, TII->get(Mips::NOR), Mask2).addReg(Mips::ZERO).addReg(Mask); in emitAtomicCmpSwapPartword()
2009 .addReg(Mask2) in emitAtomicCmpSwapPartword()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMSystemRegister.td | 45 // Mask1 Mask2 Mask3 Enc12, Name
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| H A D | ARMISelLowering.cpp | 6044 SDValue Mask2 = DAG.getConstant(0x7fffffff, dl, MVT::i32); in LowerFCOPYSIGN() local
6048 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); in LowerFCOPYSIGN()
6057 SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2); in LowerFCOPYSIGN()
14342 unsigned Mask2 = N11C->getZExtValue(); in PerformORCombineToBFI() local
14347 (Mask == ~Mask2)) { in PerformORCombineToBFI()
14354 unsigned amt = countTrailingZeros(Mask2); in PerformORCombineToBFI()
14364 (~Mask == Mask2)) { in PerformORCombineToBFI()
14368 (Mask2 == 0xffff || Mask2 == 0xffff0000)) in PerformORCombineToBFI()
14375 DAG.getConstant(Mask2, DL, MVT::i32)); in PerformORCombineToBFI()
14685 unsigned Mask2 = N11C->getZExtValue(); in PerformBFICombine() local
[all …]
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| /llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSimplifyDemanded.cpp | 782 APInt Mask2 = LowBits | APInt::getSignMask(BitWidth); in SimplifyDemandedUseBits() local
783 if (SimplifyDemandedBits(I, 0, Mask2, LHSKnown, Depth + 1)) in SimplifyDemandedUseBits()
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| H A D | InstCombineCompares.cpp | 3276 APInt Mask2 = IsTrailing in foldICmpEqIntrinsicWithConstant() local
3280 ConstantInt::get(Ty, Mask2)); in foldICmpEqIntrinsicWithConstant()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Scalar/ |
| H A D | SROA.cpp | 2233 SmallVector<Constant *, 8> Mask2; in insertVector() local
2234 Mask2.reserve(cast<FixedVectorType>(VecTy)->getNumElements()); in insertVector()
2236 Mask2.push_back(IRB.getInt1(i >= BeginIndex && i < EndIndex)); in insertVector()
2238 V = IRB.CreateSelect(ConstantVector::get(Mask2), V, Old, Name + "blend"); in insertVector()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 8150 APInt Mask2 = APInt::getSplat(Sz, APInt(8, 0x33)); in expandBITREVERSE() local
8165 Tmp2 = DAG.getNode(ISD::AND, dl, VT, Tmp2, DAG.getConstant(Mask2, dl, VT)); in expandBITREVERSE()
8166 Tmp3 = DAG.getNode(ISD::AND, dl, VT, Tmp, DAG.getConstant(Mask2, dl, VT)); in expandBITREVERSE()
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| /llvm-project-15.0.7/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 15463 Value *Mask2 = ConstantVector::get(Consts); in EmitPPCBuiltinExpr() local
15465 Builder.CreateCall(Vperm, {Zero, AllElts, Mask2}, "shuffle2"), ResTy); in EmitPPCBuiltinExpr()
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