| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | botheightreduce.mir | 30 ; CHECK: [[LDX:%[0-9]+]]:g8rc = LDX [[ADDI8_]], [[LI8_]] :: (load (s64))
31 ; CHECK: [[LDX1:%[0-9]+]]:g8rc = LDX [[ADDI8_]], [[LI8_3]] :: (load (s64))
33 ; CHECK: [[LDX2:%[0-9]+]]:g8rc = LDX [[ADDI8_]], [[LI8_4]] :: (load (s64))
34 ; CHECK: [[LDX3:%[0-9]+]]:g8rc = LDX [[ADDI8_]], [[LI8_5]] :: (load (s64))
37 ; CHECK: [[MULLD:%[0-9]+]]:g8rc = MULLD [[LDX]], [[LD]]
71 %14:g8rc = LDX %2, %4 :: (load (s64))
72 %16:g8rc = LDX %2, %8 :: (load (s64))
74 %18:g8rc = LDX %2, %9 :: (load (s64))
75 %19:g8rc = LDX %2, %10 :: (load (s64))
76 %20:g8rc = LDX %2, %11 :: (load (s64))
[all …]
|
| H A D | fold-frame-offset-using-rr.mir | 25 ; CHECK: $x6 = LDX killed $x4, killed $x3
41 ; CHECK: $x6 = LDX killed $x4, killed $x3
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| H A D | convert-rr-to-ri-instrs-R0-special-handling.mir | 336 %2:g8rc = LDX %0, $x0 :: (load (s64) from %ir.1, !tbaa !3)
384 %2:g8rc = LDX $zero8, %1 :: (load (s64) from %ir.1, !tbaa !3)
431 %2:g8rc = LDX %0, $x0 :: (load (s64) from %ir.1, !tbaa !3)
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| H A D | convert-rr-to-ri-instrs-kill-flag.mir | 154 $x3 = LDX $zero8, killed $x3
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| H A D | convert-rr-to-ri-instrs.mir | 2864 %7 = LDX %0, killed %6 :: (load (s64) from %ir.arrayidx, !tbaa !10)
2871 %12 = LDX %0, killed %11 :: (load (s64) from %ir.arrayidx3, !tbaa !10)
|
| /llvm-project-15.0.7/llvm/unittests/tools/llvm-exegesis/PowerPC/ |
| H A D | SnippetGeneratorTest.cpp | 116 const unsigned Opcode = PPC::LDX; in TEST_F()
|
| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCMacroFusion.def | 106 FUSION_OP_SET(LD, LDX, LDXTLS, LDXTLS_),
|
| H A D | PPCRegisterInfo.cpp | 103 ImmToIdxMap[PPC::LD] = PPC::LDX; ImmToIdxMap[PPC::STD] = PPC::STDX; in PPCRegisterInfo()
148 ImmToIdxMap[PPC::PLD] = PPC::LDX; ImmToIdxMap[PPC::PSTD] = PPC::STDX; in PPCRegisterInfo()
|
| H A D | PPCInstrInfo.cpp | 3101 MI.setDesc(get(PPC::LDX)); in expandPostRAPseudo()
4115 case PPC::LDX: in instrHasImmForm()
4148 case PPC::LDX: III.ImmOpcode = PPC::LD; III.ImmMustBeMultipleOf = 4; break; in instrHasImmForm()
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| H A D | P10InstrResources.td | 1330 LDX, LDXTLS, LDXTLS_, SPILLTOVSR_LDX,
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| H A D | PPCInstr64Bit.td | 1381 def LDX : XForm_1_memOp<31, 21, (outs g8rc:$rD), (ins memrr:$src),
1897 def : Pat<(atomic_load_64 XForm:$src), (LDX memrr:$src)>;
|
| H A D | PPCInstrP10.td | 2253 (VINSDRX $vDi, InsertEltShift.Left3, (LDX memrr:$rA))>;
2300 (VINSDLX $vDi, InsertEltShift.Left3, (LDX memrr:$rA))>;
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| H A D | PPCFastISel.cpp | 565 case PPC::LD: Opc = PPC::LDX; break; in PPCEmitLoad()
|
| /llvm-project-15.0.7/lld/ELF/Arch/ |
| H A D | PPC64.cpp | 34 LDX = 21, enumerator
835 case LDX: in getPPCDFormOp()
|
| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcInstr64Bit.td | 239 defm LDX : Load<"ldx", 0b001011, load, I64Regs, i64>;
|
| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMInstrInfo.td | 4665 def LDX : AMulDualI64<1, sub, 1, (outs GPRnopc:$RdLo, GPRnopc:$RdHi),
|