| /llvm-project-15.0.7/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyInstrInfo.td | 18 def IsPIC : Predicate<"TM.isPositionIndependent()">;
390 (GLOBAL_GET_I32 tglobaladdr:$addr)>, Requires<[IsPIC, HasAddr32]>;
392 (GLOBAL_GET_I64 tglobaladdr:$addr)>, Requires<[IsPIC, HasAddr64]>;
395 (CONST_I32 tglobaladdr:$addr)>, Requires<[IsPIC, HasAddr32]>;
397 (CONST_I64 tglobaladdr:$addr)>, Requires<[IsPIC, HasAddr64]>;
410 (GLOBAL_GET_I32 texternalsym:$addr)>, Requires<[IsPIC, HasAddr32]>;
412 (GLOBAL_GET_I64 texternalsym:$addr)>, Requires<[IsPIC, HasAddr64]>;
420 (CONST_I32 texternalsym:$addr)>, Requires<[IsPIC, HasAddr32]>;
422 (CONST_I64 texternalsym:$addr)>, Requires<[IsPIC, HasAddr64]>;
|
| /llvm-project-15.0.7/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.h | 131 bool IsPIC = isPositionIndependent(); variable
133 if (IsPIC)
142 if (!IsPIC)
|
| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsBranchExpansion.cpp | 176 bool IsPIC; member in __anon32acd99a0111::MipsBranchExpansion
424 if (IsPIC) { in expandToLongBranch()
838 (Br->isUnconditionalBranch() && IsPIC))) { in handlePossibleLongBranch()
880 IsPIC = TM.isPositionIndependent(); in runOnMachineFunction()
885 if (IsPIC && ABI.IsO32() && in runOnMachineFunction()
|
| H A D | MipsISelLowering.cpp | 3172 bool IsPIC = isPositionIndependent(); in LowerCall() local
3394 if (!Subtarget.isABICalls() && !IsPIC) { in LowerCall()
3421 if (IsPIC) { in LowerCall()
3446 if (!IsPIC) // static in LowerCall()
3466 getOpndList(Ops, RegsToPass, IsPIC, GlobalOrExternal, InternalLinkage, in LowerCall()
|
| /llvm-project-15.0.7/clang/lib/Driver/ToolChains/Arch/ |
| H A D | Mips.cpp | 228 bool IsPIC = false; in getMIPSTargetFeatures() local
240 IsPIC = in getMIPSTargetFeatures()
257 if (ABICallsArg && !UseAbiCalls && IsPIC) { in getMIPSTargetFeatures()
|
| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonFrameLowering.cpp | 1383 bool IsPIC = HTM.isPositionIndependent(); in insertCSRSpillsInBlock() local
1391 SpillOpc = IsPIC ? Hexagon::SAVE_REGISTERS_CALL_V4STK_EXT_PIC in insertCSRSpillsInBlock()
1394 SpillOpc = IsPIC ? Hexagon::SAVE_REGISTERS_CALL_V4STK_PIC in insertCSRSpillsInBlock()
1398 SpillOpc = IsPIC ? Hexagon::SAVE_REGISTERS_CALL_V4_EXT_PIC in insertCSRSpillsInBlock()
1401 SpillOpc = IsPIC ? Hexagon::SAVE_REGISTERS_CALL_V4_PIC in insertCSRSpillsInBlock()
1448 bool IsPIC = HTM.isPositionIndependent(); in insertCSRRestoresInBlock() local
1459 RetOpc = IsPIC ? Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT_PIC in insertCSRRestoresInBlock()
1462 RetOpc = IsPIC ? Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4_PIC in insertCSRRestoresInBlock()
1472 RetOpc = IsPIC ? Hexagon::RESTORE_DEALLOC_RET_JMP_V4_EXT_PIC in insertCSRRestoresInBlock()
1475 RetOpc = IsPIC ? Hexagon::RESTORE_DEALLOC_RET_JMP_V4_PIC in insertCSRRestoresInBlock()
|
| /llvm-project-15.0.7/bolt/lib/Core/ |
| H A D | BinaryContext.cpp | 116 BinaryContext::createBinaryContext(const ObjectFile *File, bool IsPIC, in createBinaryContext() argument
180 TheTarget->createMCObjectFileInfo(*Ctx, IsPIC)); in createBinaryContext()
190 if (IsPIC) { in createBinaryContext()
246 BC->HasFixedLoadAddress = !IsPIC; in createBinaryContext()
|
| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kInstrControl.td | 266 defm : CallPat<CALLq, IsPIC>;
|
| H A D | M68kInstrInfo.td | 430 def IsPIC : Predicate<"TM.isPositionIndependent()">;
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 437 bool IsPIC = false; member in __anonad53f99c0111::X86AsmParser::IntelExprStateMachine
479 bool isPIC() const { return IsPIC; } in isPIC()
480 void setPIC() { IsPIC = true; } in setPIC()
488 if (IsPIC && AttachToOperandIdx) in regsUseUpError()
|
| /llvm-project-15.0.7/bolt/include/bolt/Core/ |
| H A D | BinaryContext.h | 226 createBinaryContext(const ObjectFile *File, bool IsPIC,
|
| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 3076 if (IsPIC) { in getLabelAccessInfo()
3147 bool IsPIC = isPositionIndependent(); in LowerConstantPool() local
3150 if (IsPIC && Subtarget.isSVR4ABI()) { in LowerConstantPool()
3160 return LowerLabelRef(CPIHi, CPILo, IsPIC, DAG); in LowerConstantPool()
3235 bool IsPIC = isPositionIndependent(); in LowerJumpTable() local
3238 if (IsPIC && Subtarget.isSVR4ABI()) { in LowerJumpTable()
3246 return LowerLabelRef(JTIHi, JTILo, IsPIC, DAG); in LowerJumpTable()
3280 bool IsPIC = isPositionIndependent(); in LowerBlockAddress() local
3483 bool IsPIC = isPositionIndependent(); in LowerGlobalAddress() local
3486 if (IsPIC && Subtarget.isSVR4ABI()) { in LowerGlobalAddress()
[all …]
|
| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMExpandPseudoInsts.cpp | 2560 bool IsPIC = in ExpandMI() local
2575 if (IsPIC) { in ExpandMI()
2594 if (IsPIC) { in ExpandMI()
|
| /llvm-project-15.0.7/bolt/lib/Rewrite/ |
| H A D | RewriteInstance.cpp | 343 bool IsPIC = false; in RewriteInstance() local
348 IsPIC = true; in RewriteInstance()
352 File, IsPIC, in RewriteInstance()
|
| /llvm-project-15.0.7/llvm/docs/ |
| H A D | WritingAnLLVMBackend.rst | 1911 : (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
|