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Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4 |
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8a23df89 |
| 17-May-2022 |
Alex Bradbury <[email protected]> |
[WebAssembly][NFC] Convert IsWasm64 instruction field to 'bit' from string
Extends the cleanup in D125713 to IsWasm64.
Differential Revision: https://reviews.llvm.org/D125714
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601ed0b6 |
| 17-May-2022 |
Alex Bradbury <[email protected]> |
[WebAssembly][NFC] Convert StackBased instruction field to 'bit' from string
This is (IMHO) cleaner and (objectively) more strongly typed than using strings.
A follow-on patch will do the same for
[WebAssembly][NFC] Convert StackBased instruction field to 'bit' from string
This is (IMHO) cleaner and (objectively) more strongly typed than using strings.
A follow-on patch will do the same for IsWasm64.
Differential Revision: https://reviews.llvm.org/D125713
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Revision tags: llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3 |
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c832edfd |
| 07-Mar-2022 |
Sam Clegg <[email protected]> |
[WebAssembly] Add new target feature in support of 'extended-const' proposal
We don't yet do anything when this feature is enabled, this change just lays the ground work by accepting that there is s
[WebAssembly] Add new target feature in support of 'extended-const' proposal
We don't yet do anything when this feature is enabled, this change just lays the ground work by accepting that there is such a feature.
See https://github.com/WebAssembly/extended-const
Differential Revision: https://reviews.llvm.org/D121151
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Revision tags: llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2 |
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a96d8285 |
| 05-Dec-2021 |
Paulo Matos <[email protected]> |
[WebAssembly] Implementation of intrinsic for ref.null and HeapType removal
This patch implements the intrinsic for ref.null. In the process of implementing int_wasm_ref_null_func() and int_wasm_ref
[WebAssembly] Implementation of intrinsic for ref.null and HeapType removal
This patch implements the intrinsic for ref.null. In the process of implementing int_wasm_ref_null_func() and int_wasm_ref_null_extern() intrinsics, it removes the redundant HeapType.
This also causes the textual assembler syntax for ref.null to change. Instead of receiving an argument: `func` or `extern`, the instruction mnemonic is either ref.null_func or ref.null_extern, without the need for a further operand.
Reviewed By: tlively
Differential Revision: https://reviews.llvm.org/D114979
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Revision tags: llvmorg-13.0.1-rc1 |
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9261ee32 |
| 29-Sep-2021 |
Heejin Ahn <[email protected]> |
[WebAssembly] Make EH work with dynamic linking
This makes Wasm EH work with dynamic linking. So far we were only able to handle destructors, which do not use any tags or LSDA info.
1. This uses `T
[WebAssembly] Make EH work with dynamic linking
This makes Wasm EH work with dynamic linking. So far we were only able to handle destructors, which do not use any tags or LSDA info.
1. This uses `TargetExternalSymbol` for `GCC_except_tableN` symbols, which points to the address of per-function LSDA info. It is more convenient to use than `MCSymbol` because it can take additional target flags.
2. When lowering `wasm_lsda` intrinsic, if PIC is enabled, make the symbol relative to `__memory_base` and generate the `add` node. If PIC is disabled, continue to use the absolute address.
3. Make tag symbols (`__cpp_exception` and `__c_longjmp`) undefined in the backend, because it is hard to make it work with dynamic linking's loading order. Instead, we make all tag symbols undefined in the LLVM backend and import it from JS.
4. Add support for undefined tags to the linker.
Companion patches: - https://github.com/WebAssembly/binaryen/pull/4223 - https://github.com/emscripten-core/emscripten/pull/15266
Reviewed By: sbc100
Differential Revision: https://reviews.llvm.org/D111388
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4 |
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2f519825 |
| 23-Sep-2021 |
Thomas Lively <[email protected]> |
[WebAssembly] Add prototype relaxed SIMD fma/fms instructions
Add experimental clang builtins, LLVM intrinsics, and backend definitions for the new {f32x4,f64x2}.{fma,fms} instructions in the relaxe
[WebAssembly] Add prototype relaxed SIMD fma/fms instructions
Add experimental clang builtins, LLVM intrinsics, and backend definitions for the new {f32x4,f64x2}.{fma,fms} instructions in the relaxed SIMD proposal: https://github.com/WebAssembly/relaxed-simd/blob/main/proposals/relaxed-simd/Overview.md. Do not allow these instructions to be selected without explicit user opt-in.
Differential Revision: https://reviews.llvm.org/D110295
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Revision tags: llvmorg-13.0.0-rc3 |
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ef8c9135 |
| 26-Aug-2021 |
Sam Clegg <[email protected]> |
[WebAssembly] Allow import and export of TLS symbols between DSOs
We previously had a limitation that TLS variables could not be exported (and therefore could also not be imported). This change rem
[WebAssembly] Allow import and export of TLS symbols between DSOs
We previously had a limitation that TLS variables could not be exported (and therefore could also not be imported). This change removed that limitation.
Differential Revision: https://reviews.llvm.org/D108877
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c32884c4 |
| 02-Sep-2021 |
Sam Clegg <[email protected]> |
[WebAssembly] Rename WrapperPIC -> WrapperREL. NFC
This ISD node/wrapper represents am address which is relative to a base address and therefore lowers to `i32.const` rather than `global.get`.
Use
[WebAssembly] Rename WrapperPIC -> WrapperREL. NFC
This ISD node/wrapper represents am address which is relative to a base address and therefore lowers to `i32.const` rather than `global.get`.
Use this wrapper type for TLS-relative addresses, paving the way for the non-REL wrapper to be used to external TLS address once those are supported.
Differential Revision: https://reviews.llvm.org/D109179
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4664590d |
| 02-Sep-2021 |
Sam Clegg <[email protected]> |
[WebAssemlby] Remove redundant SDTypeProfile. NFC
I added this back in https://reviews.llvm.org/D54647 but it wasn't actually needed.
Differential Revision: https://reviews.llvm.org/D109176
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ad2f94f3 |
| 02-Sep-2021 |
Sam Clegg <[email protected]> |
[WebAssembly] Fix names of WebAssemblyWrapper SDNodes. NFC
Other platforms all use CamelCase as normal for these wrapper nodes.
Differential Revision: https://reviews.llvm.org/D109172
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Revision tags: llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1 |
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31a71a39 |
| 02-Aug-2021 |
Heejin Ahn <[email protected]> |
[WebAssembly] Make result of 'catch' inst variadic
`catch` instruction can have any number of result values depending on its tag, but so far we have only needed a single i32 return value for C++ exc
[WebAssembly] Make result of 'catch' inst variadic
`catch` instruction can have any number of result values depending on its tag, but so far we have only needed a single i32 return value for C++ exception so the instruction was specified that way. But using the instruction for SjLj handling requires multiple return values.
This makes `catch` instruction's results variadic and moves selection of `throw` and `catch` instruction from ISelLowering to ISelDAGToDAG. Moving `catch` to ISelDAGToDAG is necessary because I am not aware of a good way to do instruction selection for variadic output instructions in TableGen. This also moves `throw` because 1. `throw` and `catch` share the same utility function and 2. there is really no reason we should do that in ISelLowering in the first place. What we do is mostly the same in both places, and moving them to ISelDAGToDAG allows us to remove unnecessary mid-level nodes for `throw` and `catch` in WebAssemblyISD.def and WebAssemblyInstrInfo.td.
This also adds handling for new `catch` instruction to AsmTypeCheck.
Reviewed By: dschuff, tlively
Differential Revision: https://reviews.llvm.org/D107423
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Revision tags: llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2 |
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9647a6f7 |
| 07-Jun-2021 |
Wouter van Oortmerssen <[email protected]> |
[WebAssembly] Added initial type checker to MC Assembler
This to protect against non-sensical instruction sequences being assembled, which would either cause asserts/crashes further down, or a Wasm
[WebAssembly] Added initial type checker to MC Assembler
This to protect against non-sensical instruction sequences being assembled, which would either cause asserts/crashes further down, or a Wasm module being output that doesn't validate.
Unlike a validator, this type checker is able to give type-errors as part of the parsing process, which makes the assembler much friendlier to be used by humans writing manual input.
Because the MC system is single pass (instructions aren't even stored in MC format, they are directly output) the type checker has to be single pass as well, which means that from now on .globaltype and .functype decls must come before their use. An extra pass is added to Codegen to collect information for this purpose, since AsmPrinter is normally single pass / streaming as well, and would otherwise generate this information on the fly.
A `-no-type-check` flag was added to llvm-mc (and any other tools that take asm input) that surpresses type errors, as a quick escape hatch for tests that were not intended to be type correct.
This is a first version of the type checker that ignores control flow, i.e. it checks that types are correct along the linear path, but not the branch path. This will still catch most errors. Branch checking could be added in the future.
Differential Revision: https://reviews.llvm.org/D104945
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1d891d44 |
| 15-Jun-2021 |
Heejin Ahn <[email protected]> |
[WebAssembly] Rename event to tag
We recently decided to change 'event' to 'tag', and 'event section' to 'tag section', out of the rationale that the section contains a generalized tag that referenc
[WebAssembly] Rename event to tag
We recently decided to change 'event' to 'tag', and 'event section' to 'tag section', out of the rationale that the section contains a generalized tag that references a type, which may be used for something other than exceptions, and the name 'event' can be confusing in the web context.
See - https://github.com/WebAssembly/exception-handling/issues/159#issuecomment-857910130 - https://github.com/WebAssembly/exception-handling/pull/161
Reviewed By: tlively
Differential Revision: https://reviews.llvm.org/D104423
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Revision tags: llvmorg-12.0.1-rc1 |
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82f92e35 |
| 21-Apr-2021 |
Andy Wingo <[email protected]> |
[WebAssembly][CodeGen] IR support for WebAssembly local variables
This patch adds TargetStackID::WasmLocal. This stack holds locations of values that are only addressable by name -- not via a point
[WebAssembly][CodeGen] IR support for WebAssembly local variables
This patch adds TargetStackID::WasmLocal. This stack holds locations of values that are only addressable by name -- not via a pointer to memory. For the WebAssembly target, these objects are lowered to WebAssembly local variables, which are managed by the WebAssembly run-time and are not addressable by linear memory.
For the WebAssembly target IR indicates that an AllocaInst should be put on TargetStackID::WasmLocal by putting it in the non-integral address space WASM_ADDRESS_SPACE_WASM_VAR, with value 1. SROA will mostly lift these allocations to SSA locals, but any alloca that reaches instruction selection (usually in non-optimized builds) will be assigned the new TargetStackID there. Loads and stores to those values are transformed to new WebAssemblyISD::LOCAL_GET / WebAssemblyISD::LOCAL_SET nodes, which then lower to the type-specific LOCAL_GET_I32 etc instructions via tablegen patterns.
Differential Revision: https://reviews.llvm.org/D101140
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bc1ad6e3 |
| 31-May-2021 |
Andy Wingo <[email protected]> |
Revert "[WebAssembly][CodeGen] IR support for WebAssembly local variables"
This reverts commit bf35f4af51cddd743435bb6b94a45592c967891a. There was an error in a shared-library build.
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bf35f4af |
| 21-Apr-2021 |
Andy Wingo <[email protected]> |
[WebAssembly][CodeGen] IR support for WebAssembly local variables
This patch adds TargetStackID::WasmLocal. This stack holds locations of values that are only addressable by name -- not via a point
[WebAssembly][CodeGen] IR support for WebAssembly local variables
This patch adds TargetStackID::WasmLocal. This stack holds locations of values that are only addressable by name -- not via a pointer to memory. For the WebAssembly target, these objects are lowered to WebAssembly local variables, which are managed by the WebAssembly run-time and are not addressable by linear memory.
For the WebAssembly target IR indicates that an AllocaInst should be put on TargetStackID::WasmLocal by putting it in the non-integral address space WASM_ADDRESS_SPACE_WASM_VAR, with value 1. SROA will mostly lift these allocations to SSA locals, but any alloca that reaches instruction selection (usually in non-optimized builds) will be assigned the new TargetStackID there. Loads and stores to those values are transformed to new WebAssemblyISD::LOCAL_GET / WebAssemblyISD::LOCAL_SET nodes, which then lower to the type-specific LOCAL_GET_I32 etc instructions via tablegen patterns.
Differential Revision: https://reviews.llvm.org/D101140
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ca5f07f8 |
| 28-May-2021 |
Andy Wingo <[email protected]> |
Revert "[WebAssembly][CodeGen] IR support for WebAssembly local variables"
This reverts commit 00ecf18979e3326b3afee8af3dc701c53ffdc93f, as it broke the AMDGPU build. Will reland later with a fix.
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00ecf189 |
| 21-Apr-2021 |
Andy Wingo <[email protected]> |
[WebAssembly][CodeGen] IR support for WebAssembly local variables
This patch adds TargetStackID::WasmLocal. This stack holds locations of values that are only addressable by name -- not via a point
[WebAssembly][CodeGen] IR support for WebAssembly local variables
This patch adds TargetStackID::WasmLocal. This stack holds locations of values that are only addressable by name -- not via a pointer to memory. For the WebAssembly target, these objects are lowered to WebAssembly local variables, which are managed by the WebAssembly run-time and are not addressable by linear memory.
For the WebAssembly target IR indicates that an AllocaInst should be put on TargetStackID::WasmLocal by putting it in the non-integral address space WASM_ADDRESS_SPACE_WASM_VAR, with value 1. SROA will mostly lift these allocations to SSA locals, but any alloca that reaches instruction selection (usually in non-optimized builds) will be assigned the new TargetStackID there. Loads and stores to those values are transformed to new WebAssemblyISD::LOCAL_GET / WebAssemblyISD::LOCAL_SET nodes, which then lower to the type-specific LOCAL_GET_I32 etc instructions via tablegen patterns.
Differential Revision: https://reviews.llvm.org/D101140
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d7086af2 |
| 04-May-2021 |
Paulo Matos <[email protected]> |
[WebAssembly] Support for WebAssembly globals in LLVM IR
This patch adds support for WebAssembly globals in LLVM IR, representing them as pointers to global values, in a non-default, non-integral ad
[WebAssembly] Support for WebAssembly globals in LLVM IR
This patch adds support for WebAssembly globals in LLVM IR, representing them as pointers to global values, in a non-default, non-integral address space. Instruction selection legalizes loads and stores to these pointers to new WebAssemblyISD nodes GLOBAL_GET and GLOBAL_SET. Once the lowering creates the new nodes, tablegen pattern matches those and converts them to Wasm global.get/set of the appropriate type.
Based on work by Paulo Matos in https://reviews.llvm.org/D95425.
Reviewed By: pmatos
Differential Revision: https://reviews.llvm.org/D101608
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Revision tags: llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4 |
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04e9cd09 |
| 25-Mar-2021 |
Wouter van Oortmerssen <[email protected]> |
[WebAssembly] Fix for PIC external symbol ISEL
wasm64 was missing DAG ISEL patterns for external symbol based global.get, but simply adding these analogous to the existing 32-bit versions doesn't wo
[WebAssembly] Fix for PIC external symbol ISEL
wasm64 was missing DAG ISEL patterns for external symbol based global.get, but simply adding these analogous to the existing 32-bit versions doesn't work. This is because we are conflating the 32-bit global index with the pointer represented by the external symbol, which for wasm32 happened to work. The simplest fix is to pretend we have a 64-bit global index. This sounds incorrect, but is immaterial since once this index is stored as a MachineOperand it becomes 64-bit anyway (and has been all along). As such, the EmitInstrWithCustomInserter based implementation I experimented with become a no-op and no further changes in the C++ code are required.
Differential Revision: https://reviews.llvm.org/D99904
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92e77714 |
| 31-Mar-2021 |
Sam Parker <[email protected]> |
[WebAssembly] Invert branch condition on xor input
A frequent pattern for floating point conditional branches use an xor to invert the input for the branch. Instead we can fold away the xor by swapp
[WebAssembly] Invert branch condition on xor input
A frequent pattern for floating point conditional branches use an xor to invert the input for the branch. Instead we can fold away the xor by swapping the branch target instead.
Differential Revision: https://reviews.llvm.org/D99171
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8638c897 |
| 18-Mar-2021 |
Thomas Lively <[email protected]> |
[WebAssembly] Remove unimplemented-simd target feature
Now that the WebAssembly SIMD specification is finalized and engines are generally up-to-date, there is no need for a separate target feature f
[WebAssembly] Remove unimplemented-simd target feature
Now that the WebAssembly SIMD specification is finalized and engines are generally up-to-date, there is no need for a separate target feature for gating SIMD instructions that engines have not implemented. With this change, v128.const is now enabled by default with the simd128 target feature.
Differential Revision: https://reviews.llvm.org/D98457
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Revision tags: llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2 |
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698c6b0a |
| 05-Feb-2021 |
Dan Gohman <[email protected]> |
[WebAssembly] Support single-floating-point immediate value
As mentioned in TODO comment, casting double to float causes NaNs to change bits. To avoid the change, this patch adds support for single-
[WebAssembly] Support single-floating-point immediate value
As mentioned in TODO comment, casting double to float causes NaNs to change bits. To avoid the change, this patch adds support for single-floating-point immediate value on MachineCode.
Patch by Yuta Saito.
Differential Revision: https://reviews.llvm.org/D77384
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Revision tags: llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1 |
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52e240a0 |
| 26-Dec-2020 |
Heejin Ahn <[email protected]> |
[WebAssembly] Remove exnref and br_on_exn
This removes `exnref` type and `br_on_exn` instruction. This is effectively NFC because most uses of these were already removed in the previous CLs.
Review
[WebAssembly] Remove exnref and br_on_exn
This removes `exnref` type and `br_on_exn` instruction. This is effectively NFC because most uses of these were already removed in the previous CLs.
Reviewed By: dschuff, tlively
Differential Revision: https://reviews.llvm.org/D94041
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9e4eadeb |
| 26-Dec-2020 |
Heejin Ahn <[email protected]> |
[WebAssembly] Update basic EH instructions for the new spec
This implements basic instructions for the new spec.
- Adds new versions of instructions: `catch`, `catch_all`, and `rethrow` - Adds supp
[WebAssembly] Update basic EH instructions for the new spec
This implements basic instructions for the new spec.
- Adds new versions of instructions: `catch`, `catch_all`, and `rethrow` - Adds support for instruction selection for the new instructions - `catch` needs a custom routine for the same reason `throw` needs one, to encode `__cpp_exception` tag symbol. - Updates `WebAssembly::isCatch` utility function to include `catch_all` and Change code that compares an instruction's opcode with `catch` to use that function. - LateEHPrepare - Previously in LateEHPrepare we added `catch` instruction to both `catchpad`s (for user catches) and `cleanuppad`s (for destructors). In the new version `catch` is generated from `llvm.catch` intrinsic in instruction selection phase, so we only need to add `catch_all` to the beginning of cleanup pads. - `catch` is generated from instruction selection, but we need to hoist the `catch` instruction to the beginning of every EH pad, because `catch` can be in the middle of the EH pad or even in a split BB from it after various code transformations. - Removes `addExceptionExtraction` function, which was used to generate `br_on_exn` before. - CFGStackfiy: Deletes `fixUnwindMismatches` function. Running this function on the new instruction causes crashes, and the new version will be added in a later CL, whose contents will be completely different. So deleting the whole function will make the diff easier to read. - Reenables all disabled tests in exception.ll and eh-lsda.ll and a single basic test in cfg-stackify-eh.ll. - Updates existing tests to use the new assembly format. And deletes `br_on_exn` instructions from the tests and FileCheck lines.
Reviewed By: dschuff, tlively
Differential Revision: https://reviews.llvm.org/D94040
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