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/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonMapAsm2IntrinV62.gen.td9 multiclass T_VR_HVX_gen_pat <InstHexagon MI, Intrinsic IntID> {
10 def: Pat<(IntID HvxVR:$src1, IntRegs:$src2),
25 def: Pat<(IntID HvxVR:$src1, HvxVR:$src2),
32 def: Pat<(IntID HvxWR:$src1, HvxWR:$src2),
39 def: Pat<(IntID HvxWR:$src1, HvxVR:$src2, HvxVR:$src3),
47 def: Pat<(IntID HvxWR:$src1, IntRegs:$src2),
70 def: Pat<(IntID HvxQR:$src1, IntRegs:$src2),
85 def: Pat<(IntID HvxQR:$src1, HvxVR:$src2),
92 def: Pat<(IntID IntRegs:$src1),
99 def: Pat<(IntID HvxQR:$src1, HvxQR:$src2),
[all …]
H A DHexagonIntrinsicsV60.td84 multiclass T_R_pat <InstHexagon MI, Intrinsic IntID> {
91 def: Pat<(IntID HvxVR:$src1),
99 def: Pat<(IntID HvxWR:$src1),
107 def: Pat<(IntID HvxQR:$src1),
115 def: Pat<(IntID HvxWR:$src1, IntRegs:$src2),
123 def: Pat<(IntID HvxVR:$src1, IntRegs:$src2),
131 def: Pat<(IntID HvxWR:$src1, HvxVR:$src2),
139 def: Pat<(IntID HvxWR:$src1, HvxWR:$src2),
147 def: Pat<(IntID HvxVR:$src1, HvxVR:$src2),
155 def: Pat<(IntID HvxQR:$src1, IntRegs:$src2),
[all …]
H A DHexagonIntrinsics.td11 class T_R_pat <InstHexagon MI, Intrinsic IntID>
12 : Pat <(IntID I32:$Rs),
15 class T_RR_pat <InstHexagon MI, Intrinsic IntID>
16 : Pat <(IntID I32:$Rs, I32:$Rt),
19 class T_RP_pat <InstHexagon MI, Intrinsic IntID>
20 : Pat <(IntID I32:$Rs, I64:$Rt),
187 : Pat<(IntID I32:$Rs, Val:$Rt, I32:$Ru),
372 def: Pat<(!cast<Intrinsic>(IntID#"_128B")
380 def: Pat<(!cast<Intrinsic>(IntID#"_128B")
398 def: Pat<(!cast<Intrinsic>(IntID#"_128B")
[all …]
H A DHexagonOptimizeSZextends.cpp47 bool intrinsicAlreadySextended(Intrinsic::ID IntID);
56 bool HexagonOptimizeSZextends::intrinsicAlreadySextended(Intrinsic::ID IntID) { in intrinsicAlreadySextended() argument
57 switch(IntID) { in intrinsicAlreadySextended()
H A DHexagonVectorCombine.cpp103 Value *createHvxIntrinsic(IRBuilder<> &Builder, Intrinsic::ID IntID,
1230 Intrinsic::ID IntID, Type *RetTy, in createHvxIntrinsic() argument
1279 Function *FI = Intrinsic::getDeclaration(F.getParent(), IntID); in createHvxIntrinsic()
H A DHexagonISelLowering.cpp3625 Intrinsic::ID IntID = (SZ == 32) ? Intrinsic::hexagon_L2_loadw_locked in emitLoadLinked() local
3627 Function *Fn = Intrinsic::getDeclaration(M, IntID); in emitLoadLinked()
3651 Intrinsic::ID IntID = (SZ == 32) ? Intrinsic::hexagon_S2_storew_locked in emitStoreConditional() local
3653 Function *Fn = Intrinsic::getDeclaration(M, IntID); in emitStoreConditional()
/llvm-project-15.0.7/llvm/lib/Transforms/ObjCARC/
H A DARCRuntimeEntryPoints.h138 Function *getIntrinsicEntryPoint(Function *&Decl, Intrinsic::ID IntID) { in getIntrinsicEntryPoint() argument
142 return Decl = Intrinsic::getDeclaration(TheModule, IntID); in getIntrinsicEntryPoint()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCInstrAltivec.td268 class VA1a_Int_Ty<bits<6> xo, string opc, Intrinsic IntID, ValueType Ty>
271 [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB, Ty:$vC))]>;
288 (IntID In1Ty:$vA, In1Ty:$vB, In2Ty:$vC))]>;
294 [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB))]>;
302 [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB))]>;
310 [(set OutTy:$vD, (IntID In1Ty:$vA, In2Ty:$vB))]>;
313 class VX2_Int_SP<bits<11> xo, string opc, Intrinsic IntID>
316 [(set v4f32:$vD, (IntID v4f32:$vB))]>;
324 [(set OutTy:$vD, (IntID InTy:$vB))]>;
329 [(set Ty:$vD, (IntID Ty:$vA))]>;
[all …]
H A DPPCISelDAGToDAG.cpp5052 auto IntID = N->getConstantOperandVal(0); in Select() local
5053 if (IntID == Intrinsic::ppc_fsels) { in Select()
5059 if (IntID == Intrinsic::ppc_bcdadd_p || IntID == Intrinsic::ppc_bcdsub_p) { in Select()
5062 IntID == Intrinsic::ppc_bcdadd_p ? PPC::BCDADD_rec : PPC::BCDSUB_rec; in Select()
5139 switch (IntID) { in Select()
/llvm-project-15.0.7/clang/lib/CodeGen/
H A DCGObjC.cpp2116 static llvm::Function *getARCIntrinsic(llvm::Intrinsic::ID IntID, in getARCIntrinsic() argument
2118 llvm::Function *fn = CGM.getIntrinsic(IntID); in getARCIntrinsic()
2128 llvm::Function *&fn, llvm::Intrinsic::ID IntID, in emitARCValueOperation() argument
2134 fn = getARCIntrinsic(IntID, CGF.CGM); in emitARCValueOperation()
2152 llvm::Intrinsic::ID IntID) { in emitARCLoadOperation() argument
2154 fn = getARCIntrinsic(IntID, CGF.CGM); in emitARCLoadOperation()
2175 llvm::Intrinsic::ID IntID, in emitARCStoreOperation() argument
2180 fn = getARCIntrinsic(IntID, CGF.CGM); in emitARCStoreOperation()
2199 llvm::Intrinsic::ID IntID) { in emitARCCopyOperation() argument
2203 fn = getARCIntrinsic(IntID, CGF.CGM); in emitARCCopyOperation()
H A DCodeGenFunction.h4216 unsigned IntID);
4219 unsigned IntID);
4231 unsigned IntID);
4234 unsigned IntID);
4237 unsigned IntID);
H A DCGBuiltin.cpp7303 TblF = CGF.CGM.getIntrinsic(IntID, ResTy); in packTBLDVectorList()
8672 unsigned IntID; in EmitSVEPredicateCast() local
8680 IntID = Intrinsic::aarch64_sve_convert_from_svbool; in EmitSVEPredicateCast()
8684 IntID = Intrinsic::aarch64_sve_convert_to_svbool; in EmitSVEPredicateCast()
8689 Function *F = CGM.getIntrinsic(IntID, IntrinsicTy); in EmitSVEPredicateCast()
8720 F = CGM.getIntrinsic(IntID, OverloadedTy); in EmitSVEGatherLoad()
8769 F = CGM.getIntrinsic(IntID, OverloadedTy); in EmitSVEScatterStore()
8831 Function *F = CGM.getIntrinsic(IntID, OverloadedTy); in EmitSVEGatherPrefetch()
8843 switch (IntID) { in EmitSVEStructLoad()
8877 switch (IntID) { in EmitSVEStructStore()
[all …]
/llvm-project-15.0.7/llvm/lib/IR/
H A DFunction.cpp408 if (IntID) in Function()
409 setAttributes(Intrinsic::getAttributes(getContext(), IntID)); in Function()
748 return isTargetIntrinsic(IntID); in isTargetIntrinsic()
796 IntID = Intrinsic::not_intrinsic; in recalculateIntrinsicID()
800 IntID = lookupIntrinsicID(Name); in recalculateIntrinsicID()
/llvm-project-15.0.7/llvm/include/llvm/IR/
H A DGlobalValue.h161 Intrinsic::ID IntID = (Intrinsic::ID)0U;
H A DFunction.h205 Intrinsic::ID getIntrinsicID() const LLVM_READONLY { return IntID; } in getIntrinsicID()
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp2642 SDValue IntID = in lowerVECTOR_SHUFFLE() local
2645 IntID, in lowerVECTOR_SHUFFLE()
4985 SDValue IntID = DAG.getTargetConstant( in LowerINTRINSIC_W_CHAIN() local
5084 SDValue IntID = DAG.getTargetConstant( in LowerINTRINSIC_VOID() local
5846 SDValue IntID = DAG.getTargetConstant( in lowerFixedLengthVectorLoadToRVV() local
5848 SmallVector<SDValue, 4> Ops{Load->getChain(), IntID}; in lowerFixedLengthVectorLoadToRVV()
5893 SDValue IntID = DAG.getTargetConstant( in lowerFixedLengthVectorStoreToRVV() local
5940 unsigned IntID = in lowerMaskedLoad() local
6006 unsigned IntID = in lowerMaskedStore() local
6561 unsigned IntID = in lowerMaskedGather() local
[all …]
H A DRISCVISelDAGToDAG.cpp105 SDValue IntID = in PreprocessISelDAG() local
108 IntID, in PreprocessISelDAG()
/llvm-project-15.0.7/clang-tools-extra/clangd/
H A DClangdLSPServer.cpp210 if (auto IntID = ID.getAsInteger()) { in onReply() local
214 if (ReplyCallbacks[Index].first == *IntID) { in onReply()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1934 Intrinsic::ID IntID = static_cast<Intrinsic::ID>(CN->getZExtValue()); in computeKnownBitsForTargetNode() local
1935 switch (IntID) { in computeKnownBitsForTargetNode()
20328 Intrinsic::ID IntID = static_cast<Intrinsic::ID>(CN->getZExtValue()); in ReplaceNodeResults() local
20329 switch (IntID) { in ReplaceNodeResults()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp19811 Intrinsic::ID IntID = static_cast<Intrinsic::ID>(CN->getZExtValue()); in computeKnownBitsForTargetNode() local
19812 switch (IntID) { in computeKnownBitsForTargetNode()